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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / drivers / pinctrl / qcom / pinctrl-sa8775p.c
blob: cb2496ff1fbba25f37aca20b4ba812858147a2c0 [file] [log] [blame]
Varadarajan Narayanan76f1af92025-03-24 13:35:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2023, Linaro Limited
5 */
6
7#include <dm.h>
8
9#include "pinctrl-qcom.h"
10
11#define MAX_PIN_NAME_LEN 32
12static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
13
14typedef unsigned int msm_pin_function[10];
15#define SA8775_PIN_OFFSET 0x100000
16
17#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\
18 { \
19 msm_mux_gpio, /* gpio mode */ \
20 msm_mux_##f1, \
21 msm_mux_##f2, \
22 msm_mux_##f3, \
23 msm_mux_##f4, \
24 msm_mux_##f5, \
25 msm_mux_##f6, \
26 msm_mux_##f7, \
27 msm_mux_##f8, \
28 msm_mux_##f9 \
29 }
30
31#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
32 { \
33 .name = pg_name, \
34 .ctl_reg = ctl, \
35 .io_reg = 0, \
36 .pull_bit = pull, \
37 .drv_bit = drv, \
38 .oe_bit = -1, \
39 .in_bit = -1, \
40 .out_bit = -1, \
41 }
42
43#define UFS_RESET(pg_name, ctl) \
44 { \
45 .name = pg_name, \
46 .ctl_reg = ctl, \
47 .io_reg = ctl + 0x4, \
48 .pull_bit = 3, \
49 .drv_bit = 0, \
50 .oe_bit = -1, \
51 .in_bit = -1, \
52 .out_bit = 0, \
53 }
54
55enum sa8775p_functions {
56 msm_mux_gpio,
57 msm_mux_atest_char,
58 msm_mux_atest_usb2,
59 msm_mux_audio_ref,
60 msm_mux_cam_mclk,
61 msm_mux_cci_async,
62 msm_mux_cci_i2c,
63 msm_mux_cci_timer0,
64 msm_mux_cci_timer1,
65 msm_mux_cci_timer2,
66 msm_mux_cci_timer3,
67 msm_mux_cci_timer4,
68 msm_mux_cci_timer5,
69 msm_mux_cci_timer6,
70 msm_mux_cci_timer7,
71 msm_mux_cci_timer8,
72 msm_mux_cci_timer9,
73 msm_mux_cri_trng,
74 msm_mux_cri_trng0,
75 msm_mux_cri_trng1,
76 msm_mux_dbg_out,
77 msm_mux_ddr_bist,
78 msm_mux_ddr_pxi0,
79 msm_mux_ddr_pxi1,
80 msm_mux_ddr_pxi2,
81 msm_mux_ddr_pxi3,
82 msm_mux_ddr_pxi4,
83 msm_mux_ddr_pxi5,
84 msm_mux_edp0_hot,
85 msm_mux_edp0_lcd,
86 msm_mux_edp1_hot,
87 msm_mux_edp1_lcd,
88 msm_mux_edp2_hot,
89 msm_mux_edp2_lcd,
90 msm_mux_edp3_hot,
91 msm_mux_edp3_lcd,
92 msm_mux_emac0_mcg0,
93 msm_mux_emac0_mcg1,
94 msm_mux_emac0_mcg2,
95 msm_mux_emac0_mcg3,
96 msm_mux_emac0_mdc,
97 msm_mux_emac0_mdio,
98 msm_mux_emac0_ptp_aux,
99 msm_mux_emac0_ptp_pps,
100 msm_mux_emac1_mcg0,
101 msm_mux_emac1_mcg1,
102 msm_mux_emac1_mcg2,
103 msm_mux_emac1_mcg3,
104 msm_mux_emac1_mdc,
105 msm_mux_emac1_mdio,
106 msm_mux_emac1_ptp_aux,
107 msm_mux_emac1_ptp_pps,
108 msm_mux_gcc_gp1,
109 msm_mux_gcc_gp2,
110 msm_mux_gcc_gp3,
111 msm_mux_gcc_gp4,
112 msm_mux_gcc_gp5,
113 msm_mux_hs0_mi2s,
114 msm_mux_hs1_mi2s,
115 msm_mux_hs2_mi2s,
116 msm_mux_ibi_i3c,
117 msm_mux_jitter_bist,
118 msm_mux_mdp0_vsync0,
119 msm_mux_mdp0_vsync1,
120 msm_mux_mdp0_vsync2,
121 msm_mux_mdp0_vsync3,
122 msm_mux_mdp0_vsync4,
123 msm_mux_mdp0_vsync5,
124 msm_mux_mdp0_vsync6,
125 msm_mux_mdp0_vsync7,
126 msm_mux_mdp0_vsync8,
127 msm_mux_mdp1_vsync0,
128 msm_mux_mdp1_vsync1,
129 msm_mux_mdp1_vsync2,
130 msm_mux_mdp1_vsync3,
131 msm_mux_mdp1_vsync4,
132 msm_mux_mdp1_vsync5,
133 msm_mux_mdp1_vsync6,
134 msm_mux_mdp1_vsync7,
135 msm_mux_mdp1_vsync8,
136 msm_mux_mdp_vsync,
137 msm_mux_mi2s1_data0,
138 msm_mux_mi2s1_data1,
139 msm_mux_mi2s1_sck,
140 msm_mux_mi2s1_ws,
141 msm_mux_mi2s2_data0,
142 msm_mux_mi2s2_data1,
143 msm_mux_mi2s2_sck,
144 msm_mux_mi2s2_ws,
145 msm_mux_mi2s_mclk0,
146 msm_mux_mi2s_mclk1,
147 msm_mux_pcie0_clkreq,
148 msm_mux_pcie1_clkreq,
149 msm_mux_phase_flag,
150 msm_mux_pll_bist,
151 msm_mux_pll_clk,
152 msm_mux_prng_rosc0,
153 msm_mux_prng_rosc1,
154 msm_mux_prng_rosc2,
155 msm_mux_prng_rosc3,
156 msm_mux_qdss_cti,
157 msm_mux_qdss_gpio,
158 msm_mux_qup0_se0,
159 msm_mux_qup0_se1,
160 msm_mux_qup0_se2,
161 msm_mux_qup0_se3,
162 msm_mux_qup0_se4,
163 msm_mux_qup0_se5,
164 msm_mux_qup1_se0,
165 msm_mux_qup1_se1,
166 msm_mux_qup1_se2,
167 msm_mux_qup1_se3,
168 msm_mux_qup1_se4,
169 msm_mux_qup1_se5,
170 msm_mux_qup1_se6,
171 msm_mux_qup2_se0,
172 msm_mux_qup2_se1,
173 msm_mux_qup2_se2,
174 msm_mux_qup2_se3,
175 msm_mux_qup2_se4,
176 msm_mux_qup2_se5,
177 msm_mux_qup2_se6,
178 msm_mux_qup3_se0,
179 msm_mux_sail_top,
180 msm_mux_sailss_emac0,
181 msm_mux_sailss_ospi,
182 msm_mux_sgmii_phy,
183 msm_mux_tb_trig,
184 msm_mux_tgu_ch0,
185 msm_mux_tgu_ch1,
186 msm_mux_tgu_ch2,
187 msm_mux_tgu_ch3,
188 msm_mux_tgu_ch4,
189 msm_mux_tgu_ch5,
190 msm_mux_tsense_pwm1,
191 msm_mux_tsense_pwm2,
192 msm_mux_tsense_pwm3,
193 msm_mux_tsense_pwm4,
194 msm_mux_usb2phy_ac,
195 msm_mux_vsense_trigger,
196 msm_mux__,
197};
198
199#define MSM_PIN_FUNCTION(fname) \
200 [msm_mux_##fname] = {#fname, msm_mux_##fname}
201
202static const struct pinctrl_function msm_pinctrl_functions[] = {
203 MSM_PIN_FUNCTION(gpio),
204 MSM_PIN_FUNCTION(atest_char),
205 MSM_PIN_FUNCTION(atest_usb2),
206 MSM_PIN_FUNCTION(audio_ref),
207 MSM_PIN_FUNCTION(cam_mclk),
208 MSM_PIN_FUNCTION(cci_async),
209 MSM_PIN_FUNCTION(cci_i2c),
210 MSM_PIN_FUNCTION(cci_timer0),
211 MSM_PIN_FUNCTION(cci_timer1),
212 MSM_PIN_FUNCTION(cci_timer2),
213 MSM_PIN_FUNCTION(cci_timer3),
214 MSM_PIN_FUNCTION(cci_timer4),
215 MSM_PIN_FUNCTION(cci_timer5),
216 MSM_PIN_FUNCTION(cci_timer6),
217 MSM_PIN_FUNCTION(cci_timer7),
218 MSM_PIN_FUNCTION(cci_timer8),
219 MSM_PIN_FUNCTION(cci_timer9),
220 MSM_PIN_FUNCTION(cri_trng),
221 MSM_PIN_FUNCTION(cri_trng0),
222 MSM_PIN_FUNCTION(cri_trng1),
223 MSM_PIN_FUNCTION(dbg_out),
224 MSM_PIN_FUNCTION(ddr_bist),
225 MSM_PIN_FUNCTION(ddr_pxi0),
226 MSM_PIN_FUNCTION(ddr_pxi1),
227 MSM_PIN_FUNCTION(ddr_pxi2),
228 MSM_PIN_FUNCTION(ddr_pxi3),
229 MSM_PIN_FUNCTION(ddr_pxi4),
230 MSM_PIN_FUNCTION(ddr_pxi5),
231 MSM_PIN_FUNCTION(edp0_hot),
232 MSM_PIN_FUNCTION(edp0_lcd),
233 MSM_PIN_FUNCTION(edp1_hot),
234 MSM_PIN_FUNCTION(edp1_lcd),
235 MSM_PIN_FUNCTION(edp2_hot),
236 MSM_PIN_FUNCTION(edp2_lcd),
237 MSM_PIN_FUNCTION(edp3_hot),
238 MSM_PIN_FUNCTION(edp3_lcd),
239 MSM_PIN_FUNCTION(emac0_mcg0),
240 MSM_PIN_FUNCTION(emac0_mcg1),
241 MSM_PIN_FUNCTION(emac0_mcg2),
242 MSM_PIN_FUNCTION(emac0_mcg3),
243 MSM_PIN_FUNCTION(emac0_mdc),
244 MSM_PIN_FUNCTION(emac0_mdio),
245 MSM_PIN_FUNCTION(emac0_ptp_aux),
246 MSM_PIN_FUNCTION(emac0_ptp_pps),
247 MSM_PIN_FUNCTION(emac1_mcg0),
248 MSM_PIN_FUNCTION(emac1_mcg1),
249 MSM_PIN_FUNCTION(emac1_mcg2),
250 MSM_PIN_FUNCTION(emac1_mcg3),
251 MSM_PIN_FUNCTION(emac1_mdc),
252 MSM_PIN_FUNCTION(emac1_mdio),
253 MSM_PIN_FUNCTION(emac1_ptp_aux),
254 MSM_PIN_FUNCTION(emac1_ptp_pps),
255 MSM_PIN_FUNCTION(gcc_gp1),
256 MSM_PIN_FUNCTION(gcc_gp2),
257 MSM_PIN_FUNCTION(gcc_gp3),
258 MSM_PIN_FUNCTION(gcc_gp4),
259 MSM_PIN_FUNCTION(gcc_gp5),
260 MSM_PIN_FUNCTION(hs0_mi2s),
261 MSM_PIN_FUNCTION(hs1_mi2s),
262 MSM_PIN_FUNCTION(hs2_mi2s),
263 MSM_PIN_FUNCTION(ibi_i3c),
264 MSM_PIN_FUNCTION(jitter_bist),
265 MSM_PIN_FUNCTION(mdp0_vsync0),
266 MSM_PIN_FUNCTION(mdp0_vsync1),
267 MSM_PIN_FUNCTION(mdp0_vsync2),
268 MSM_PIN_FUNCTION(mdp0_vsync3),
269 MSM_PIN_FUNCTION(mdp0_vsync4),
270 MSM_PIN_FUNCTION(mdp0_vsync5),
271 MSM_PIN_FUNCTION(mdp0_vsync6),
272 MSM_PIN_FUNCTION(mdp0_vsync7),
273 MSM_PIN_FUNCTION(mdp0_vsync8),
274 MSM_PIN_FUNCTION(mdp1_vsync0),
275 MSM_PIN_FUNCTION(mdp1_vsync1),
276 MSM_PIN_FUNCTION(mdp1_vsync2),
277 MSM_PIN_FUNCTION(mdp1_vsync3),
278 MSM_PIN_FUNCTION(mdp1_vsync4),
279 MSM_PIN_FUNCTION(mdp1_vsync5),
280 MSM_PIN_FUNCTION(mdp1_vsync6),
281 MSM_PIN_FUNCTION(mdp1_vsync7),
282 MSM_PIN_FUNCTION(mdp1_vsync8),
283 MSM_PIN_FUNCTION(mdp_vsync),
284 MSM_PIN_FUNCTION(mi2s1_data0),
285 MSM_PIN_FUNCTION(mi2s1_data1),
286 MSM_PIN_FUNCTION(mi2s1_sck),
287 MSM_PIN_FUNCTION(mi2s1_ws),
288 MSM_PIN_FUNCTION(mi2s2_data0),
289 MSM_PIN_FUNCTION(mi2s2_data1),
290 MSM_PIN_FUNCTION(mi2s2_sck),
291 MSM_PIN_FUNCTION(mi2s2_ws),
292 MSM_PIN_FUNCTION(mi2s_mclk0),
293 MSM_PIN_FUNCTION(mi2s_mclk1),
294 MSM_PIN_FUNCTION(pcie0_clkreq),
295 MSM_PIN_FUNCTION(pcie1_clkreq),
296 MSM_PIN_FUNCTION(phase_flag),
297 MSM_PIN_FUNCTION(pll_bist),
298 MSM_PIN_FUNCTION(pll_clk),
299 MSM_PIN_FUNCTION(prng_rosc0),
300 MSM_PIN_FUNCTION(prng_rosc1),
301 MSM_PIN_FUNCTION(prng_rosc2),
302 MSM_PIN_FUNCTION(prng_rosc3),
303 MSM_PIN_FUNCTION(qdss_cti),
304 MSM_PIN_FUNCTION(qdss_gpio),
305 MSM_PIN_FUNCTION(qup0_se0),
306 MSM_PIN_FUNCTION(qup0_se1),
307 MSM_PIN_FUNCTION(qup0_se2),
308 MSM_PIN_FUNCTION(qup0_se3),
309 MSM_PIN_FUNCTION(qup0_se4),
310 MSM_PIN_FUNCTION(qup0_se5),
311 MSM_PIN_FUNCTION(qup1_se0),
312 MSM_PIN_FUNCTION(qup1_se1),
313 MSM_PIN_FUNCTION(qup1_se2),
314 MSM_PIN_FUNCTION(qup1_se3),
315 MSM_PIN_FUNCTION(qup1_se4),
316 MSM_PIN_FUNCTION(qup1_se5),
317 MSM_PIN_FUNCTION(qup1_se6),
318 MSM_PIN_FUNCTION(qup2_se0),
319 MSM_PIN_FUNCTION(qup2_se1),
320 MSM_PIN_FUNCTION(qup2_se2),
321 MSM_PIN_FUNCTION(qup2_se3),
322 MSM_PIN_FUNCTION(qup2_se4),
323 MSM_PIN_FUNCTION(qup2_se5),
324 MSM_PIN_FUNCTION(qup2_se6),
325 MSM_PIN_FUNCTION(qup3_se0),
326 MSM_PIN_FUNCTION(sail_top),
327 MSM_PIN_FUNCTION(sailss_emac0),
328 MSM_PIN_FUNCTION(sailss_ospi),
329 MSM_PIN_FUNCTION(sgmii_phy),
330 MSM_PIN_FUNCTION(tb_trig),
331 MSM_PIN_FUNCTION(tgu_ch0),
332 MSM_PIN_FUNCTION(tgu_ch1),
333 MSM_PIN_FUNCTION(tgu_ch2),
334 MSM_PIN_FUNCTION(tgu_ch3),
335 MSM_PIN_FUNCTION(tgu_ch4),
336 MSM_PIN_FUNCTION(tgu_ch5),
337 MSM_PIN_FUNCTION(tsense_pwm1),
338 MSM_PIN_FUNCTION(tsense_pwm2),
339 MSM_PIN_FUNCTION(tsense_pwm3),
340 MSM_PIN_FUNCTION(tsense_pwm4),
341 MSM_PIN_FUNCTION(usb2phy_ac),
342 MSM_PIN_FUNCTION(vsense_trigger),
343};
344
345static const msm_pin_function sa8775p_pin_functions[] = {
346 [0] = PINGROUP(0, _, _, _, _, _, _, _, _, _),
347 [1] = PINGROUP(1, pcie0_clkreq, _, _, _, _, _, _, _, _),
348 [2] = PINGROUP(2, _, _, _, _, _, _, _, _, _),
349 [3] = PINGROUP(3, pcie1_clkreq, _, _, _, _, _, _, _, _),
350 [4] = PINGROUP(4, _, _, _, _, _, _, _, _, _),
351 [5] = PINGROUP(5, _, _, _, _, _, _, _, _, _),
352 [6] = PINGROUP(6, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux,
353 emac1_ptp_pps, _, _, _, _, _),
354 [7] = PINGROUP(7, sgmii_phy, _, _, _, _, _, _, _, _),
355 [8] = PINGROUP(8, emac0_mdc, _, _, _, _, _, _, _, _),
356 [9] = PINGROUP(9, emac0_mdio, _, _, _, _, _, _, _, _),
357 [10] = PINGROUP(10, usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps,
358 emac1_ptp_aux, emac1_ptp_pps, _, _, _, _),
359 [11] = PINGROUP(11, usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps,
360 emac1_ptp_aux, emac1_ptp_pps, _, _, _, _),
361 [12] = PINGROUP(12, usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps,
362 emac1_ptp_aux, emac1_ptp_pps, emac0_mcg0, _, _, _),
363 [13] = PINGROUP(13, qup3_se0, emac0_mcg1, _, _, sail_top, _, _, _, _),
364 [14] = PINGROUP(14, qup3_se0, emac0_mcg2, _, _, sail_top, _, _, _, _),
365 [15] = PINGROUP(15, qup3_se0, emac0_mcg3, _, _, sail_top, _, _, _, _),
366 [16] = PINGROUP(16, qup3_se0, emac1_mcg0, _, _, sail_top, _, _, _, _),
367 [17] = PINGROUP(17, qup3_se0, tb_trig, tb_trig, emac1_mcg1, _, _, _, _, _),
368 [18] = PINGROUP(18, qup3_se0, emac1_mcg2, _, _, sailss_ospi, sailss_emac0, _, _, _),
369 [19] = PINGROUP(19, qup3_se0, emac1_mcg3, _, _, sailss_ospi, sailss_emac0, _, _, _),
370 [20] = PINGROUP(20, qup0_se0, emac1_mdc, qdss_gpio, _, _, _, _, _, _),
371 [21] = PINGROUP(21, qup0_se0, emac1_mdio, qdss_gpio, _, _, _, _, _, _),
372 [22] = PINGROUP(22, qup0_se0, qdss_gpio, _, _, _, _, _, _, _),
373 [23] = PINGROUP(23, qup0_se0, qdss_gpio, _, _, _, _, _, _, _),
374 [24] = PINGROUP(24, qup0_se1, qdss_gpio, _, _, _, _, _, _, _),
375 [25] = PINGROUP(25, qup0_se1, phase_flag, _, qdss_gpio, _, _, _, _, _),
376 [26] = PINGROUP(26, sgmii_phy, qup0_se1, qdss_cti, phase_flag, _, _, _, _, _),
377 [27] = PINGROUP(27, qup0_se1, qdss_cti, phase_flag, _, atest_char, _, _, _, _),
378 [28] = PINGROUP(28, qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),
379 [29] = PINGROUP(29, qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),
380 [30] = PINGROUP(30, qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),
381 [31] = PINGROUP(31, qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),
382 [32] = PINGROUP(32, qup0_se4, phase_flag, _, _, _, _, _, _, _),
383 [33] = PINGROUP(33, qup0_se4, gcc_gp4, _, ddr_pxi0, _, _, _, _, _),
384 [34] = PINGROUP(34, qup0_se4, gcc_gp5, _, ddr_pxi0, _, _, _, _, _),
385 [35] = PINGROUP(35, qup0_se4, phase_flag, _, _, _, _, _, _, _),
386 [36] = PINGROUP(36, qup0_se2, qup0_se5, phase_flag, tgu_ch2, _, _, _, _, _),
387 [37] = PINGROUP(37, qup0_se2, qup0_se5, phase_flag, tgu_ch3, _, _, _, _, _),
388 [38] = PINGROUP(38, qup0_se5, qup0_se2, qdss_cti, phase_flag, tgu_ch4, _, _, _, _),
389 [39] = PINGROUP(39, qup0_se5, qup0_se2, qdss_cti, phase_flag, tgu_ch5, _, _, _, _),
390 [40] = PINGROUP(40, qup1_se0, qup1_se1, ibi_i3c, mdp1_vsync0, _, _, _, _, _),
391 [41] = PINGROUP(41, qup1_se0, qup1_se1, ibi_i3c, mdp1_vsync1, _, _, _, _, _),
392 [42] = PINGROUP(42, qup1_se1, qup1_se0, ibi_i3c, mdp1_vsync2, gcc_gp5, _, _, _, _),
393 [43] = PINGROUP(43, qup1_se1, qup1_se0, ibi_i3c, mdp1_vsync3, _, _, _, _, _),
394 [44] = PINGROUP(44, qup1_se2, qup1_se3, edp0_lcd, _, _, _, _, _, _),
395 [45] = PINGROUP(45, qup1_se2, qup1_se3, edp1_lcd, _, _, _, _, _, _),
396 [46] = PINGROUP(46, qup1_se3, qup1_se2, mdp1_vsync4, tgu_ch0, _, _, _, _, _),
397 [47] = PINGROUP(47, qup1_se3, qup1_se2, mdp1_vsync5, tgu_ch1, _, _, _, _, _),
398 [48] = PINGROUP(48, qup1_se4, qdss_cti, edp2_lcd, _, _, _, _, _, _),
399 [49] = PINGROUP(49, qup1_se4, qdss_cti, edp3_lcd, _, _, _, _, _, _),
400 [50] = PINGROUP(50, qup1_se4, cci_async, qdss_cti, mdp1_vsync8, _, _, _, _, _),
401 [51] = PINGROUP(51, qup1_se4, qdss_cti, mdp1_vsync6, gcc_gp1, _, _, _, _, _),
402 [52] = PINGROUP(52, qup1_se5, cci_timer4, cci_i2c, mdp1_vsync7, gcc_gp2, _, ddr_pxi1, _, _),
403 [53] = PINGROUP(53, qup1_se5, cci_timer5, cci_i2c, gcc_gp3, _, ddr_pxi1, _, _, _),
404 [54] = PINGROUP(54, qup1_se5, cci_timer6, cci_i2c, _, _, _, _, _, _),
405 [55] = PINGROUP(55, qup1_se5, cci_timer7, cci_i2c, gcc_gp4, _, ddr_pxi2, _, _, _),
406 [56] = PINGROUP(56, qup1_se6, qup1_se6, cci_timer8, cci_i2c, phase_flag, ddr_bist, _, _, _),
407 [57] = PINGROUP(57, qup1_se6, qup1_se6, cci_timer9, cci_i2c,
408 mdp0_vsync0, phase_flag, ddr_bist, _, _),
409 [58] = PINGROUP(58, cci_i2c, mdp0_vsync1, ddr_bist, _, atest_usb2, atest_char, _, _, _),
410 [59] = PINGROUP(59, cci_i2c, mdp0_vsync2, ddr_bist, _, atest_usb2, atest_char, _, _, _),
411 [60] = PINGROUP(60, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
412 [61] = PINGROUP(61, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
413 [62] = PINGROUP(62, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
414 [63] = PINGROUP(63, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
415 [64] = PINGROUP(64, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
416 [65] = PINGROUP(65, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
417 [66] = PINGROUP(66, cci_i2c, cci_async, qdss_gpio, _, _, _, _, _, _),
418 [67] = PINGROUP(67, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
419 [68] = PINGROUP(68, cci_timer0, cci_async, _, _, _, _, _, _, _),
420 [69] = PINGROUP(69, cci_timer1, cci_async, _, _, _, _, _, _, _),
421 [70] = PINGROUP(70, cci_timer2, cci_async, _, _, _, _, _, _, _),
422 [71] = PINGROUP(71, cci_timer3, cci_async, _, _, _, _, _, _, _),
423 [72] = PINGROUP(72, cam_mclk, _, _, _, _, _, _, _, _),
424 [73] = PINGROUP(73, cam_mclk, _, _, _, _, _, _, _, _),
425 [74] = PINGROUP(74, cam_mclk, _, _, _, _, _, _, _, _),
426 [75] = PINGROUP(75, cam_mclk, _, _, _, _, _, _, _, _),
427 [76] = PINGROUP(76, _, _, _, _, _, _, _, _, _),
428 [77] = PINGROUP(77, _, _, _, _, _, _, _, _, _),
429 [78] = PINGROUP(78, _, _, _, _, _, _, _, _, _),
430 [79] = PINGROUP(79, _, _, _, _, _, _, _, _, _),
431 [80] = PINGROUP(80, qup2_se0, ibi_i3c, mdp0_vsync3, _, _, _, _, _, _),
432 [81] = PINGROUP(81, qup2_se0, ibi_i3c, mdp0_vsync4, _, _, _, _, _, _),
433 [82] = PINGROUP(82, qup2_se0, mdp_vsync, gcc_gp1, _, _, _, _, _, _),
434 [83] = PINGROUP(83, qup2_se0, mdp_vsync, gcc_gp2, _, _, _, _, _, _),
435 [84] = PINGROUP(84, qup2_se1, qup2_se5, ibi_i3c, mdp_vsync, gcc_gp3, _, _, _, _),
436 [85] = PINGROUP(85, qup2_se1, qup2_se5, ibi_i3c, _, _, _, _, _, _),
437 [86] = PINGROUP(86, qup2_se2, jitter_bist, atest_usb2, ddr_pxi2, _, _, _, _, _),
438 [87] = PINGROUP(87, qup2_se2, pll_clk, atest_usb2, ddr_pxi3, _, _, _, _, _),
439 [88] = PINGROUP(88, qup2_se2, _, atest_usb2, ddr_pxi3, _, _, _, _, _),
440 [89] = PINGROUP(89, qup2_se2, _, atest_usb2, ddr_pxi4, atest_char, _, _, _, _),
441 [90] = PINGROUP(90, qup2_se2, _, atest_usb2, ddr_pxi4, atest_char, _, _, _, _),
442 [91] = PINGROUP(91, qup2_se3, mdp0_vsync5, _, atest_usb2, _, _, _, _, _),
443 [92] = PINGROUP(92, qup2_se3, mdp0_vsync6, _, atest_usb2, _, _, _, _, _),
444 [93] = PINGROUP(93, qup2_se3, mdp0_vsync7, _, atest_usb2, _, _, _, _, _),
445 [94] = PINGROUP(94, qup2_se3, mdp0_vsync8, _, atest_usb2, _, _, _, _, _),
446 [95] = PINGROUP(95, qup2_se4, qup2_se6, _, atest_usb2, _, _, _, _, _),
447 [96] = PINGROUP(96, qup2_se4, qup2_se6, _, atest_usb2, _, _, _, _, _),
448 [97] = PINGROUP(97, qup2_se6, qup2_se4, cri_trng0, _, atest_usb2, _, _, _, _),
449 [98] = PINGROUP(98, qup2_se6, qup2_se4, phase_flag, cri_trng1, _, _, _, _, _),
450 [99] = PINGROUP(99, qup2_se5, qup2_se1, phase_flag, cri_trng, _, _, _, _, _),
451 [100] = PINGROUP(100, qup2_se5, qup2_se1, _, _, _, _, _, _, _),
452 [101] = PINGROUP(101, edp0_hot, prng_rosc0, tsense_pwm4, _, _, _, _, _, _),
453 [102] = PINGROUP(102, edp1_hot, prng_rosc1, tsense_pwm3, _, _, _, _, _, _),
454 [103] = PINGROUP(103, edp3_hot, prng_rosc2, tsense_pwm2, _, _, _, _, _, _),
455 [104] = PINGROUP(104, edp2_hot, prng_rosc3, tsense_pwm1, _, _, _, _, _, _),
456 [105] = PINGROUP(105, mi2s_mclk0, _, qdss_gpio, atest_usb2, _, _, _, _, _),
457 [106] = PINGROUP(106, mi2s1_sck, phase_flag, _, qdss_gpio, _, _, _, _, _),
458 [107] = PINGROUP(107, mi2s1_ws, phase_flag, _, qdss_gpio, _, _, _, _, _),
459 [108] = PINGROUP(108, mi2s1_data0, phase_flag, _, qdss_gpio, _, _, _, _, _),
460 [109] = PINGROUP(109, mi2s1_data1, phase_flag, _, qdss_gpio, _, _, _, _, _),
461 [110] = PINGROUP(110, mi2s2_sck, phase_flag, _, qdss_gpio, _, _, _, _, _),
462 [111] = PINGROUP(111, mi2s2_ws, phase_flag, _, qdss_gpio, vsense_trigger, _, _, _, _),
463 [112] = PINGROUP(112, mi2s2_data0, phase_flag, _, qdss_gpio, _, _, _, _, _),
464 [113] = PINGROUP(113, mi2s2_data1, audio_ref, phase_flag, _, qdss_gpio, _, _, _, _),
465 [114] = PINGROUP(114, hs0_mi2s, pll_bist, phase_flag, _, qdss_gpio, _, _, _, _),
466 [115] = PINGROUP(115, hs0_mi2s, _, qdss_gpio, _, _, _, _, _, _),
467 [116] = PINGROUP(116, hs0_mi2s, _, qdss_gpio, _, _, _, _, _, _),
468 [117] = PINGROUP(117, hs0_mi2s, mi2s_mclk1, _, qdss_gpio, _, _, _, _, _),
469 [118] = PINGROUP(118, hs1_mi2s, _, qdss_gpio, ddr_pxi5, _, _, _, _, _),
470 [119] = PINGROUP(119, hs1_mi2s, _, qdss_gpio, ddr_pxi5, _, _, _, _, _),
471 [120] = PINGROUP(120, hs1_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),
472 [121] = PINGROUP(121, hs1_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),
473 [122] = PINGROUP(122, hs2_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),
474 [123] = PINGROUP(123, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
475 [124] = PINGROUP(124, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
476 [125] = PINGROUP(125, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
477 [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _),
478 [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _),
479 [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _),
480 [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _),
481 [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _),
482 [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _),
483 [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _),
484 [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _),
485 [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _),
486 [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _),
487 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _),
488 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _),
489 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _),
490 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
491 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _),
492 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
493 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
494 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
495 [144] = PINGROUP(144, dbg_out, _, _, _, _, _, _, _, _),
496 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _),
497 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _),
498 [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _),
499 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _),
500};
501
502static const struct msm_special_pin_data msm_special_pins_data[] = {
503 [0] = UFS_RESET("ufs_reset", 0x1a2000),
504 [1] = SDC_QDSD_PINGROUP("sdc1_rclk", 0x199000, 15, 0),
505 [2] = SDC_QDSD_PINGROUP("sdc1_clk", 0x199000, 13, 6),
506 [3] = SDC_QDSD_PINGROUP("sdc1_cmd", 0x199000, 11, 3),
507 [4] = SDC_QDSD_PINGROUP("sdc1_data", 0x199000, 9, 0),
508};
509
510static const char *sa8775p_get_function_name(struct udevice *dev,
511 unsigned int selector)
512{
513 return msm_pinctrl_functions[selector].name;
514}
515
516static const char *sa8775p_get_pin_name(struct udevice *dev,
517 unsigned int selector)
518{
519 if (selector >= 149 && selector <= 155)
520 snprintf(pin_name, MAX_PIN_NAME_LEN,
521 msm_special_pins_data[selector - 149].name);
522 else
523 snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
524
525 return pin_name;
526}
527
528static int sa8775p_get_function_mux(__maybe_unused unsigned int pin,
529 unsigned int selector)
530{
531 unsigned int i;
532 const msm_pin_function *func = sa8775p_pin_functions + pin;
533
534 for (i = 0; i < 10; i++)
535 if ((*func)[i] == selector)
536 return i;
537
538 pr_err("Can't find requested function for pin %u pin\n", pin);
539
540 return -EINVAL;
541}
542
543static const unsigned int sa8775p_pin_offsets[] = {
544 [0] = SA8775_PIN_OFFSET, [1] = SA8775_PIN_OFFSET, [2] = SA8775_PIN_OFFSET,
545 [3] = SA8775_PIN_OFFSET, [4] = SA8775_PIN_OFFSET, [5] = SA8775_PIN_OFFSET,
546 [6] = SA8775_PIN_OFFSET, [7] = SA8775_PIN_OFFSET, [8] = SA8775_PIN_OFFSET,
547 [9] = SA8775_PIN_OFFSET, [10] = SA8775_PIN_OFFSET, [11] = SA8775_PIN_OFFSET,
548 [12] = SA8775_PIN_OFFSET, [13] = SA8775_PIN_OFFSET, [14] = SA8775_PIN_OFFSET,
549 [15] = SA8775_PIN_OFFSET, [16] = SA8775_PIN_OFFSET, [17] = SA8775_PIN_OFFSET,
550 [18] = SA8775_PIN_OFFSET, [19] = SA8775_PIN_OFFSET, [20] = SA8775_PIN_OFFSET,
551 [21] = SA8775_PIN_OFFSET, [22] = SA8775_PIN_OFFSET, [23] = SA8775_PIN_OFFSET,
552 [24] = SA8775_PIN_OFFSET, [25] = SA8775_PIN_OFFSET, [26] = SA8775_PIN_OFFSET,
553 [27] = SA8775_PIN_OFFSET, [28] = SA8775_PIN_OFFSET, [29] = SA8775_PIN_OFFSET,
554 [30] = SA8775_PIN_OFFSET, [31] = SA8775_PIN_OFFSET, [32] = SA8775_PIN_OFFSET,
555 [33] = SA8775_PIN_OFFSET, [34] = SA8775_PIN_OFFSET, [35] = SA8775_PIN_OFFSET,
556 [36] = SA8775_PIN_OFFSET, [37] = SA8775_PIN_OFFSET, [38] = SA8775_PIN_OFFSET,
557 [39] = SA8775_PIN_OFFSET, [40] = SA8775_PIN_OFFSET, [41] = SA8775_PIN_OFFSET,
558 [42] = SA8775_PIN_OFFSET, [43] = SA8775_PIN_OFFSET, [44] = SA8775_PIN_OFFSET,
559 [45] = SA8775_PIN_OFFSET, [46] = SA8775_PIN_OFFSET, [47] = SA8775_PIN_OFFSET,
560 [48] = SA8775_PIN_OFFSET, [49] = SA8775_PIN_OFFSET, [50] = SA8775_PIN_OFFSET,
561 [51] = SA8775_PIN_OFFSET, [52] = SA8775_PIN_OFFSET, [53] = SA8775_PIN_OFFSET,
562 [54] = SA8775_PIN_OFFSET, [55] = SA8775_PIN_OFFSET, [56] = SA8775_PIN_OFFSET,
563 [57] = SA8775_PIN_OFFSET, [58] = SA8775_PIN_OFFSET, [59] = SA8775_PIN_OFFSET,
564 [60] = SA8775_PIN_OFFSET, [61] = SA8775_PIN_OFFSET, [62] = SA8775_PIN_OFFSET,
565 [63] = SA8775_PIN_OFFSET, [64] = SA8775_PIN_OFFSET, [65] = SA8775_PIN_OFFSET,
566 [66] = SA8775_PIN_OFFSET, [67] = SA8775_PIN_OFFSET, [68] = SA8775_PIN_OFFSET,
567 [69] = SA8775_PIN_OFFSET, [70] = SA8775_PIN_OFFSET, [71] = SA8775_PIN_OFFSET,
568 [72] = SA8775_PIN_OFFSET, [73] = SA8775_PIN_OFFSET, [74] = SA8775_PIN_OFFSET,
569 [75] = SA8775_PIN_OFFSET, [76] = SA8775_PIN_OFFSET, [77] = SA8775_PIN_OFFSET,
570 [78] = SA8775_PIN_OFFSET, [79] = SA8775_PIN_OFFSET, [80] = SA8775_PIN_OFFSET,
571 [81] = SA8775_PIN_OFFSET, [82] = SA8775_PIN_OFFSET, [83] = SA8775_PIN_OFFSET,
572 [84] = SA8775_PIN_OFFSET, [85] = SA8775_PIN_OFFSET, [86] = SA8775_PIN_OFFSET,
573 [87] = SA8775_PIN_OFFSET, [88] = SA8775_PIN_OFFSET, [89] = SA8775_PIN_OFFSET,
574 [90] = SA8775_PIN_OFFSET, [91] = SA8775_PIN_OFFSET, [92] = SA8775_PIN_OFFSET,
575 [93] = SA8775_PIN_OFFSET, [94] = SA8775_PIN_OFFSET, [95] = SA8775_PIN_OFFSET,
576 [96] = SA8775_PIN_OFFSET, [97] = SA8775_PIN_OFFSET, [98] = SA8775_PIN_OFFSET,
577 [99] = SA8775_PIN_OFFSET, [100] = SA8775_PIN_OFFSET, [101] = SA8775_PIN_OFFSET,
578 [102] = SA8775_PIN_OFFSET, [103] = SA8775_PIN_OFFSET, [104] = SA8775_PIN_OFFSET,
579 [105] = SA8775_PIN_OFFSET, [106] = SA8775_PIN_OFFSET, [107] = SA8775_PIN_OFFSET,
580 [108] = SA8775_PIN_OFFSET, [109] = SA8775_PIN_OFFSET, [110] = SA8775_PIN_OFFSET,
581 [111] = SA8775_PIN_OFFSET, [112] = SA8775_PIN_OFFSET, [113] = SA8775_PIN_OFFSET,
582 [114] = SA8775_PIN_OFFSET, [115] = SA8775_PIN_OFFSET, [116] = SA8775_PIN_OFFSET,
583 [117] = SA8775_PIN_OFFSET, [118] = SA8775_PIN_OFFSET, [119] = SA8775_PIN_OFFSET,
584 [120] = SA8775_PIN_OFFSET, [121] = SA8775_PIN_OFFSET, [122] = SA8775_PIN_OFFSET,
585 [123] = SA8775_PIN_OFFSET, [124] = SA8775_PIN_OFFSET, [125] = SA8775_PIN_OFFSET,
586 [126] = SA8775_PIN_OFFSET, [127] = SA8775_PIN_OFFSET, [128] = SA8775_PIN_OFFSET,
587 [129] = SA8775_PIN_OFFSET, [130] = SA8775_PIN_OFFSET, [131] = SA8775_PIN_OFFSET,
588 [132] = SA8775_PIN_OFFSET, [133] = SA8775_PIN_OFFSET, [134] = SA8775_PIN_OFFSET,
589 [135] = SA8775_PIN_OFFSET, [136] = SA8775_PIN_OFFSET, [137] = SA8775_PIN_OFFSET,
590 [138] = SA8775_PIN_OFFSET, [139] = SA8775_PIN_OFFSET, [140] = SA8775_PIN_OFFSET,
591 [141] = SA8775_PIN_OFFSET, [142] = SA8775_PIN_OFFSET, [143] = SA8775_PIN_OFFSET,
592 [144] = SA8775_PIN_OFFSET, [145] = SA8775_PIN_OFFSET, [146] = SA8775_PIN_OFFSET,
593 [147] = SA8775_PIN_OFFSET, [148] = SA8775_PIN_OFFSET, [148] = SA8775_PIN_OFFSET,
594 [149] = SA8775_PIN_OFFSET, [150] = SA8775_PIN_OFFSET, [151] = SA8775_PIN_OFFSET,
595 [152] = SA8775_PIN_OFFSET, [153] = SA8775_PIN_OFFSET, [154] = SA8775_PIN_OFFSET,
596};
597
598static const struct msm_pinctrl_data sa8775p_data = {
599 .pin_data = {
600 .pin_count = 155,
601 .special_pins_start = 149,
602 .special_pins_data = msm_special_pins_data,
603 .pin_offsets = sa8775p_pin_offsets,
604 },
605 .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
606 .get_function_name = sa8775p_get_function_name,
607 .get_function_mux = sa8775p_get_function_mux,
608 .get_pin_name = sa8775p_get_pin_name,
609};
610
611static const struct udevice_id msm_pinctrl_ids[] = {
612 { .compatible = "qcom,sa8775p-tlmm", .data = (ulong)&sa8775p_data },
613 { /* Sentinal */ }
614};
615
616U_BOOT_DRIVER(pinctrl_sa8775p) = {
617 .name = "pinctrl_sa8775p",
618 .id = UCLASS_NOP,
619 .of_match = msm_pinctrl_ids,
620 .ops = &msm_pinctrl_ops,
621 .bind = msm_pinctrl_bind,
622 .flags = DM_FLAG_PRE_RELOC,
623};