blob: d3d1b93947b5e7e346849863f5c76ca8f63334d8 [file] [log] [blame]
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001/*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002 * Overview:
3 * This is the generic MTD driver for NAND flash devices. It should be
4 * capable of working with almost all NAND chips currently available.
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02006 * Additional technical information is available on
Scott Wood3628f002008-10-24 16:20:43 -05007 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02008 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02009 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juul52c07962007-10-31 13:53:06 +010010 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020011 *
William Juul52c07962007-10-31 13:53:06 +010012 * Credits:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020013 * David Woodhouse for adding multichip support
14 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020015 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
16 * rework for 2K page size chips
17 *
William Juul52c07962007-10-31 13:53:06 +010018 * TODO:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020019 * Enable cached programming for 2k page size chips
20 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Sergey Lapin3a38a552013-01-14 03:46:50 +000021 * if we have HW ECC support.
Scott Wood3628f002008-10-24 16:20:43 -050022 * BBT table is not serialized, has to be fixed
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020023 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020024 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License version 2 as
26 * published by the Free Software Foundation.
27 *
28 */
29
Heiko Schocherf5895d12014-06-24 10:10:04 +020030#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Simon Glass0f2af882020-05-10 11:40:05 -060031#include <log.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020032#include <malloc.h>
33#include <watchdog.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070034#include <dm/devres.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060035#include <linux/bitops.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060036#include <linux/bug.h>
Simon Glassdbd79542020-05-10 11:40:11 -060037#include <linux/delay.h>
William Juul52c07962007-10-31 13:53:06 +010038#include <linux/err.h>
Mike Frysinger11d1a092012-04-09 13:39:55 +000039#include <linux/compat.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020040#include <linux/mtd/mtd.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090041#include <linux/mtd/rawnand.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020042#include <linux/mtd/nand_ecc.h>
Christian Hitz55f7bca2011-10-12 09:31:59 +020043#include <linux/mtd/nand_bch.h>
Stefan Roesefa252ea2009-04-24 15:58:33 +020044#ifdef CONFIG_MTD_PARTITIONS
45#include <linux/mtd/partitions.h>
46#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020047#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090048#include <linux/errno.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020049
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020050/* Define default oob placement schemes for large and small page devices */
Gregory CLEMENTe5b96312019-04-17 11:22:05 +020051#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
William Juul52c07962007-10-31 13:53:06 +010052static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020053 .eccbytes = 3,
54 .eccpos = {0, 1, 2},
William Juul52c07962007-10-31 13:53:06 +010055 .oobfree = {
56 {.offset = 3,
57 .length = 2},
58 {.offset = 6,
Christian Hitz13fc0e22011-10-12 09:32:01 +020059 .length = 2} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020060};
61
William Juul52c07962007-10-31 13:53:06 +010062static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020063 .eccbytes = 6,
64 .eccpos = {0, 1, 2, 3, 6, 7},
William Juul52c07962007-10-31 13:53:06 +010065 .oobfree = {
66 {.offset = 8,
Christian Hitz13fc0e22011-10-12 09:32:01 +020067 . length = 8} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020068};
69
William Juul52c07962007-10-31 13:53:06 +010070static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020071 .eccbytes = 24,
72 .eccpos = {
William Juul52c07962007-10-31 13:53:06 +010073 40, 41, 42, 43, 44, 45, 46, 47,
74 48, 49, 50, 51, 52, 53, 54, 55,
75 56, 57, 58, 59, 60, 61, 62, 63},
76 .oobfree = {
77 {.offset = 2,
Christian Hitz13fc0e22011-10-12 09:32:01 +020078 .length = 38} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020079};
80
William Juul52c07962007-10-31 13:53:06 +010081static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov04fbaa02008-06-06 15:42:43 +020082 .eccbytes = 48,
83 .eccpos = {
Christian Hitz13fc0e22011-10-12 09:32:01 +020084 80, 81, 82, 83, 84, 85, 86, 87,
85 88, 89, 90, 91, 92, 93, 94, 95,
86 96, 97, 98, 99, 100, 101, 102, 103,
William Juul52c07962007-10-31 13:53:06 +010087 104, 105, 106, 107, 108, 109, 110, 111,
88 112, 113, 114, 115, 116, 117, 118, 119,
89 120, 121, 122, 123, 124, 125, 126, 127},
90 .oobfree = {
91 {.offset = 2,
Christian Hitz13fc0e22011-10-12 09:32:01 +020092 .length = 78} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020093};
Stefan Agnerbd186142018-12-06 14:57:09 +010094#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020095
Heiko Schocherf5895d12014-06-24 10:10:04 +020096static int nand_get_device(struct mtd_info *mtd, int new_state);
William Juul52c07962007-10-31 13:53:06 +010097
98static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
99 struct mtd_oob_ops *ops);
100
Heiko Schocherf5895d12014-06-24 10:10:04 +0200101/*
102 * For devices which display every fart in the system on a separate LED. Is
103 * compiled away when LED support is disabled.
104 */
105DEFINE_LED_TRIGGER(nand_led_trigger);
Sergei Poselenov04fbaa02008-06-06 15:42:43 +0200106
Christian Hitzb8a6b372011-10-12 09:32:02 +0200107static int check_offs_len(struct mtd_info *mtd,
108 loff_t ofs, uint64_t len)
109{
Scott Wood17fed142016-05-30 13:57:56 -0500110 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200111 int ret = 0;
112
113 /* Start address must align on block boundary */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200114 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
115 pr_debug("%s: unaligned address\n", __func__);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200116 ret = -EINVAL;
117 }
118
119 /* Length must align on block boundary */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200120 if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
121 pr_debug("%s: length not block aligned\n", __func__);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200122 ret = -EINVAL;
123 }
124
Christian Hitzb8a6b372011-10-12 09:32:02 +0200125 return ret;
126}
127
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200128/**
129 * nand_release_device - [GENERIC] release chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000130 * @mtd: MTD device structure
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200131 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200132 * Release chip lock and wake up anyone waiting on the device.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200133 */
Christian Hitz13fc0e22011-10-12 09:32:01 +0200134static void nand_release_device(struct mtd_info *mtd)
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100135{
Scott Wood17fed142016-05-30 13:57:56 -0500136 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200137
138 /* De-select the NAND device */
139 chip->select_chip(mtd, -1);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100140}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200141
142/**
143 * nand_read_byte - [DEFAULT] read one byte from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000144 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200145 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200146 * Default read function for 8bit buswidth
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200147 */
Simon Schwarz5a9fc192011-10-31 06:34:44 +0000148uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200149{
Scott Wood17fed142016-05-30 13:57:56 -0500150 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100151 return readb(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200152}
153
154/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200155 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000156 * @mtd: MTD device structure
157 *
158 * Default read function for 16bit buswidth with endianness conversion.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200159 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200160 */
William Juul52c07962007-10-31 13:53:06 +0100161static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200162{
Scott Wood17fed142016-05-30 13:57:56 -0500163 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100164 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200165}
166
167/**
168 * nand_read_word - [DEFAULT] read one word from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000169 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200170 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000171 * Default read function for 16bit buswidth without endianness conversion.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200172 */
173static u16 nand_read_word(struct mtd_info *mtd)
174{
Scott Wood17fed142016-05-30 13:57:56 -0500175 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100176 return readw(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200177}
178
179/**
180 * nand_select_chip - [DEFAULT] control CE line
Sergey Lapin3a38a552013-01-14 03:46:50 +0000181 * @mtd: MTD device structure
182 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200183 *
184 * Default select function for 1 chip devices.
185 */
William Juul52c07962007-10-31 13:53:06 +0100186static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200187{
Scott Wood17fed142016-05-30 13:57:56 -0500188 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100189
190 switch (chipnr) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200191 case -1:
William Juul52c07962007-10-31 13:53:06 +0100192 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200193 break;
194 case 0:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200195 break;
196
197 default:
198 BUG();
199 }
200}
201
202/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200203 * nand_write_byte - [DEFAULT] write single byte to chip
204 * @mtd: MTD device structure
205 * @byte: value to write
206 *
207 * Default function to write a byte to I/O[7:0]
208 */
209static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)
210{
Scott Wood17fed142016-05-30 13:57:56 -0500211 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200212
213 chip->write_buf(mtd, &byte, 1);
214}
215
216/**
217 * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16
218 * @mtd: MTD device structure
219 * @byte: value to write
220 *
221 * Default function to write a byte to I/O[7:0] on a 16-bit wide chip.
222 */
223static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)
224{
Scott Wood17fed142016-05-30 13:57:56 -0500225 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200226 uint16_t word = byte;
227
228 /*
229 * It's not entirely clear what should happen to I/O[15:8] when writing
230 * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:
231 *
232 * When the host supports a 16-bit bus width, only data is
233 * transferred at the 16-bit width. All address and command line
234 * transfers shall use only the lower 8-bits of the data bus. During
235 * command transfers, the host may place any value on the upper
236 * 8-bits of the data bus. During address transfers, the host shall
237 * set the upper 8-bits of the data bus to 00h.
238 *
239 * One user of the write_byte callback is nand_onfi_set_features. The
240 * four parameters are specified to be written to I/O[7:0], but this is
241 * neither an address nor a command transfer. Let's assume a 0 on the
242 * upper I/O lines is OK.
243 */
244 chip->write_buf(mtd, (uint8_t *)&word, 2);
245}
246
Heiko Schocherf5895d12014-06-24 10:10:04 +0200247/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200248 * nand_write_buf - [DEFAULT] write buffer to chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000249 * @mtd: MTD device structure
250 * @buf: data buffer
251 * @len: number of bytes to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200252 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000253 * Default write function for 8bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200254 */
Simon Schwarz5a9fc192011-10-31 06:34:44 +0000255void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200256{
Scott Wood17fed142016-05-30 13:57:56 -0500257 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200258
Heiko Schocherf5895d12014-06-24 10:10:04 +0200259 iowrite8_rep(chip->IO_ADDR_W, buf, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200260}
261
262/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200263 * nand_read_buf - [DEFAULT] read chip data into buffer
Sergey Lapin3a38a552013-01-14 03:46:50 +0000264 * @mtd: MTD device structure
265 * @buf: buffer to store date
266 * @len: number of bytes to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200267 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000268 * Default read function for 8bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200269 */
Simon Schwarz4f62e982011-09-14 15:30:16 -0400270void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200271{
Scott Wood17fed142016-05-30 13:57:56 -0500272 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200273
Heiko Schocherf5895d12014-06-24 10:10:04 +0200274 ioread8_rep(chip->IO_ADDR_R, buf, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200275}
276
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200277/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200278 * nand_write_buf16 - [DEFAULT] write buffer to chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000279 * @mtd: MTD device structure
Heiko Schocherf5895d12014-06-24 10:10:04 +0200280 * @buf: data buffer
281 * @len: number of bytes to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200282 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200283 * Default write function for 16bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200284 */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200285void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200286{
Scott Wood17fed142016-05-30 13:57:56 -0500287 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200288 u16 *p = (u16 *) buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200289
Heiko Schocherf5895d12014-06-24 10:10:04 +0200290 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200291}
292
293/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200294 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Sergey Lapin3a38a552013-01-14 03:46:50 +0000295 * @mtd: MTD device structure
Heiko Schocherf5895d12014-06-24 10:10:04 +0200296 * @buf: buffer to store date
297 * @len: number of bytes to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200298 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200299 * Default read function for 16bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200300 */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200301void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200302{
Scott Wood17fed142016-05-30 13:57:56 -0500303 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200304 u16 *p = (u16 *) buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200305
Heiko Schocherf5895d12014-06-24 10:10:04 +0200306 ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200307}
308
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800309/*
310 * nand_bbm_get_next_page - Get the next page for bad block markers
311 * @chip: The NAND chip
312 * @page: First page to start checking for bad block marker usage
313 *
314 * Returns an integer that corresponds to the page offset within a block, for
315 * a page that is used to store bad block markers. If no more pages are
316 * available, -EINVAL is returned.
317 */
318int nand_bbm_get_next_page(struct nand_chip *chip, int page)
319{
320 struct mtd_info *mtd = nand_to_mtd(chip);
321 int last_page = ((mtd->erasesize - mtd->writesize) >>
322 chip->page_shift) & chip->pagemask;
323 unsigned int bbm_flags = NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE
324 | NAND_BBM_LASTPAGE;
325
326 if (page == 0 && !(chip->options & bbm_flags))
327 return 0;
328 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE)
329 return 0;
330 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE)
331 return 1;
332 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE)
333 return last_page;
334
335 return -EINVAL;
336}
337
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200338/**
339 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000340 * @mtd: MTD device structure
341 * @ofs: offset from device start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200342 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200343 * Check, if the block is bad.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200344 */
Scott Wood52ab7ce2016-05-30 13:57:58 -0500345static int nand_block_bad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200346{
Scott Wood17fed142016-05-30 13:57:56 -0500347 struct nand_chip *chip = mtd_to_nand(mtd);
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800348 int first_page, page_offset;
349 int res;
350 u8 bad;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200351
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800352 first_page = (int)(ofs >> chip->page_shift) & chip->pagemask;
353 page_offset = nand_bbm_get_next_page(chip, 0);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200354
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800355 while (page_offset >= 0) {
356 res = chip->ecc.read_oob(mtd, chip, first_page + page_offset);
357 if (res < 0)
358 return res;
Thomas Knobloch9e2aeaf2007-05-05 07:04:42 +0200359
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800360 bad = chip->oob_poi[chip->badblockpos];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200361
Sergey Lapin3a38a552013-01-14 03:46:50 +0000362 if (likely(chip->badblockbits == 8))
363 res = bad != 0xFF;
364 else
365 res = hweight8(bad) < chip->badblockbits;
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800366 if (res)
367 return res;
368
369 page_offset = nand_bbm_get_next_page(chip, page_offset + 1);
370 }
Christian Hitzb8a6b372011-10-12 09:32:02 +0200371
Dinesh Maniyamad2868f2025-02-27 00:18:28 +0800372 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200373}
374
375/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200376 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
Sergey Lapin3a38a552013-01-14 03:46:50 +0000377 * @mtd: MTD device structure
378 * @ofs: offset from device start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200379 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000380 * This is the default implementation, which can be overridden by a hardware
Heiko Schocherf5895d12014-06-24 10:10:04 +0200381 * specific driver. It provides the details for writing a bad block marker to a
382 * block.
383 */
384static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
385{
Scott Wood17fed142016-05-30 13:57:56 -0500386 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200387 struct mtd_oob_ops ops;
388 uint8_t buf[2] = { 0, 0 };
389 int ret = 0, res, i = 0;
390
Scott Wood3ea94ed2015-06-26 19:03:26 -0500391 memset(&ops, 0, sizeof(ops));
Heiko Schocherf5895d12014-06-24 10:10:04 +0200392 ops.oobbuf = buf;
393 ops.ooboffs = chip->badblockpos;
394 if (chip->options & NAND_BUSWIDTH_16) {
395 ops.ooboffs &= ~0x01;
396 ops.len = ops.ooblen = 2;
397 } else {
398 ops.len = ops.ooblen = 1;
399 }
400 ops.mode = MTD_OPS_PLACE_OOB;
401
402 /* Write to first/last page(s) if necessary */
403 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
404 ofs += mtd->erasesize - mtd->writesize;
405 do {
406 res = nand_do_write_oob(mtd, ofs, &ops);
407 if (!ret)
408 ret = res;
409
410 i++;
411 ofs += mtd->writesize;
412 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
413
414 return ret;
415}
416
417/**
418 * nand_block_markbad_lowlevel - mark a block bad
419 * @mtd: MTD device structure
420 * @ofs: offset from device start
421 *
422 * This function performs the generic NAND bad block marking steps (i.e., bad
423 * block table(s) and/or marker(s)). We only allow the hardware driver to
424 * specify how to write bad block markers to OOB (chip->block_markbad).
425 *
426 * We try operations in the following order:
Sergey Lapin3a38a552013-01-14 03:46:50 +0000427 * (1) erase the affected block, to allow OOB marker to be written cleanly
Heiko Schocherf5895d12014-06-24 10:10:04 +0200428 * (2) write bad block marker to OOB area of affected block (unless flag
429 * NAND_BBT_NO_OOB_BBM is present)
430 * (3) update the BBT
431 * Note that we retain the first error encountered in (2) or (3), finish the
Sergey Lapin3a38a552013-01-14 03:46:50 +0000432 * procedures, and dump the error in the end.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200433*/
Heiko Schocherf5895d12014-06-24 10:10:04 +0200434static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200435{
Scott Wood17fed142016-05-30 13:57:56 -0500436 struct nand_chip *chip = mtd_to_nand(mtd);
Roger Quadrosb590f612022-12-20 12:21:57 +0200437 int ret = 0;
Simon Glass7ec24132024-09-29 19:49:48 -0600438#ifndef CONFIG_XPL_BUILD
Roger Quadrosb590f612022-12-20 12:21:57 +0200439 int res;
440#endif
Christian Hitzb8a6b372011-10-12 09:32:02 +0200441
Heiko Schocherf5895d12014-06-24 10:10:04 +0200442 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
Sergey Lapin3a38a552013-01-14 03:46:50 +0000443 struct erase_info einfo;
444
445 /* Attempt erase before marking OOB */
446 memset(&einfo, 0, sizeof(einfo));
447 einfo.mtd = mtd;
448 einfo.addr = ofs;
Heiko Schocherf5895d12014-06-24 10:10:04 +0200449 einfo.len = 1ULL << chip->phys_erase_shift;
Sergey Lapin3a38a552013-01-14 03:46:50 +0000450 nand_erase_nand(mtd, &einfo, 0);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200451
Heiko Schocherf5895d12014-06-24 10:10:04 +0200452 /* Write bad block marker to OOB */
453 nand_get_device(mtd, FL_WRITING);
454 ret = chip->block_markbad(mtd, ofs);
Scott Wood3628f002008-10-24 16:20:43 -0500455 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +0100456 }
Sergey Lapin3a38a552013-01-14 03:46:50 +0000457
Simon Glass7ec24132024-09-29 19:49:48 -0600458#ifndef CONFIG_XPL_BUILD
Heiko Schocherf5895d12014-06-24 10:10:04 +0200459 /* Mark block bad in BBT */
460 if (chip->bbt) {
461 res = nand_markbad_bbt(mtd, ofs);
Sergey Lapin3a38a552013-01-14 03:46:50 +0000462 if (!ret)
463 ret = res;
464 }
Roger Quadrosb590f612022-12-20 12:21:57 +0200465#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +0000466
William Juul52c07962007-10-31 13:53:06 +0100467 if (!ret)
468 mtd->ecc_stats.badblocks++;
Scott Wood3628f002008-10-24 16:20:43 -0500469
William Juul52c07962007-10-31 13:53:06 +0100470 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200471}
472
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200473/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200474 * nand_check_wp - [GENERIC] check if the chip is write protected
Sergey Lapin3a38a552013-01-14 03:46:50 +0000475 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200476 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000477 * Check, if the device is write protected. The function expects, that the
478 * device is already selected.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200479 */
William Juul52c07962007-10-31 13:53:06 +0100480static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200481{
Scott Wood17fed142016-05-30 13:57:56 -0500482 struct nand_chip *chip = mtd_to_nand(mtd);
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100483 u8 status;
484 int ret;
Christian Hitzb8a6b372011-10-12 09:32:02 +0200485
Sergey Lapin3a38a552013-01-14 03:46:50 +0000486 /* Broken xD cards report WP despite being writable */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200487 if (chip->options & NAND_BROKEN_XD)
488 return 0;
489
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200490 /* Check the WP bit */
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100491 ret = nand_status_op(chip, &status);
492 if (ret)
493 return ret;
494
495 return status & NAND_STATUS_WP ? 0 : 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200496}
Markus Klotzbücher27eba142006-03-06 15:04:25 +0100497
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200498/**
Scott Wood3ea94ed2015-06-26 19:03:26 -0500499 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
Sergey Lapin3a38a552013-01-14 03:46:50 +0000500 * @mtd: MTD device structure
501 * @ofs: offset from device start
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300502 *
Scott Wood3ea94ed2015-06-26 19:03:26 -0500503 * Check if the block is marked as reserved.
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300504 */
505static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs)
506{
Scott Wood17fed142016-05-30 13:57:56 -0500507 struct nand_chip *chip = mtd_to_nand(mtd);
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300508
509 if (!chip->bbt)
510 return 0;
511 /* Return info from the table */
Simon Glass7ec24132024-09-29 19:49:48 -0600512#ifndef CONFIG_XPL_BUILD
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300513 return nand_isreserved_bbt(mtd, ofs);
Roger Quadrosb590f612022-12-20 12:21:57 +0200514#else
515 return 0;
516#endif
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300517}
518
519/**
520 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
521 * @mtd: MTD device structure
522 * @ofs: offset from device start
Sergey Lapin3a38a552013-01-14 03:46:50 +0000523 * @allowbbt: 1, if its allowed to access the bbt area
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200524 *
525 * Check, if the block is bad. Either by reading the bad block table or
526 * calling of the scan function.
527 */
Scott Wood52ab7ce2016-05-30 13:57:58 -0500528static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200529{
Scott Wood17fed142016-05-30 13:57:56 -0500530 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200531
Masahiro Yamada8d100542014-12-26 22:20:58 +0900532 if (!(chip->options & NAND_SKIP_BBTSCAN) &&
533 !(chip->options & NAND_BBT_SCANNED)) {
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +0200534 chip->options |= NAND_BBT_SCANNED;
Masahiro Yamada8c6c14a2014-12-26 22:20:57 +0900535 chip->scan_bbt(mtd);
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +0200536 }
537
William Juul52c07962007-10-31 13:53:06 +0100538 if (!chip->bbt)
Scott Wood52ab7ce2016-05-30 13:57:58 -0500539 return chip->block_bad(mtd, ofs);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200540
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200541 /* Return info from the table */
Simon Glass7ec24132024-09-29 19:49:48 -0600542#ifndef CONFIG_XPL_BUILD
William Juul52c07962007-10-31 13:53:06 +0100543 return nand_isbad_bbt(mtd, ofs, allowbbt);
Roger Quadrosb590f612022-12-20 12:21:57 +0200544#else
545 return 0;
546#endif
William Juul52c07962007-10-31 13:53:06 +0100547}
Heiko Schocherf5895d12014-06-24 10:10:04 +0200548
Scott Wood52ab7ce2016-05-30 13:57:58 -0500549/**
550 * nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
551 * @mtd: MTD device structure
552 *
553 * Wait for the ready pin after a command, and warn if a timeout occurs.
554 */
William Juul52c07962007-10-31 13:53:06 +0100555void nand_wait_ready(struct mtd_info *mtd)
556{
Scott Wood17fed142016-05-30 13:57:56 -0500557 struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood52ab7ce2016-05-30 13:57:58 -0500558 u32 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000559 u32 time_start;
Stefan Roesea5c312c2008-01-05 16:43:25 +0100560
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000561 time_start = get_timer(0);
Sergey Lapin3a38a552013-01-14 03:46:50 +0000562 /* Wait until command is processed or timeout occurs */
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000563 while (get_timer(time_start) < timeo) {
Stefan Roesea5c312c2008-01-05 16:43:25 +0100564 if (chip->dev_ready)
565 if (chip->dev_ready(mtd))
566 break;
567 }
Scott Wood52ab7ce2016-05-30 13:57:58 -0500568
569 if (!chip->dev_ready(mtd))
570 pr_warn("timeout while waiting for chip to become ready\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200571}
Heiko Schocherf5895d12014-06-24 10:10:04 +0200572EXPORT_SYMBOL_GPL(nand_wait_ready);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200573
574/**
Scott Wood3ea94ed2015-06-26 19:03:26 -0500575 * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.
576 * @mtd: MTD device structure
577 * @timeo: Timeout in ms
578 *
579 * Wait for status ready (i.e. command done) or timeout.
580 */
581static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
582{
Scott Wood17fed142016-05-30 13:57:56 -0500583 register struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500584 u32 time_start;
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100585 int ret;
Scott Wood3ea94ed2015-06-26 19:03:26 -0500586
587 timeo = (CONFIG_SYS_HZ * timeo) / 1000;
588 time_start = get_timer(0);
589 while (get_timer(time_start) < timeo) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100590 u8 status;
591
592 ret = nand_read_data_op(chip, &status, sizeof(status), true);
593 if (ret)
594 return;
595
596 if (status & NAND_STATUS_READY)
Scott Wood3ea94ed2015-06-26 19:03:26 -0500597 break;
Stefan Roese80877fa2022-09-02 14:10:46 +0200598 schedule();
Scott Wood3ea94ed2015-06-26 19:03:26 -0500599 }
600};
601
602/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200603 * nand_command - [DEFAULT] Send command to NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +0000604 * @mtd: MTD device structure
605 * @command: the command to be sent
606 * @column: the column address for this command, -1 if none
607 * @page_addr: the page address for this command, -1 if none
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200608 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000609 * Send command to NAND device. This function is used for small page devices
Heiko Schocherf5895d12014-06-24 10:10:04 +0200610 * (512 Bytes per page).
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200611 */
William Juul52c07962007-10-31 13:53:06 +0100612static void nand_command(struct mtd_info *mtd, unsigned int command,
613 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200614{
Scott Wood17fed142016-05-30 13:57:56 -0500615 register struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100616 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200617
Sergey Lapin3a38a552013-01-14 03:46:50 +0000618 /* Write out the command to the device */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200619 if (command == NAND_CMD_SEQIN) {
620 int readcmd;
621
William Juul52c07962007-10-31 13:53:06 +0100622 if (column >= mtd->writesize) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200623 /* OOB area */
William Juul52c07962007-10-31 13:53:06 +0100624 column -= mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200625 readcmd = NAND_CMD_READOOB;
626 } else if (column < 256) {
627 /* First 256 bytes --> READ0 */
628 readcmd = NAND_CMD_READ0;
629 } else {
630 column -= 256;
631 readcmd = NAND_CMD_READ1;
632 }
William Juul52c07962007-10-31 13:53:06 +0100633 chip->cmd_ctrl(mtd, readcmd, ctrl);
634 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200635 }
William Juul52c07962007-10-31 13:53:06 +0100636 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200637
Sergey Lapin3a38a552013-01-14 03:46:50 +0000638 /* Address cycle, when necessary */
William Juul52c07962007-10-31 13:53:06 +0100639 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
640 /* Serially input address */
641 if (column != -1) {
642 /* Adjust columns for 16 bit buswidth */
Heiko Schocher081fe9e2014-07-15 16:08:43 +0200643 if (chip->options & NAND_BUSWIDTH_16 &&
Brian Norris67675222014-05-06 00:46:17 +0530644 !nand_opcode_8bits(command))
William Juul52c07962007-10-31 13:53:06 +0100645 column >>= 1;
646 chip->cmd_ctrl(mtd, column, ctrl);
647 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200648 }
William Juul52c07962007-10-31 13:53:06 +0100649 if (page_addr != -1) {
650 chip->cmd_ctrl(mtd, page_addr, ctrl);
651 ctrl &= ~NAND_CTRL_CHANGE;
652 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Masahiro Yamada984926b2017-11-22 02:38:31 +0900653 if (chip->options & NAND_ROW_ADDR_3)
William Juul52c07962007-10-31 13:53:06 +0100654 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
655 }
656 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200657
658 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +0000659 * Program and erase have their own busy handlers status and sequential
660 * in needs no delay
William Juul52c07962007-10-31 13:53:06 +0100661 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200662 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200663
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200664 case NAND_CMD_PAGEPROG:
665 case NAND_CMD_ERASE1:
666 case NAND_CMD_ERASE2:
667 case NAND_CMD_SEQIN:
668 case NAND_CMD_STATUS:
Masahiro Yamada7f9baa12017-09-15 21:44:58 +0900669 case NAND_CMD_READID:
Masahiro Yamada0cd10182017-09-15 21:44:59 +0900670 case NAND_CMD_SET_FEATURES:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200671 return;
672
673 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100674 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200675 break;
William Juul52c07962007-10-31 13:53:06 +0100676 udelay(chip->chip_delay);
677 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
678 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
679 chip->cmd_ctrl(mtd,
680 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500681 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
682 nand_wait_status_ready(mtd, 250);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200683 return;
684
William Juul52c07962007-10-31 13:53:06 +0100685 /* This applies to read commands */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200686 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200687 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200688 * If we don't have access to the busy pin, we apply the given
689 * command delay
William Juul52c07962007-10-31 13:53:06 +0100690 */
691 if (!chip->dev_ready) {
692 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200693 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200694 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200695 }
Sergey Lapin3a38a552013-01-14 03:46:50 +0000696 /*
697 * Apply this short delay always to ensure that we do wait tWB in
698 * any case on any machine.
699 */
William Juul52c07962007-10-31 13:53:06 +0100700 ndelay(100);
701
702 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200703}
704
705/**
706 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Sergey Lapin3a38a552013-01-14 03:46:50 +0000707 * @mtd: MTD device structure
708 * @command: the command to be sent
709 * @column: the column address for this command, -1 if none
710 * @page_addr: the page address for this command, -1 if none
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200711 *
William Juul52c07962007-10-31 13:53:06 +0100712 * Send command to NAND device. This is the version for the new large page
Sergey Lapin3a38a552013-01-14 03:46:50 +0000713 * devices. We don't have the separate regions as we have in the small page
714 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200715 */
William Juul52c07962007-10-31 13:53:06 +0100716static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
717 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200718{
Scott Wood17fed142016-05-30 13:57:56 -0500719 register struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200720
721 /* Emulate NAND_CMD_READOOB */
722 if (command == NAND_CMD_READOOB) {
William Juul52c07962007-10-31 13:53:06 +0100723 column += mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200724 command = NAND_CMD_READ0;
725 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200726
William Juul52c07962007-10-31 13:53:06 +0100727 /* Command latch cycle */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200728 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200729
730 if (column != -1 || page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100731 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200732
733 /* Serially input address */
734 if (column != -1) {
735 /* Adjust columns for 16 bit buswidth */
Heiko Schocher081fe9e2014-07-15 16:08:43 +0200736 if (chip->options & NAND_BUSWIDTH_16 &&
Brian Norris67675222014-05-06 00:46:17 +0530737 !nand_opcode_8bits(command))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200738 column >>= 1;
William Juul52c07962007-10-31 13:53:06 +0100739 chip->cmd_ctrl(mtd, column, ctrl);
740 ctrl &= ~NAND_CTRL_CHANGE;
741 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200742 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200743 if (page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100744 chip->cmd_ctrl(mtd, page_addr, ctrl);
745 chip->cmd_ctrl(mtd, page_addr >> 8,
746 NAND_NCE | NAND_ALE);
Masahiro Yamada984926b2017-11-22 02:38:31 +0900747 if (chip->options & NAND_ROW_ADDR_3)
William Juul52c07962007-10-31 13:53:06 +0100748 chip->cmd_ctrl(mtd, page_addr >> 16,
749 NAND_NCE | NAND_ALE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200750 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200751 }
William Juul52c07962007-10-31 13:53:06 +0100752 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200753
754 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +0000755 * Program and erase have their own busy handlers status, sequential
Scott Wood3ea94ed2015-06-26 19:03:26 -0500756 * in and status need no delay.
William Juul52c07962007-10-31 13:53:06 +0100757 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200758 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200759
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200760 case NAND_CMD_CACHEDPROG:
761 case NAND_CMD_PAGEPROG:
762 case NAND_CMD_ERASE1:
763 case NAND_CMD_ERASE2:
764 case NAND_CMD_SEQIN:
William Juul52c07962007-10-31 13:53:06 +0100765 case NAND_CMD_RNDIN:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200766 case NAND_CMD_STATUS:
Masahiro Yamada7f9baa12017-09-15 21:44:58 +0900767 case NAND_CMD_READID:
Masahiro Yamada0cd10182017-09-15 21:44:59 +0900768 case NAND_CMD_SET_FEATURES:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200769 return;
770
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200771 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100772 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200773 break;
William Juul52c07962007-10-31 13:53:06 +0100774 udelay(chip->chip_delay);
775 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
776 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
777 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
778 NAND_NCE | NAND_CTRL_CHANGE);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500779 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
780 nand_wait_status_ready(mtd, 250);
William Juul52c07962007-10-31 13:53:06 +0100781 return;
782
783 case NAND_CMD_RNDOUT:
784 /* No ready / busy check necessary */
785 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
786 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
787 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
788 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200789 return;
790
791 case NAND_CMD_READ0:
William Juul52c07962007-10-31 13:53:06 +0100792 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
793 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
794 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
795 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200796
William Juul52c07962007-10-31 13:53:06 +0100797 /* This applies to read commands */
Andre Przywaraa50e5c62025-03-27 15:33:10 +0000798 fallthrough;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200799 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200800 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200801 * If we don't have access to the busy pin, we apply the given
Sergey Lapin3a38a552013-01-14 03:46:50 +0000802 * command delay.
William Juul52c07962007-10-31 13:53:06 +0100803 */
804 if (!chip->dev_ready) {
805 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200806 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200807 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200808 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200809
Sergey Lapin3a38a552013-01-14 03:46:50 +0000810 /*
811 * Apply this short delay always to ensure that we do wait tWB in
812 * any case on any machine.
813 */
William Juul52c07962007-10-31 13:53:06 +0100814 ndelay(100);
815
816 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200817}
818
819/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200820 * panic_nand_get_device - [GENERIC] Get chip for selected access
Sergey Lapin3a38a552013-01-14 03:46:50 +0000821 * @chip: the nand chip descriptor
822 * @mtd: MTD device structure
823 * @new_state: the state which is requested
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200824 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200825 * Used when in panic, no locks are taken.
826 */
827static void panic_nand_get_device(struct nand_chip *chip,
828 struct mtd_info *mtd, int new_state)
829{
830 /* Hardware controller shared among independent devices */
831 chip->controller->active = chip;
832 chip->state = new_state;
833}
834
835/**
836 * nand_get_device - [GENERIC] Get chip for selected access
837 * @mtd: MTD device structure
838 * @new_state: the state which is requested
839 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200840 * Get the device and lock it for exclusive access
841 */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200842static int
Heiko Schocherf5895d12014-06-24 10:10:04 +0200843nand_get_device(struct mtd_info *mtd, int new_state)
William Juul52c07962007-10-31 13:53:06 +0100844{
Scott Wood17fed142016-05-30 13:57:56 -0500845 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200846 chip->state = new_state;
William Juul52c07962007-10-31 13:53:06 +0100847 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +0200848}
849
850/**
851 * panic_nand_wait - [GENERIC] wait until the command is done
852 * @mtd: MTD device structure
853 * @chip: NAND chip structure
854 * @timeo: timeout
855 *
856 * Wait for command done. This is a helper function for nand_wait used when
857 * we are in interrupt context. May happen when in panic and trying to write
858 * an oops through mtdoops.
859 */
860static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
861 unsigned long timeo)
862{
863 int i;
864 for (i = 0; i < timeo; i++) {
865 if (chip->dev_ready) {
866 if (chip->dev_ready(mtd))
867 break;
868 } else {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100869 int ret;
870 u8 status;
871
872 ret = nand_read_data_op(chip, &status, sizeof(status),
873 true);
874 if (ret)
875 return;
876
877 if (status & NAND_STATUS_READY)
Heiko Schocherf5895d12014-06-24 10:10:04 +0200878 break;
879 }
880 mdelay(1);
881 }
William Juul52c07962007-10-31 13:53:06 +0100882}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200883
884/**
Sergey Lapin3a38a552013-01-14 03:46:50 +0000885 * nand_wait - [DEFAULT] wait until the command is done
886 * @mtd: MTD device structure
887 * @chip: NAND chip structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200888 *
Scott Wood52ab7ce2016-05-30 13:57:58 -0500889 * Wait for command done. This applies to erase and program only.
William Juul52c07962007-10-31 13:53:06 +0100890 */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200891static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200892{
Scott Wood52ab7ce2016-05-30 13:57:58 -0500893 unsigned long timeo = 400;
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100894 u8 status;
895 int ret;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100896
Heiko Schocherf5895d12014-06-24 10:10:04 +0200897 led_trigger_event(nand_led_trigger, LED_FULL);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100898
Heiko Schocherf5895d12014-06-24 10:10:04 +0200899 /*
900 * Apply this short delay always to ensure that we do wait tWB in any
901 * case on any machine.
902 */
903 ndelay(100);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100904
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100905 ret = nand_status_op(chip, NULL);
906 if (ret)
907 return ret;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100908
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200909 u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;
910 u32 time_start;
Wolfgang Denk9d328a62021-09-27 17:42:38 +0200911
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200912 time_start = get_timer(0);
913 while (get_timer(time_start) < timer) {
Christian Hitzb8a6b372011-10-12 09:32:02 +0200914 if (chip->dev_ready) {
915 if (chip->dev_ready(mtd))
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100916 break;
917 } else {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100918 ret = nand_read_data_op(chip, &status,
919 sizeof(status), true);
920 if (ret)
921 return ret;
922
923 if (status & NAND_STATUS_READY)
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100924 break;
925 }
926 }
Heiko Schocherf5895d12014-06-24 10:10:04 +0200927 led_trigger_event(nand_led_trigger, LED_OFF);
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100928
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100929 ret = nand_read_data_op(chip, &status, sizeof(status), true);
930 if (ret)
931 return ret;
932
Heiko Schocherf5895d12014-06-24 10:10:04 +0200933 /* This can happen if in case of timeout or buggy dev_ready */
934 WARN_ON(!(status & NAND_STATUS_READY));
935 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200936}
Scott Wood52ab7ce2016-05-30 13:57:58 -0500937
Scott Wood52ab7ce2016-05-30 13:57:58 -0500938/**
Boris Brezillone509cba2017-11-22 02:38:19 +0900939 * nand_reset_data_interface - Reset data interface and timings
940 * @chip: The NAND chip
Boris Brezillon32935f42017-11-22 02:38:28 +0900941 * @chipnr: Internal die id
Boris Brezillone509cba2017-11-22 02:38:19 +0900942 *
943 * Reset the Data interface and timings to ONFI mode 0.
944 *
945 * Returns 0 for success or negative error code otherwise.
946 */
Boris Brezillon32935f42017-11-22 02:38:28 +0900947static int nand_reset_data_interface(struct nand_chip *chip, int chipnr)
Boris Brezillone509cba2017-11-22 02:38:19 +0900948{
949 struct mtd_info *mtd = nand_to_mtd(chip);
950 const struct nand_data_interface *conf;
951 int ret;
952
953 if (!chip->setup_data_interface)
954 return 0;
955
956 /*
957 * The ONFI specification says:
958 * "
959 * To transition from NV-DDR or NV-DDR2 to the SDR data
960 * interface, the host shall use the Reset (FFh) command
961 * using SDR timing mode 0. A device in any timing mode is
962 * required to recognize Reset (FFh) command issued in SDR
963 * timing mode 0.
964 * "
965 *
966 * Configure the data interface in SDR mode and set the
967 * timings to timing mode 0.
968 */
969
970 conf = nand_get_default_data_interface();
Boris Brezillon32935f42017-11-22 02:38:28 +0900971 ret = chip->setup_data_interface(mtd, chipnr, conf);
Boris Brezillone509cba2017-11-22 02:38:19 +0900972 if (ret)
973 pr_err("Failed to configure data interface to SDR timing mode 0\n");
974
975 return ret;
976}
977
Kory Maincent0cda0cb2022-06-22 11:11:45 +0200978static int nand_onfi_set_timings(struct mtd_info *mtd, struct nand_chip *chip)
979{
980 if (!chip->onfi_version ||
981 !(le16_to_cpu(chip->onfi_params.opt_cmd)
982 & ONFI_OPT_CMD_SET_GET_FEATURES))
983 return 0;
984
985 u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
986 chip->onfi_timing_mode_default,
987 };
988
989 return chip->onfi_set_features(mtd, chip,
990 ONFI_FEATURE_ADDR_TIMING_MODE,
991 tmode_param);
992}
993
Boris Brezillone509cba2017-11-22 02:38:19 +0900994/**
995 * nand_setup_data_interface - Setup the best data interface and timings
996 * @chip: The NAND chip
Boris Brezillon32935f42017-11-22 02:38:28 +0900997 * @chipnr: Internal die id
Boris Brezillone509cba2017-11-22 02:38:19 +0900998 *
999 * Find and configure the best data interface and NAND timings supported by
1000 * the chip and the driver.
1001 * First tries to retrieve supported timing modes from ONFI information,
1002 * and if the NAND chip does not support ONFI, relies on the
1003 * ->onfi_timing_mode_default specified in the nand_ids table.
1004 *
1005 * Returns 0 for success or negative error code otherwise.
1006 */
Boris Brezillon32935f42017-11-22 02:38:28 +09001007static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
Boris Brezillone509cba2017-11-22 02:38:19 +09001008{
1009 struct mtd_info *mtd = nand_to_mtd(chip);
1010 int ret;
1011
1012 if (!chip->setup_data_interface || !chip->data_interface)
1013 return 0;
1014
1015 /*
1016 * Ensure the timing mode has been changed on the chip side
1017 * before changing timings on the controller side.
1018 */
Kory Maincent0cda0cb2022-06-22 11:11:45 +02001019 ret = nand_onfi_set_timings(mtd, chip);
1020 if (ret)
1021 goto err;
Boris Brezillone509cba2017-11-22 02:38:19 +09001022
Boris Brezillon32935f42017-11-22 02:38:28 +09001023 ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface);
Boris Brezillone509cba2017-11-22 02:38:19 +09001024err:
1025 return ret;
1026}
1027
1028/**
1029 * nand_init_data_interface - find the best data interface and timings
1030 * @chip: The NAND chip
1031 *
1032 * Find the best data interface and NAND timings supported by the chip
1033 * and the driver.
1034 * First tries to retrieve supported timing modes from ONFI information,
1035 * and if the NAND chip does not support ONFI, relies on the
1036 * ->onfi_timing_mode_default specified in the nand_ids table. After this
1037 * function nand_chip->data_interface is initialized with the best timing mode
1038 * available.
1039 *
1040 * Returns 0 for success or negative error code otherwise.
1041 */
1042static int nand_init_data_interface(struct nand_chip *chip)
1043{
1044 struct mtd_info *mtd = nand_to_mtd(chip);
1045 int modes, mode, ret;
1046
1047 if (!chip->setup_data_interface)
1048 return 0;
1049
1050 /*
1051 * First try to identify the best timings from ONFI parameters and
1052 * if the NAND does not support ONFI, fallback to the default ONFI
1053 * timing mode.
1054 */
1055 modes = onfi_get_async_timing_mode(chip);
1056 if (modes == ONFI_TIMING_MODE_UNKNOWN) {
1057 if (!chip->onfi_timing_mode_default)
1058 return 0;
1059
1060 modes = GENMASK(chip->onfi_timing_mode_default, 0);
1061 }
1062
1063 chip->data_interface = kzalloc(sizeof(*chip->data_interface),
1064 GFP_KERNEL);
1065 if (!chip->data_interface)
1066 return -ENOMEM;
1067
1068 for (mode = fls(modes) - 1; mode >= 0; mode--) {
1069 ret = onfi_init_data_interface(chip, chip->data_interface,
1070 NAND_SDR_IFACE, mode);
1071 if (ret)
1072 continue;
1073
Boris Brezillon32935f42017-11-22 02:38:28 +09001074 /* Pass -1 to only */
1075 ret = chip->setup_data_interface(mtd,
1076 NAND_DATA_IFACE_CHECK_ONLY,
1077 chip->data_interface);
Boris Brezillone509cba2017-11-22 02:38:19 +09001078 if (!ret) {
1079 chip->onfi_timing_mode_default = mode;
1080 break;
1081 }
1082 }
1083
1084 return 0;
1085}
1086
1087static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
1088{
1089 kfree(chip->data_interface);
1090}
1091
1092/**
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001093 * nand_read_page_op - Do a READ PAGE operation
1094 * @chip: The NAND chip
1095 * @page: page to read
1096 * @offset_in_page: offset within the page
1097 * @buf: buffer used to store the data
1098 * @len: length of the buffer
1099 *
1100 * This function issues a READ PAGE operation.
1101 * This function does not select/unselect the CS line.
1102 *
1103 * Returns 0 on success, a negative error code otherwise.
1104 */
1105int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1106 unsigned int offset_in_page, void *buf, unsigned int len)
1107{
1108 struct mtd_info *mtd = nand_to_mtd(chip);
1109
1110 if (len && !buf)
1111 return -EINVAL;
1112
1113 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1114 return -EINVAL;
1115
1116 chip->cmdfunc(mtd, NAND_CMD_READ0, offset_in_page, page);
1117 if (len)
1118 chip->read_buf(mtd, buf, len);
1119
1120 return 0;
1121}
1122EXPORT_SYMBOL_GPL(nand_read_page_op);
1123
1124/**
1125 * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1126 * @chip: The NAND chip
1127 * @page: parameter page to read
1128 * @buf: buffer used to store the data
1129 * @len: length of the buffer
1130 *
1131 * This function issues a READ PARAMETER PAGE operation.
1132 * This function does not select/unselect the CS line.
1133 *
1134 * Returns 0 on success, a negative error code otherwise.
1135 */
1136static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1137 unsigned int len)
1138{
1139 struct mtd_info *mtd = nand_to_mtd(chip);
1140 unsigned int i;
1141 u8 *p = buf;
1142
1143 if (len && !buf)
1144 return -EINVAL;
1145
1146 chip->cmdfunc(mtd, NAND_CMD_PARAM, page, -1);
1147 for (i = 0; i < len; i++)
1148 p[i] = chip->read_byte(mtd);
1149
1150 return 0;
1151}
1152
1153/**
1154 * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1155 * @chip: The NAND chip
1156 * @offset_in_page: offset within the page
1157 * @buf: buffer used to store the data
1158 * @len: length of the buffer
1159 * @force_8bit: force 8-bit bus access
1160 *
1161 * This function issues a CHANGE READ COLUMN operation.
1162 * This function does not select/unselect the CS line.
1163 *
1164 * Returns 0 on success, a negative error code otherwise.
1165 */
1166int nand_change_read_column_op(struct nand_chip *chip,
1167 unsigned int offset_in_page, void *buf,
1168 unsigned int len, bool force_8bit)
1169{
1170 struct mtd_info *mtd = nand_to_mtd(chip);
1171
1172 if (len && !buf)
1173 return -EINVAL;
1174
1175 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1176 return -EINVAL;
1177
1178 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset_in_page, -1);
1179 if (len)
1180 chip->read_buf(mtd, buf, len);
1181
1182 return 0;
1183}
1184EXPORT_SYMBOL_GPL(nand_change_read_column_op);
1185
1186/**
1187 * nand_read_oob_op - Do a READ OOB operation
1188 * @chip: The NAND chip
1189 * @page: page to read
1190 * @offset_in_oob: offset within the OOB area
1191 * @buf: buffer used to store the data
1192 * @len: length of the buffer
1193 *
1194 * This function issues a READ OOB operation.
1195 * This function does not select/unselect the CS line.
1196 *
1197 * Returns 0 on success, a negative error code otherwise.
1198 */
1199int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1200 unsigned int offset_in_oob, void *buf, unsigned int len)
1201{
1202 struct mtd_info *mtd = nand_to_mtd(chip);
1203
1204 if (len && !buf)
1205 return -EINVAL;
1206
1207 if (offset_in_oob + len > mtd->oobsize)
1208 return -EINVAL;
1209
1210 chip->cmdfunc(mtd, NAND_CMD_READOOB, offset_in_oob, page);
1211 if (len)
1212 chip->read_buf(mtd, buf, len);
1213
1214 return 0;
1215}
1216EXPORT_SYMBOL_GPL(nand_read_oob_op);
1217
1218/**
1219 * nand_prog_page_begin_op - starts a PROG PAGE operation
1220 * @chip: The NAND chip
1221 * @page: page to write
1222 * @offset_in_page: offset within the page
1223 * @buf: buffer containing the data to write to the page
1224 * @len: length of the buffer
1225 *
1226 * This function issues the first half of a PROG PAGE operation.
1227 * This function does not select/unselect the CS line.
1228 *
1229 * Returns 0 on success, a negative error code otherwise.
1230 */
1231int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1232 unsigned int offset_in_page, const void *buf,
1233 unsigned int len)
1234{
1235 struct mtd_info *mtd = nand_to_mtd(chip);
1236
1237 if (len && !buf)
1238 return -EINVAL;
1239
1240 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1241 return -EINVAL;
1242
1243 chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1244
1245 if (buf)
1246 chip->write_buf(mtd, buf, len);
1247
1248 return 0;
1249}
1250EXPORT_SYMBOL_GPL(nand_prog_page_begin_op);
1251
1252/**
1253 * nand_prog_page_end_op - ends a PROG PAGE operation
1254 * @chip: The NAND chip
1255 *
1256 * This function issues the second half of a PROG PAGE operation.
1257 * This function does not select/unselect the CS line.
1258 *
1259 * Returns 0 on success, a negative error code otherwise.
1260 */
1261int nand_prog_page_end_op(struct nand_chip *chip)
1262{
1263 struct mtd_info *mtd = nand_to_mtd(chip);
1264 int status;
1265
1266 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1267
1268 status = chip->waitfunc(mtd, chip);
1269 if (status & NAND_STATUS_FAIL)
1270 return -EIO;
1271
1272 return 0;
1273}
1274EXPORT_SYMBOL_GPL(nand_prog_page_end_op);
1275
1276/**
1277 * nand_prog_page_op - Do a full PROG PAGE operation
1278 * @chip: The NAND chip
1279 * @page: page to write
1280 * @offset_in_page: offset within the page
1281 * @buf: buffer containing the data to write to the page
1282 * @len: length of the buffer
1283 *
1284 * This function issues a full PROG PAGE operation.
1285 * This function does not select/unselect the CS line.
1286 *
1287 * Returns 0 on success, a negative error code otherwise.
1288 */
1289int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1290 unsigned int offset_in_page, const void *buf,
1291 unsigned int len)
1292{
1293 struct mtd_info *mtd = nand_to_mtd(chip);
1294 int status;
1295
1296 if (!len || !buf)
1297 return -EINVAL;
1298
1299 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1300 return -EINVAL;
1301
1302 chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1303 chip->write_buf(mtd, buf, len);
1304 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1305
1306 status = chip->waitfunc(mtd, chip);
1307 if (status & NAND_STATUS_FAIL)
1308 return -EIO;
1309
1310 return 0;
1311}
1312EXPORT_SYMBOL_GPL(nand_prog_page_op);
1313
1314/**
1315 * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1316 * @chip: The NAND chip
1317 * @offset_in_page: offset within the page
1318 * @buf: buffer containing the data to send to the NAND
1319 * @len: length of the buffer
1320 * @force_8bit: force 8-bit bus access
1321 *
1322 * This function issues a CHANGE WRITE COLUMN operation.
1323 * This function does not select/unselect the CS line.
1324 *
1325 * Returns 0 on success, a negative error code otherwise.
1326 */
1327int nand_change_write_column_op(struct nand_chip *chip,
1328 unsigned int offset_in_page,
1329 const void *buf, unsigned int len,
1330 bool force_8bit)
1331{
1332 struct mtd_info *mtd = nand_to_mtd(chip);
1333
1334 if (len && !buf)
1335 return -EINVAL;
1336
1337 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1338 return -EINVAL;
1339
1340 chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset_in_page, -1);
1341 if (len)
1342 chip->write_buf(mtd, buf, len);
1343
1344 return 0;
1345}
1346EXPORT_SYMBOL_GPL(nand_change_write_column_op);
1347
1348/**
1349 * nand_readid_op - Do a READID operation
1350 * @chip: The NAND chip
1351 * @addr: address cycle to pass after the READID command
1352 * @buf: buffer used to store the ID
1353 * @len: length of the buffer
1354 *
1355 * This function sends a READID command and reads back the ID returned by the
1356 * NAND.
1357 * This function does not select/unselect the CS line.
1358 *
1359 * Returns 0 on success, a negative error code otherwise.
1360 */
1361int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
1362 unsigned int len)
1363{
1364 struct mtd_info *mtd = nand_to_mtd(chip);
1365 unsigned int i;
1366 u8 *id = buf;
1367
1368 if (len && !buf)
1369 return -EINVAL;
1370
1371 chip->cmdfunc(mtd, NAND_CMD_READID, addr, -1);
1372
1373 for (i = 0; i < len; i++)
1374 id[i] = chip->read_byte(mtd);
1375
1376 return 0;
1377}
1378EXPORT_SYMBOL_GPL(nand_readid_op);
1379
1380/**
1381 * nand_status_op - Do a STATUS operation
1382 * @chip: The NAND chip
1383 * @status: out variable to store the NAND status
1384 *
1385 * This function sends a STATUS command and reads back the status returned by
1386 * the NAND.
1387 * This function does not select/unselect the CS line.
1388 *
1389 * Returns 0 on success, a negative error code otherwise.
1390 */
1391int nand_status_op(struct nand_chip *chip, u8 *status)
1392{
1393 struct mtd_info *mtd = nand_to_mtd(chip);
1394
1395 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
1396 if (status)
1397 *status = chip->read_byte(mtd);
1398
1399 return 0;
1400}
1401EXPORT_SYMBOL_GPL(nand_status_op);
1402
1403/**
1404 * nand_exit_status_op - Exit a STATUS operation
1405 * @chip: The NAND chip
1406 *
1407 * This function sends a READ0 command to cancel the effect of the STATUS
1408 * command to avoid reading only the status until a new read command is sent.
1409 *
1410 * This function does not select/unselect the CS line.
1411 *
1412 * Returns 0 on success, a negative error code otherwise.
1413 */
1414int nand_exit_status_op(struct nand_chip *chip)
1415{
1416 struct mtd_info *mtd = nand_to_mtd(chip);
1417
1418 chip->cmdfunc(mtd, NAND_CMD_READ0, -1, -1);
1419
1420 return 0;
1421}
1422EXPORT_SYMBOL_GPL(nand_exit_status_op);
1423
1424/**
1425 * nand_erase_op - Do an erase operation
1426 * @chip: The NAND chip
1427 * @eraseblock: block to erase
1428 *
1429 * This function sends an ERASE command and waits for the NAND to be ready
1430 * before returning.
1431 * This function does not select/unselect the CS line.
1432 *
1433 * Returns 0 on success, a negative error code otherwise.
1434 */
1435int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
1436{
1437 struct mtd_info *mtd = nand_to_mtd(chip);
1438 unsigned int page = eraseblock <<
1439 (chip->phys_erase_shift - chip->page_shift);
1440 int status;
1441
1442 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1443 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1444
1445 status = chip->waitfunc(mtd, chip);
1446 if (status < 0)
1447 return status;
1448
1449 if (status & NAND_STATUS_FAIL)
1450 return -EIO;
1451
1452 return 0;
1453}
1454EXPORT_SYMBOL_GPL(nand_erase_op);
1455
1456/**
1457 * nand_set_features_op - Do a SET FEATURES operation
1458 * @chip: The NAND chip
1459 * @feature: feature id
1460 * @data: 4 bytes of data
1461 *
1462 * This function sends a SET FEATURES command and waits for the NAND to be
1463 * ready before returning.
1464 * This function does not select/unselect the CS line.
1465 *
1466 * Returns 0 on success, a negative error code otherwise.
1467 */
1468static int nand_set_features_op(struct nand_chip *chip, u8 feature,
1469 const void *data)
1470{
1471 struct mtd_info *mtd = nand_to_mtd(chip);
1472 const u8 *params = data;
1473 int i, status;
1474
1475 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, feature, -1);
1476 for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1477 chip->write_byte(mtd, params[i]);
1478
1479 status = chip->waitfunc(mtd, chip);
1480 if (status & NAND_STATUS_FAIL)
1481 return -EIO;
1482
1483 return 0;
1484}
1485
1486/**
1487 * nand_get_features_op - Do a GET FEATURES operation
1488 * @chip: The NAND chip
1489 * @feature: feature id
1490 * @data: 4 bytes of data
1491 *
1492 * This function sends a GET FEATURES command and waits for the NAND to be
1493 * ready before returning.
1494 * This function does not select/unselect the CS line.
1495 *
1496 * Returns 0 on success, a negative error code otherwise.
1497 */
1498static int nand_get_features_op(struct nand_chip *chip, u8 feature,
1499 void *data)
1500{
1501 struct mtd_info *mtd = nand_to_mtd(chip);
1502 u8 *params = data;
1503 int i;
1504
1505 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, feature, -1);
1506 for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1507 params[i] = chip->read_byte(mtd);
1508
1509 return 0;
1510}
1511
1512/**
1513 * nand_reset_op - Do a reset operation
1514 * @chip: The NAND chip
1515 *
1516 * This function sends a RESET command and waits for the NAND to be ready
1517 * before returning.
1518 * This function does not select/unselect the CS line.
1519 *
1520 * Returns 0 on success, a negative error code otherwise.
1521 */
1522int nand_reset_op(struct nand_chip *chip)
1523{
1524 struct mtd_info *mtd = nand_to_mtd(chip);
1525
1526 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1527
1528 return 0;
1529}
1530EXPORT_SYMBOL_GPL(nand_reset_op);
1531
1532/**
1533 * nand_read_data_op - Read data from the NAND
1534 * @chip: The NAND chip
1535 * @buf: buffer used to store the data
1536 * @len: length of the buffer
1537 * @force_8bit: force 8-bit bus access
1538 *
1539 * This function does a raw data read on the bus. Usually used after launching
1540 * another NAND operation like nand_read_page_op().
1541 * This function does not select/unselect the CS line.
1542 *
1543 * Returns 0 on success, a negative error code otherwise.
1544 */
1545int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
1546 bool force_8bit)
1547{
1548 struct mtd_info *mtd = nand_to_mtd(chip);
1549
1550 if (!len || !buf)
1551 return -EINVAL;
1552
1553 if (force_8bit) {
1554 u8 *p = buf;
1555 unsigned int i;
1556
1557 for (i = 0; i < len; i++)
1558 p[i] = chip->read_byte(mtd);
1559 } else {
1560 chip->read_buf(mtd, buf, len);
1561 }
1562
1563 return 0;
1564}
1565EXPORT_SYMBOL_GPL(nand_read_data_op);
1566
1567/**
1568 * nand_write_data_op - Write data from the NAND
1569 * @chip: The NAND chip
1570 * @buf: buffer containing the data to send on the bus
1571 * @len: length of the buffer
1572 * @force_8bit: force 8-bit bus access
1573 *
1574 * This function does a raw data write on the bus. Usually used after launching
1575 * another NAND operation like nand_write_page_begin_op().
1576 * This function does not select/unselect the CS line.
1577 *
1578 * Returns 0 on success, a negative error code otherwise.
1579 */
1580int nand_write_data_op(struct nand_chip *chip, const void *buf,
1581 unsigned int len, bool force_8bit)
1582{
1583 struct mtd_info *mtd = nand_to_mtd(chip);
1584
1585 if (!len || !buf)
1586 return -EINVAL;
1587
1588 if (force_8bit) {
1589 const u8 *p = buf;
1590 unsigned int i;
1591
1592 for (i = 0; i < len; i++)
1593 chip->write_byte(mtd, p[i]);
1594 } else {
1595 chip->write_buf(mtd, buf, len);
1596 }
1597
1598 return 0;
1599}
1600EXPORT_SYMBOL_GPL(nand_write_data_op);
1601
1602/**
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001603 * nand_reset - Reset and initialize a NAND device
1604 * @chip: The NAND chip
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001605 * @chipnr: Internal die id
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001606 *
1607 * Returns 0 for success or negative error code otherwise
1608 */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001609int nand_reset(struct nand_chip *chip, int chipnr)
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001610{
1611 struct mtd_info *mtd = nand_to_mtd(chip);
Boris Brezillone509cba2017-11-22 02:38:19 +09001612 int ret;
1613
Boris Brezillon32935f42017-11-22 02:38:28 +09001614 ret = nand_reset_data_interface(chip, chipnr);
Boris Brezillone509cba2017-11-22 02:38:19 +09001615 if (ret)
1616 return ret;
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001617
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001618 /*
1619 * The CS line has to be released before we can apply the new NAND
1620 * interface settings, hence this weird ->select_chip() dance.
1621 */
1622 chip->select_chip(mtd, chipnr);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001623 ret = nand_reset_op(chip);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001624 chip->select_chip(mtd, -1);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001625 if (ret)
1626 return ret;
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001627
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001628 chip->select_chip(mtd, chipnr);
Boris Brezillon32935f42017-11-22 02:38:28 +09001629 ret = nand_setup_data_interface(chip, chipnr);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001630 chip->select_chip(mtd, -1);
Boris Brezillone509cba2017-11-22 02:38:19 +09001631 if (ret)
1632 return ret;
1633
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001634 return 0;
1635}
1636
1637/**
Scott Wood52ab7ce2016-05-30 13:57:58 -05001638 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
1639 * @buf: buffer to test
1640 * @len: buffer length
1641 * @bitflips_threshold: maximum number of bitflips
1642 *
1643 * Check if a buffer contains only 0xff, which means the underlying region
1644 * has been erased and is ready to be programmed.
1645 * The bitflips_threshold specify the maximum number of bitflips before
1646 * considering the region is not erased.
1647 * Note: The logic of this function has been extracted from the memweight
1648 * implementation, except that nand_check_erased_buf function exit before
1649 * testing the whole buffer if the number of bitflips exceed the
1650 * bitflips_threshold value.
1651 *
1652 * Returns a positive number of bitflips less than or equal to
1653 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1654 * threshold.
1655 */
1656static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold)
1657{
1658 const unsigned char *bitmap = buf;
1659 int bitflips = 0;
1660 int weight;
1661
1662 for (; len && ((uintptr_t)bitmap) % sizeof(long);
1663 len--, bitmap++) {
1664 weight = hweight8(*bitmap);
1665 bitflips += BITS_PER_BYTE - weight;
1666 if (unlikely(bitflips > bitflips_threshold))
1667 return -EBADMSG;
1668 }
1669
1670 for (; len >= 4; len -= 4, bitmap += 4) {
1671 weight = hweight32(*((u32 *)bitmap));
1672 bitflips += 32 - weight;
1673 if (unlikely(bitflips > bitflips_threshold))
1674 return -EBADMSG;
1675 }
1676
1677 for (; len > 0; len--, bitmap++) {
1678 weight = hweight8(*bitmap);
1679 bitflips += BITS_PER_BYTE - weight;
1680 if (unlikely(bitflips > bitflips_threshold))
1681 return -EBADMSG;
1682 }
1683
1684 return bitflips;
1685}
1686
1687/**
1688 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
1689 * 0xff data
1690 * @data: data buffer to test
1691 * @datalen: data length
1692 * @ecc: ECC buffer
1693 * @ecclen: ECC length
1694 * @extraoob: extra OOB buffer
1695 * @extraooblen: extra OOB length
1696 * @bitflips_threshold: maximum number of bitflips
1697 *
1698 * Check if a data buffer and its associated ECC and OOB data contains only
1699 * 0xff pattern, which means the underlying region has been erased and is
1700 * ready to be programmed.
1701 * The bitflips_threshold specify the maximum number of bitflips before
1702 * considering the region as not erased.
1703 *
1704 * Note:
1705 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
1706 * different from the NAND page size. When fixing bitflips, ECC engines will
1707 * report the number of errors per chunk, and the NAND core infrastructure
1708 * expect you to return the maximum number of bitflips for the whole page.
1709 * This is why you should always use this function on a single chunk and
1710 * not on the whole page. After checking each chunk you should update your
1711 * max_bitflips value accordingly.
1712 * 2/ When checking for bitflips in erased pages you should not only check
1713 * the payload data but also their associated ECC data, because a user might
1714 * have programmed almost all bits to 1 but a few. In this case, we
1715 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
1716 * this case.
1717 * 3/ The extraoob argument is optional, and should be used if some of your OOB
1718 * data are protected by the ECC engine.
1719 * It could also be used if you support subpages and want to attach some
1720 * extra OOB data to an ECC chunk.
1721 *
1722 * Returns a positive number of bitflips less than or equal to
1723 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1724 * threshold. In case of success, the passed buffers are filled with 0xff.
1725 */
1726int nand_check_erased_ecc_chunk(void *data, int datalen,
1727 void *ecc, int ecclen,
1728 void *extraoob, int extraooblen,
1729 int bitflips_threshold)
1730{
1731 int data_bitflips = 0, ecc_bitflips = 0, extraoob_bitflips = 0;
1732
1733 data_bitflips = nand_check_erased_buf(data, datalen,
1734 bitflips_threshold);
1735 if (data_bitflips < 0)
1736 return data_bitflips;
1737
1738 bitflips_threshold -= data_bitflips;
1739
1740 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold);
1741 if (ecc_bitflips < 0)
1742 return ecc_bitflips;
1743
1744 bitflips_threshold -= ecc_bitflips;
1745
1746 extraoob_bitflips = nand_check_erased_buf(extraoob, extraooblen,
1747 bitflips_threshold);
1748 if (extraoob_bitflips < 0)
1749 return extraoob_bitflips;
1750
1751 if (data_bitflips)
1752 memset(data, 0xff, datalen);
1753
1754 if (ecc_bitflips)
1755 memset(ecc, 0xff, ecclen);
1756
1757 if (extraoob_bitflips)
1758 memset(extraoob, 0xff, extraooblen);
1759
1760 return data_bitflips + ecc_bitflips + extraoob_bitflips;
1761}
1762EXPORT_SYMBOL(nand_check_erased_ecc_chunk);
Heiko Schocherf5895d12014-06-24 10:10:04 +02001763
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001764/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001765 * nand_read_page_raw - [INTERN] read raw page data without ecc
1766 * @mtd: mtd info structure
1767 * @chip: nand chip info structure
1768 * @buf: buffer to store read data
1769 * @oob_required: caller requires OOB data read to chip->oob_poi
1770 * @page: page number to read
David Brownellee86b8d2009-11-07 16:27:01 -05001771 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00001772 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001773 */
William Juul52c07962007-10-31 13:53:06 +01001774static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001775 uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001776{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001777 int ret;
1778
1779 ret = nand_read_data_op(chip, buf, mtd->writesize, false);
1780 if (ret)
1781 return ret;
1782
1783 if (oob_required) {
1784 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
1785 false);
1786 if (ret)
1787 return ret;
1788 }
1789
William Juul52c07962007-10-31 13:53:06 +01001790 return 0;
1791}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001792
William Juul52c07962007-10-31 13:53:06 +01001793/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001794 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1795 * @mtd: mtd info structure
1796 * @chip: nand chip info structure
1797 * @buf: buffer to store read data
1798 * @oob_required: caller requires OOB data read to chip->oob_poi
1799 * @page: page number to read
David Brownellee86b8d2009-11-07 16:27:01 -05001800 *
1801 * We need a special oob layout and handling even when OOB isn't used.
1802 */
Christian Hitz13fc0e22011-10-12 09:32:01 +02001803static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001804 struct nand_chip *chip, uint8_t *buf,
1805 int oob_required, int page)
David Brownellee86b8d2009-11-07 16:27:01 -05001806{
1807 int eccsize = chip->ecc.size;
1808 int eccbytes = chip->ecc.bytes;
1809 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001810 int steps, size, ret;
David Brownellee86b8d2009-11-07 16:27:01 -05001811
1812 for (steps = chip->ecc.steps; steps > 0; steps--) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001813 ret = nand_read_data_op(chip, buf, eccsize, false);
1814 if (ret)
1815 return ret;
1816
David Brownellee86b8d2009-11-07 16:27:01 -05001817 buf += eccsize;
1818
1819 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001820 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
1821 false);
1822 if (ret)
1823 return ret;
1824
David Brownellee86b8d2009-11-07 16:27:01 -05001825 oob += chip->ecc.prepad;
1826 }
1827
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001828 ret = nand_read_data_op(chip, oob, eccbytes, false);
1829 if (ret)
1830 return ret;
1831
David Brownellee86b8d2009-11-07 16:27:01 -05001832 oob += eccbytes;
1833
1834 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001835 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
1836 false);
1837 if (ret)
1838 return ret;
1839
David Brownellee86b8d2009-11-07 16:27:01 -05001840 oob += chip->ecc.postpad;
1841 }
1842 }
1843
1844 size = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001845 if (size) {
1846 ret = nand_read_data_op(chip, oob, size, false);
1847 if (ret)
1848 return ret;
1849 }
David Brownellee86b8d2009-11-07 16:27:01 -05001850
1851 return 0;
1852}
1853
1854/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001855 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1856 * @mtd: mtd info structure
1857 * @chip: nand chip info structure
1858 * @buf: buffer to store read data
1859 * @oob_required: caller requires OOB data read to chip->oob_poi
1860 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01001861 */
1862static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001863 uint8_t *buf, int oob_required, int page)
William Juul52c07962007-10-31 13:53:06 +01001864{
1865 int i, eccsize = chip->ecc.size;
1866 int eccbytes = chip->ecc.bytes;
1867 int eccsteps = chip->ecc.steps;
1868 uint8_t *p = buf;
1869 uint8_t *ecc_calc = chip->buffers->ecccalc;
1870 uint8_t *ecc_code = chip->buffers->ecccode;
1871 uint32_t *eccpos = chip->ecc.layout->eccpos;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001872 unsigned int max_bitflips = 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001873
Sergey Lapin3a38a552013-01-14 03:46:50 +00001874 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001875
William Juul52c07962007-10-31 13:53:06 +01001876 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1877 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001878
William Juul52c07962007-10-31 13:53:06 +01001879 for (i = 0; i < chip->ecc.total; i++)
1880 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001881
William Juul52c07962007-10-31 13:53:06 +01001882 eccsteps = chip->ecc.steps;
1883 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001884
William Juul52c07962007-10-31 13:53:06 +01001885 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1886 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001887
William Juul52c07962007-10-31 13:53:06 +01001888 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Heiko Schocherf5895d12014-06-24 10:10:04 +02001889 if (stat < 0) {
William Juul52c07962007-10-31 13:53:06 +01001890 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001891 } else {
William Juul52c07962007-10-31 13:53:06 +01001892 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001893 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1894 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001895 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02001896 return max_bitflips;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001897}
1898
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001899/**
Heiko Schocherf5895d12014-06-24 10:10:04 +02001900 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
Sergey Lapin3a38a552013-01-14 03:46:50 +00001901 * @mtd: mtd info structure
1902 * @chip: nand chip info structure
1903 * @data_offs: offset of requested data within the page
1904 * @readlen: data length
1905 * @bufpoi: buffer to store read data
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001906 * @page: page number to read
Scott Wood3628f002008-10-24 16:20:43 -05001907 */
Christian Hitz13fc0e22011-10-12 09:32:01 +02001908static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001909 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi,
1910 int page)
Scott Wood3628f002008-10-24 16:20:43 -05001911{
1912 int start_step, end_step, num_steps;
1913 uint32_t *eccpos = chip->ecc.layout->eccpos;
1914 uint8_t *p;
1915 int data_col_addr, i, gaps = 0;
1916 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1917 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001918 int index;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001919 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001920 int ret;
Scott Wood3628f002008-10-24 16:20:43 -05001921
Sergey Lapin3a38a552013-01-14 03:46:50 +00001922 /* Column address within the page aligned to ECC size (256bytes) */
Scott Wood3628f002008-10-24 16:20:43 -05001923 start_step = data_offs / chip->ecc.size;
1924 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1925 num_steps = end_step - start_step + 1;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001926 index = start_step * chip->ecc.bytes;
Scott Wood3628f002008-10-24 16:20:43 -05001927
Sergey Lapin3a38a552013-01-14 03:46:50 +00001928 /* Data size aligned to ECC ecc.size */
Scott Wood3628f002008-10-24 16:20:43 -05001929 datafrag_len = num_steps * chip->ecc.size;
1930 eccfrag_len = num_steps * chip->ecc.bytes;
1931
1932 data_col_addr = start_step * chip->ecc.size;
1933 /* If we read not a page aligned data */
1934 if (data_col_addr != 0)
1935 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1936
1937 p = bufpoi + data_col_addr;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001938 ret = nand_read_data_op(chip, p, datafrag_len, false);
1939 if (ret)
1940 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001941
Sergey Lapin3a38a552013-01-14 03:46:50 +00001942 /* Calculate ECC */
Scott Wood3628f002008-10-24 16:20:43 -05001943 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1944 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1945
Sergey Lapin3a38a552013-01-14 03:46:50 +00001946 /*
1947 * The performance is faster if we position offsets according to
1948 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
1949 */
Scott Wood3628f002008-10-24 16:20:43 -05001950 for (i = 0; i < eccfrag_len - 1; i++) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05001951 if (eccpos[i + index] + 1 != eccpos[i + index + 1]) {
Scott Wood3628f002008-10-24 16:20:43 -05001952 gaps = 1;
1953 break;
1954 }
1955 }
1956 if (gaps) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001957 ret = nand_change_read_column_op(chip, mtd->writesize,
1958 chip->oob_poi, mtd->oobsize,
1959 false);
1960 if (ret)
1961 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001962 } else {
Sergey Lapin3a38a552013-01-14 03:46:50 +00001963 /*
1964 * Send the command to read the particular ECC bytes take care
1965 * about buswidth alignment in read_buf.
1966 */
Christian Hitzb8a6b372011-10-12 09:32:02 +02001967 aligned_pos = eccpos[index] & ~(busw - 1);
Scott Wood3628f002008-10-24 16:20:43 -05001968 aligned_len = eccfrag_len;
Christian Hitzb8a6b372011-10-12 09:32:02 +02001969 if (eccpos[index] & (busw - 1))
Scott Wood3628f002008-10-24 16:20:43 -05001970 aligned_len++;
Christian Hitzb8a6b372011-10-12 09:32:02 +02001971 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Scott Wood3628f002008-10-24 16:20:43 -05001972 aligned_len++;
1973
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001974 ret = nand_change_read_column_op(chip,
1975 mtd->writesize + aligned_pos,
1976 &chip->oob_poi[aligned_pos],
1977 aligned_len, false);
1978 if (ret)
1979 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001980 }
1981
1982 for (i = 0; i < eccfrag_len; i++)
Christian Hitzb8a6b372011-10-12 09:32:02 +02001983 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Scott Wood3628f002008-10-24 16:20:43 -05001984
1985 p = bufpoi + data_col_addr;
1986 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1987 int stat;
1988
Christian Hitzb8a6b372011-10-12 09:32:02 +02001989 stat = chip->ecc.correct(mtd, p,
1990 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Scott Wood52ab7ce2016-05-30 13:57:58 -05001991 if (stat == -EBADMSG &&
1992 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
1993 /* check for empty pages with bitflips */
1994 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
1995 &chip->buffers->ecccode[i],
1996 chip->ecc.bytes,
1997 NULL, 0,
1998 chip->ecc.strength);
1999 }
2000
Heiko Schocherf5895d12014-06-24 10:10:04 +02002001 if (stat < 0) {
Scott Wood3628f002008-10-24 16:20:43 -05002002 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002003 } else {
Scott Wood3628f002008-10-24 16:20:43 -05002004 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002005 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2006 }
Scott Wood3628f002008-10-24 16:20:43 -05002007 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002008 return max_bitflips;
Scott Wood3628f002008-10-24 16:20:43 -05002009}
2010
2011/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002012 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
2013 * @mtd: mtd info structure
2014 * @chip: nand chip info structure
2015 * @buf: buffer to store read data
2016 * @oob_required: caller requires OOB data read to chip->oob_poi
2017 * @page: page number to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002018 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002019 * Not for syndrome calculating ECC controllers which need a special oob layout.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002020 */
William Juul52c07962007-10-31 13:53:06 +01002021static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002022 uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002023{
William Juul52c07962007-10-31 13:53:06 +01002024 int i, eccsize = chip->ecc.size;
2025 int eccbytes = chip->ecc.bytes;
2026 int eccsteps = chip->ecc.steps;
2027 uint8_t *p = buf;
2028 uint8_t *ecc_calc = chip->buffers->ecccalc;
2029 uint8_t *ecc_code = chip->buffers->ecccode;
2030 uint32_t *eccpos = chip->ecc.layout->eccpos;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002031 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002032 int ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002033
William Juul52c07962007-10-31 13:53:06 +01002034 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2035 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002036
2037 ret = nand_read_data_op(chip, p, eccsize, false);
2038 if (ret)
2039 return ret;
2040
William Juul52c07962007-10-31 13:53:06 +01002041 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2042 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002043
2044 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false);
2045 if (ret)
2046 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002047
William Juul52c07962007-10-31 13:53:06 +01002048 for (i = 0; i < chip->ecc.total; i++)
2049 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002050
William Juul52c07962007-10-31 13:53:06 +01002051 eccsteps = chip->ecc.steps;
2052 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002053
William Juul52c07962007-10-31 13:53:06 +01002054 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2055 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002056
William Juul52c07962007-10-31 13:53:06 +01002057 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Wood52ab7ce2016-05-30 13:57:58 -05002058 if (stat == -EBADMSG &&
2059 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2060 /* check for empty pages with bitflips */
2061 stat = nand_check_erased_ecc_chunk(p, eccsize,
2062 &ecc_code[i], eccbytes,
2063 NULL, 0,
2064 chip->ecc.strength);
2065 }
2066
Heiko Schocherf5895d12014-06-24 10:10:04 +02002067 if (stat < 0) {
William Juul52c07962007-10-31 13:53:06 +01002068 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002069 } else {
William Juul52c07962007-10-31 13:53:06 +01002070 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002071 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2072 }
William Juul52c07962007-10-31 13:53:06 +01002073 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002074 return max_bitflips;
William Juul52c07962007-10-31 13:53:06 +01002075}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002076
William Juul52c07962007-10-31 13:53:06 +01002077/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002078 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
2079 * @mtd: mtd info structure
2080 * @chip: nand chip info structure
2081 * @buf: buffer to store read data
2082 * @oob_required: caller requires OOB data read to chip->oob_poi
2083 * @page: page number to read
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002084 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002085 * Hardware ECC for large page chips, require OOB to be read first. For this
2086 * ECC mode, the write_page method is re-used from ECC_HW. These methods
2087 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
2088 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
2089 * the data area, by overwriting the NAND manufacturer bad block markings.
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002090 */
2091static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002092 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002093{
2094 int i, eccsize = chip->ecc.size;
2095 int eccbytes = chip->ecc.bytes;
2096 int eccsteps = chip->ecc.steps;
2097 uint8_t *p = buf;
2098 uint8_t *ecc_code = chip->buffers->ecccode;
2099 uint32_t *eccpos = chip->ecc.layout->eccpos;
2100 uint8_t *ecc_calc = chip->buffers->ecccalc;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002101 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002102 int ret;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002103
2104 /* Read the OOB area first */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002105 ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
2106 if (ret)
2107 return ret;
2108
2109 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2110 if (ret)
2111 return ret;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002112
2113 for (i = 0; i < chip->ecc.total; i++)
2114 ecc_code[i] = chip->oob_poi[eccpos[i]];
2115
2116 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2117 int stat;
2118
2119 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002120
2121 ret = nand_read_data_op(chip, p, eccsize, false);
2122 if (ret)
2123 return ret;
2124
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002125 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2126
2127 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Scott Wood52ab7ce2016-05-30 13:57:58 -05002128 if (stat == -EBADMSG &&
2129 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2130 /* check for empty pages with bitflips */
2131 stat = nand_check_erased_ecc_chunk(p, eccsize,
2132 &ecc_code[i], eccbytes,
2133 NULL, 0,
2134 chip->ecc.strength);
2135 }
2136
Heiko Schocherf5895d12014-06-24 10:10:04 +02002137 if (stat < 0) {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002138 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002139 } else {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002140 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002141 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2142 }
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002143 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002144 return max_bitflips;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002145}
2146
2147/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002148 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2149 * @mtd: mtd info structure
2150 * @chip: nand chip info structure
2151 * @buf: buffer to store read data
2152 * @oob_required: caller requires OOB data read to chip->oob_poi
2153 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002154 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002155 * The hw generator calculates the error syndrome automatically. Therefore we
2156 * need a special oob layout and handling.
William Juul52c07962007-10-31 13:53:06 +01002157 */
2158static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002159 uint8_t *buf, int oob_required, int page)
William Juul52c07962007-10-31 13:53:06 +01002160{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002161 int ret, i, eccsize = chip->ecc.size;
William Juul52c07962007-10-31 13:53:06 +01002162 int eccbytes = chip->ecc.bytes;
2163 int eccsteps = chip->ecc.steps;
Scott Wood52ab7ce2016-05-30 13:57:58 -05002164 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
William Juul52c07962007-10-31 13:53:06 +01002165 uint8_t *p = buf;
2166 uint8_t *oob = chip->oob_poi;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002167 unsigned int max_bitflips = 0;
William Juul52c07962007-10-31 13:53:06 +01002168
2169 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2170 int stat;
2171
2172 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002173
2174 ret = nand_read_data_op(chip, p, eccsize, false);
2175 if (ret)
2176 return ret;
William Juul52c07962007-10-31 13:53:06 +01002177
2178 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002179 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
2180 false);
2181 if (ret)
2182 return ret;
2183
William Juul52c07962007-10-31 13:53:06 +01002184 oob += chip->ecc.prepad;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002185 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002186
William Juul52c07962007-10-31 13:53:06 +01002187 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002188
2189 ret = nand_read_data_op(chip, oob, eccbytes, false);
2190 if (ret)
2191 return ret;
2192
William Juul52c07962007-10-31 13:53:06 +01002193 stat = chip->ecc.correct(mtd, p, oob, NULL);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002194
William Juul52c07962007-10-31 13:53:06 +01002195 oob += eccbytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002196
William Juul52c07962007-10-31 13:53:06 +01002197 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002198 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
2199 false);
2200 if (ret)
2201 return ret;
2202
William Juul52c07962007-10-31 13:53:06 +01002203 oob += chip->ecc.postpad;
2204 }
Scott Wood52ab7ce2016-05-30 13:57:58 -05002205
2206 if (stat == -EBADMSG &&
2207 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2208 /* check for empty pages with bitflips */
2209 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
2210 oob - eccpadbytes,
2211 eccpadbytes,
2212 NULL, 0,
2213 chip->ecc.strength);
2214 }
2215
2216 if (stat < 0) {
2217 mtd->ecc_stats.failed++;
2218 } else {
2219 mtd->ecc_stats.corrected += stat;
2220 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2221 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002222 }
William Juul52c07962007-10-31 13:53:06 +01002223
2224 /* Calculate remaining oob bytes */
2225 i = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002226 if (i) {
2227 ret = nand_read_data_op(chip, oob, i, false);
2228 if (ret)
2229 return ret;
2230 }
William Juul52c07962007-10-31 13:53:06 +01002231
Heiko Schocherf5895d12014-06-24 10:10:04 +02002232 return max_bitflips;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002233}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002234
2235/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002236 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
2237 * @chip: nand chip structure
2238 * @oob: oob destination address
2239 * @ops: oob ops structure
2240 * @len: size of oob to transfer
William Juul52c07962007-10-31 13:53:06 +01002241 */
2242static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
2243 struct mtd_oob_ops *ops, size_t len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002244{
Christian Hitz13fc0e22011-10-12 09:32:01 +02002245 switch (ops->mode) {
William Juul52c07962007-10-31 13:53:06 +01002246
Sergey Lapin3a38a552013-01-14 03:46:50 +00002247 case MTD_OPS_PLACE_OOB:
2248 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01002249 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
2250 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002251
Sergey Lapin3a38a552013-01-14 03:46:50 +00002252 case MTD_OPS_AUTO_OOB: {
William Juul52c07962007-10-31 13:53:06 +01002253 struct nand_oobfree *free = chip->ecc.layout->oobfree;
2254 uint32_t boffs = 0, roffs = ops->ooboffs;
2255 size_t bytes = 0;
2256
Christian Hitz13fc0e22011-10-12 09:32:01 +02002257 for (; free->length && len; free++, len -= bytes) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002258 /* Read request not from offset 0? */
William Juul52c07962007-10-31 13:53:06 +01002259 if (unlikely(roffs)) {
2260 if (roffs >= free->length) {
2261 roffs -= free->length;
2262 continue;
2263 }
2264 boffs = free->offset + roffs;
2265 bytes = min_t(size_t, len,
2266 (free->length - roffs));
2267 roffs = 0;
2268 } else {
2269 bytes = min_t(size_t, len, free->length);
2270 boffs = free->offset;
2271 }
2272 memcpy(oob, chip->oob_poi + boffs, bytes);
2273 oob += bytes;
2274 }
2275 return oob;
2276 }
2277 default:
2278 BUG();
2279 }
2280 return NULL;
2281}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002282
2283/**
Heiko Schocherf5895d12014-06-24 10:10:04 +02002284 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
2285 * @mtd: MTD device structure
2286 * @retry_mode: the retry mode to use
2287 *
2288 * Some vendors supply a special command to shift the Vt threshold, to be used
2289 * when there are too many bitflips in a page (i.e., ECC error). After setting
2290 * a new threshold, the host should retry reading the page.
2291 */
2292static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
2293{
Scott Wood17fed142016-05-30 13:57:56 -05002294 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02002295
2296 pr_debug("setting READ RETRY mode %d\n", retry_mode);
2297
2298 if (retry_mode >= chip->read_retries)
2299 return -EINVAL;
2300
2301 if (!chip->setup_read_retry)
2302 return -EOPNOTSUPP;
2303
2304 return chip->setup_read_retry(mtd, retry_mode);
2305}
2306
2307/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002308 * nand_do_read_ops - [INTERN] Read data with ECC
2309 * @mtd: MTD device structure
2310 * @from: offset to read from
2311 * @ops: oob ops structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002312 *
William Juul52c07962007-10-31 13:53:06 +01002313 * Internal function. Called with chip held.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002314 */
William Juul52c07962007-10-31 13:53:06 +01002315static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
2316 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002317{
Sergey Lapin3a38a552013-01-14 03:46:50 +00002318 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Scott Wood17fed142016-05-30 13:57:56 -05002319 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +01002320 int ret = 0;
2321 uint32_t readlen = ops->len;
2322 uint32_t oobreadlen = ops->ooblen;
Scott Wood52ab7ce2016-05-30 13:57:58 -05002323 uint32_t max_oobsize = mtd_oobavail(mtd, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02002324
William Juul52c07962007-10-31 13:53:06 +01002325 uint8_t *bufpoi, *oob, *buf;
Scott Wood3ea94ed2015-06-26 19:03:26 -05002326 int use_bufpoi;
Paul Burton700a76c2013-09-04 15:16:56 +01002327 unsigned int max_bitflips = 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002328 int retry_mode = 0;
2329 bool ecc_fail = false;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002330
William Juul52c07962007-10-31 13:53:06 +01002331 chipnr = (int)(from >> chip->chip_shift);
2332 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002333
William Juul52c07962007-10-31 13:53:06 +01002334 realpage = (int)(from >> chip->page_shift);
2335 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002336
William Juul52c07962007-10-31 13:53:06 +01002337 col = (int)(from & (mtd->writesize - 1));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002338
William Juul52c07962007-10-31 13:53:06 +01002339 buf = ops->datbuf;
2340 oob = ops->oobbuf;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002341 oob_required = oob ? 1 : 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002342
Christian Hitz13fc0e22011-10-12 09:32:01 +02002343 while (1) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002344 unsigned int ecc_failures = mtd->ecc_stats.failed;
Scott Woodea95b642011-02-02 18:15:57 -06002345
Stefan Roese80877fa2022-09-02 14:10:46 +02002346 schedule();
William Juul52c07962007-10-31 13:53:06 +01002347 bytes = min(mtd->writesize - col, readlen);
2348 aligned = (bytes == mtd->writesize);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002349
Scott Wood3ea94ed2015-06-26 19:03:26 -05002350 if (!aligned)
2351 use_bufpoi = 1;
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09002352 else if (chip->options & NAND_USE_BOUNCE_BUFFER)
2353 use_bufpoi = !IS_ALIGNED((unsigned long)buf,
2354 chip->buf_align);
Scott Wood3ea94ed2015-06-26 19:03:26 -05002355 else
2356 use_bufpoi = 0;
2357
Sergey Lapin3a38a552013-01-14 03:46:50 +00002358 /* Is the current page in the buffer? */
William Juul52c07962007-10-31 13:53:06 +01002359 if (realpage != chip->pagebuf || oob) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05002360 bufpoi = use_bufpoi ? chip->buffers->databuf : buf;
2361
2362 if (use_bufpoi && aligned)
2363 pr_debug("%s: using read bounce buffer for buf@%p\n",
2364 __func__, buf);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002365
Heiko Schocherf5895d12014-06-24 10:10:04 +02002366read_retry:
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002367 if (nand_standard_page_accessors(&chip->ecc)) {
2368 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2369 if (ret)
2370 break;
2371 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002372
Paul Burton700a76c2013-09-04 15:16:56 +01002373 /*
2374 * Now read the page into the buffer. Absent an error,
2375 * the read methods return max bitflips per ecc step.
2376 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002377 if (unlikely(ops->mode == MTD_OPS_RAW))
2378 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
2379 oob_required,
2380 page);
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00002381 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
Heiko Schocherf5895d12014-06-24 10:10:04 +02002382 !oob)
Christian Hitz13fc0e22011-10-12 09:32:01 +02002383 ret = chip->ecc.read_subpage(mtd, chip,
Heiko Schocher081fe9e2014-07-15 16:08:43 +02002384 col, bytes, bufpoi,
2385 page);
William Juul52c07962007-10-31 13:53:06 +01002386 else
Sandeep Paulraj883189e2009-08-10 13:27:46 -04002387 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002388 oob_required, page);
2389 if (ret < 0) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05002390 if (use_bufpoi)
Sergey Lapin3a38a552013-01-14 03:46:50 +00002391 /* Invalidate page cache */
2392 chip->pagebuf = -1;
William Juul52c07962007-10-31 13:53:06 +01002393 break;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002394 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002395
Paul Burton700a76c2013-09-04 15:16:56 +01002396 max_bitflips = max_t(unsigned int, max_bitflips, ret);
2397
William Juul52c07962007-10-31 13:53:06 +01002398 /* Transfer not aligned data */
Scott Wood3ea94ed2015-06-26 19:03:26 -05002399 if (use_bufpoi) {
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00002400 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
Heiko Schocherf5895d12014-06-24 10:10:04 +02002401 !(mtd->ecc_stats.failed - ecc_failures) &&
Paul Burton700a76c2013-09-04 15:16:56 +01002402 (ops->mode != MTD_OPS_RAW)) {
Scott Wood3628f002008-10-24 16:20:43 -05002403 chip->pagebuf = realpage;
Paul Burton700a76c2013-09-04 15:16:56 +01002404 chip->pagebuf_bitflips = ret;
2405 } else {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002406 /* Invalidate page cache */
2407 chip->pagebuf = -1;
Paul Burton700a76c2013-09-04 15:16:56 +01002408 }
William Juul52c07962007-10-31 13:53:06 +01002409 memcpy(buf, chip->buffers->databuf + col, bytes);
2410 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002411
William Juul52c07962007-10-31 13:53:06 +01002412 if (unlikely(oob)) {
Christian Hitzb8a6b372011-10-12 09:32:02 +02002413 int toread = min(oobreadlen, max_oobsize);
2414
2415 if (toread) {
2416 oob = nand_transfer_oob(chip,
2417 oob, ops, toread);
2418 oobreadlen -= toread;
2419 }
William Juul52c07962007-10-31 13:53:06 +01002420 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002421
2422 if (chip->options & NAND_NEED_READRDY) {
2423 /* Apply delay or wait for ready/busy pin */
2424 if (!chip->dev_ready)
2425 udelay(chip->chip_delay);
2426 else
2427 nand_wait_ready(mtd);
2428 }
2429
2430 if (mtd->ecc_stats.failed - ecc_failures) {
2431 if (retry_mode + 1 < chip->read_retries) {
2432 retry_mode++;
2433 ret = nand_setup_read_retry(mtd,
2434 retry_mode);
2435 if (ret < 0)
2436 break;
2437
2438 /* Reset failures; retry */
2439 mtd->ecc_stats.failed = ecc_failures;
2440 goto read_retry;
2441 } else {
2442 /* No more retry modes; real failure */
2443 ecc_fail = true;
2444 }
2445 }
2446
2447 buf += bytes;
William Juul52c07962007-10-31 13:53:06 +01002448 } else {
2449 memcpy(buf, chip->buffers->databuf + col, bytes);
2450 buf += bytes;
Paul Burton700a76c2013-09-04 15:16:56 +01002451 max_bitflips = max_t(unsigned int, max_bitflips,
2452 chip->pagebuf_bitflips);
William Juul52c07962007-10-31 13:53:06 +01002453 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002454
William Juul52c07962007-10-31 13:53:06 +01002455 readlen -= bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002456
Heiko Schocherf5895d12014-06-24 10:10:04 +02002457 /* Reset to retry mode 0 */
2458 if (retry_mode) {
2459 ret = nand_setup_read_retry(mtd, 0);
2460 if (ret < 0)
2461 break;
2462 retry_mode = 0;
2463 }
2464
William Juul52c07962007-10-31 13:53:06 +01002465 if (!readlen)
2466 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002467
Sergey Lapin3a38a552013-01-14 03:46:50 +00002468 /* For subsequent reads align to page boundary */
William Juul52c07962007-10-31 13:53:06 +01002469 col = 0;
2470 /* Increment page address */
2471 realpage++;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002472
William Juul52c07962007-10-31 13:53:06 +01002473 page = realpage & chip->pagemask;
2474 /* Check, if we cross a chip boundary */
2475 if (!page) {
2476 chipnr++;
2477 chip->select_chip(mtd, -1);
2478 chip->select_chip(mtd, chipnr);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002479 }
William Juul52c07962007-10-31 13:53:06 +01002480 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002481 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002482
William Juul52c07962007-10-31 13:53:06 +01002483 ops->retlen = ops->len - (size_t) readlen;
2484 if (oob)
2485 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002486
Heiko Schocherf5895d12014-06-24 10:10:04 +02002487 if (ret < 0)
William Juul52c07962007-10-31 13:53:06 +01002488 return ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002489
Heiko Schocherf5895d12014-06-24 10:10:04 +02002490 if (ecc_fail)
William Juul52c07962007-10-31 13:53:06 +01002491 return -EBADMSG;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002492
Paul Burton700a76c2013-09-04 15:16:56 +01002493 return max_bitflips;
William Juul52c07962007-10-31 13:53:06 +01002494}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002495
William Juul52c07962007-10-31 13:53:06 +01002496/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002497 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
2498 * @mtd: mtd info structure
2499 * @chip: nand chip info structure
2500 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002501 */
2502static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002503 int page)
William Juul52c07962007-10-31 13:53:06 +01002504{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002505 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
William Juul52c07962007-10-31 13:53:06 +01002506}
2507
2508/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002509 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
William Juul52c07962007-10-31 13:53:06 +01002510 * with syndromes
Sergey Lapin3a38a552013-01-14 03:46:50 +00002511 * @mtd: mtd info structure
2512 * @chip: nand chip info structure
2513 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002514 */
2515static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002516 int page)
William Juul52c07962007-10-31 13:53:06 +01002517{
William Juul52c07962007-10-31 13:53:06 +01002518 int length = mtd->oobsize;
2519 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
2520 int eccsize = chip->ecc.size;
Scott Wood3ea94ed2015-06-26 19:03:26 -05002521 uint8_t *bufpoi = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002522 int i, toread, sndrnd = 0, pos, ret;
William Juul52c07962007-10-31 13:53:06 +01002523
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002524 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
2525 if (ret)
2526 return ret;
2527
William Juul52c07962007-10-31 13:53:06 +01002528 for (i = 0; i < chip->ecc.steps; i++) {
2529 if (sndrnd) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002530 int ret;
2531
William Juul52c07962007-10-31 13:53:06 +01002532 pos = eccsize + i * (eccsize + chunk);
2533 if (mtd->writesize > 512)
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002534 ret = nand_change_read_column_op(chip, pos,
2535 NULL, 0,
2536 false);
William Juul52c07962007-10-31 13:53:06 +01002537 else
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002538 ret = nand_read_page_op(chip, page, pos, NULL,
2539 0);
2540
2541 if (ret)
2542 return ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002543 } else
William Juul52c07962007-10-31 13:53:06 +01002544 sndrnd = 1;
2545 toread = min_t(int, length, chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002546
2547 ret = nand_read_data_op(chip, bufpoi, toread, false);
2548 if (ret)
2549 return ret;
2550
William Juul52c07962007-10-31 13:53:06 +01002551 bufpoi += toread;
2552 length -= toread;
2553 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002554 if (length > 0) {
2555 ret = nand_read_data_op(chip, bufpoi, length, false);
2556 if (ret)
2557 return ret;
2558 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002559
Sergey Lapin3a38a552013-01-14 03:46:50 +00002560 return 0;
William Juul52c07962007-10-31 13:53:06 +01002561}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002562
William Juul52c07962007-10-31 13:53:06 +01002563/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002564 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
2565 * @mtd: mtd info structure
2566 * @chip: nand chip info structure
2567 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002568 */
2569static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
2570 int page)
2571{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002572 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
2573 mtd->oobsize);
William Juul52c07962007-10-31 13:53:06 +01002574}
2575
2576/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002577 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
2578 * with syndrome - only for large page flash
2579 * @mtd: mtd info structure
2580 * @chip: nand chip info structure
2581 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002582 */
2583static int nand_write_oob_syndrome(struct mtd_info *mtd,
2584 struct nand_chip *chip, int page)
2585{
2586 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
2587 int eccsize = chip->ecc.size, length = mtd->oobsize;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002588 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;
William Juul52c07962007-10-31 13:53:06 +01002589 const uint8_t *bufpoi = chip->oob_poi;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002590
2591 /*
William Juul52c07962007-10-31 13:53:06 +01002592 * data-ecc-data-ecc ... ecc-oob
2593 * or
2594 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002595 */
William Juul52c07962007-10-31 13:53:06 +01002596 if (!chip->ecc.prepad && !chip->ecc.postpad) {
2597 pos = steps * (eccsize + chunk);
2598 steps = 0;
2599 } else
2600 pos = eccsize;
2601
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002602 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
2603 if (ret)
2604 return ret;
2605
William Juul52c07962007-10-31 13:53:06 +01002606 for (i = 0; i < steps; i++) {
2607 if (sndcmd) {
2608 if (mtd->writesize <= 512) {
2609 uint32_t fill = 0xFFFFFFFF;
2610
2611 len = eccsize;
2612 while (len > 0) {
2613 int num = min_t(int, len, 4);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002614
2615 ret = nand_write_data_op(chip, &fill,
2616 num, false);
2617 if (ret)
2618 return ret;
2619
William Juul52c07962007-10-31 13:53:06 +01002620 len -= num;
2621 }
2622 } else {
2623 pos = eccsize + i * (eccsize + chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002624 ret = nand_change_write_column_op(chip, pos,
2625 NULL, 0,
2626 false);
2627 if (ret)
2628 return ret;
William Juul52c07962007-10-31 13:53:06 +01002629 }
2630 } else
2631 sndcmd = 1;
2632 len = min_t(int, length, chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002633
2634 ret = nand_write_data_op(chip, bufpoi, len, false);
2635 if (ret)
2636 return ret;
2637
William Juul52c07962007-10-31 13:53:06 +01002638 bufpoi += len;
2639 length -= len;
2640 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002641 if (length > 0) {
2642 ret = nand_write_data_op(chip, bufpoi, length, false);
2643 if (ret)
2644 return ret;
2645 }
William Juul52c07962007-10-31 13:53:06 +01002646
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002647 return nand_prog_page_end_op(chip);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002648}
2649
2650/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002651 * nand_do_read_oob - [INTERN] NAND read out-of-band
2652 * @mtd: MTD device structure
2653 * @from: offset to read from
2654 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002655 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002656 * NAND read out-of-band data from the spare area.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002657 */
William Juul52c07962007-10-31 13:53:06 +01002658static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
2659 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002660{
Sergey Lapin3a38a552013-01-14 03:46:50 +00002661 int page, realpage, chipnr;
Scott Wood17fed142016-05-30 13:57:56 -05002662 struct nand_chip *chip = mtd_to_nand(mtd);
Sergey Lapin3a38a552013-01-14 03:46:50 +00002663 struct mtd_ecc_stats stats;
William Juul52c07962007-10-31 13:53:06 +01002664 int readlen = ops->ooblen;
2665 int len;
2666 uint8_t *buf = ops->oobbuf;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002667 int ret = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002668
Heiko Schocherf5895d12014-06-24 10:10:04 +02002669 pr_debug("%s: from = 0x%08Lx, len = %i\n",
Christian Hitz13fc0e22011-10-12 09:32:01 +02002670 __func__, (unsigned long long)from, readlen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002671
Sergey Lapin3a38a552013-01-14 03:46:50 +00002672 stats = mtd->ecc_stats;
2673
Scott Wood52ab7ce2016-05-30 13:57:58 -05002674 len = mtd_oobavail(mtd, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002675
William Juul52c07962007-10-31 13:53:06 +01002676 if (unlikely(ops->ooboffs >= len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002677 pr_debug("%s: attempt to start read outside oob\n",
2678 __func__);
William Juul52c07962007-10-31 13:53:06 +01002679 return -EINVAL;
2680 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002681
2682 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01002683 if (unlikely(from >= mtd->size ||
2684 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
2685 (from >> chip->page_shift)) * len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002686 pr_debug("%s: attempt to read beyond end of device\n",
2687 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002688 return -EINVAL;
2689 }
2690
William Juul52c07962007-10-31 13:53:06 +01002691 chipnr = (int)(from >> chip->chip_shift);
2692 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002693
William Juul52c07962007-10-31 13:53:06 +01002694 /* Shift to get page */
2695 realpage = (int)(from >> chip->page_shift);
2696 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002697
Christian Hitz13fc0e22011-10-12 09:32:01 +02002698 while (1) {
Stefan Roese80877fa2022-09-02 14:10:46 +02002699 schedule();
Heiko Schocherf5895d12014-06-24 10:10:04 +02002700
Sergey Lapin3a38a552013-01-14 03:46:50 +00002701 if (ops->mode == MTD_OPS_RAW)
2702 ret = chip->ecc.read_oob_raw(mtd, chip, page);
2703 else
2704 ret = chip->ecc.read_oob(mtd, chip, page);
2705
2706 if (ret < 0)
2707 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002708
William Juul52c07962007-10-31 13:53:06 +01002709 len = min(len, readlen);
2710 buf = nand_transfer_oob(chip, buf, ops, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002711
Heiko Schocherf5895d12014-06-24 10:10:04 +02002712 if (chip->options & NAND_NEED_READRDY) {
2713 /* Apply delay or wait for ready/busy pin */
2714 if (!chip->dev_ready)
2715 udelay(chip->chip_delay);
2716 else
2717 nand_wait_ready(mtd);
2718 }
2719
William Juul52c07962007-10-31 13:53:06 +01002720 readlen -= len;
2721 if (!readlen)
2722 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002723
William Juul52c07962007-10-31 13:53:06 +01002724 /* Increment page address */
2725 realpage++;
2726
2727 page = realpage & chip->pagemask;
2728 /* Check, if we cross a chip boundary */
2729 if (!page) {
2730 chipnr++;
2731 chip->select_chip(mtd, -1);
2732 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002733 }
William Juul52c07962007-10-31 13:53:06 +01002734 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002735 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002736
Sergey Lapin3a38a552013-01-14 03:46:50 +00002737 ops->oobretlen = ops->ooblen - readlen;
2738
2739 if (ret < 0)
2740 return ret;
2741
2742 if (mtd->ecc_stats.failed - stats.failed)
2743 return -EBADMSG;
2744
2745 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002746}
2747
2748/**
William Juul52c07962007-10-31 13:53:06 +01002749 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00002750 * @mtd: MTD device structure
2751 * @from: offset to read from
2752 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002753 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002754 * NAND read data and/or out-of-band data.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002755 */
William Juul52c07962007-10-31 13:53:06 +01002756static int nand_read_oob(struct mtd_info *mtd, loff_t from,
2757 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002758{
William Juul52c07962007-10-31 13:53:06 +01002759 int ret = -ENOTSUPP;
2760
2761 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002762
2763 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01002764 if (ops->datbuf && (from + ops->len) > mtd->size) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002765 pr_debug("%s: attempt to read beyond end of device\n",
2766 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002767 return -EINVAL;
2768 }
2769
Heiko Schocherf5895d12014-06-24 10:10:04 +02002770 nand_get_device(mtd, FL_READING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002771
Christian Hitz13fc0e22011-10-12 09:32:01 +02002772 switch (ops->mode) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002773 case MTD_OPS_PLACE_OOB:
2774 case MTD_OPS_AUTO_OOB:
2775 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01002776 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002777
William Juul52c07962007-10-31 13:53:06 +01002778 default:
2779 goto out;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002780 }
2781
William Juul52c07962007-10-31 13:53:06 +01002782 if (!ops->datbuf)
2783 ret = nand_do_read_oob(mtd, from, ops);
2784 else
2785 ret = nand_do_read_ops(mtd, from, ops);
2786
Christian Hitz13fc0e22011-10-12 09:32:01 +02002787out:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002788 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +01002789 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002790}
2791
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002792/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002793 * nand_write_page_raw - [INTERN] raw page write function
2794 * @mtd: mtd info structure
2795 * @chip: nand chip info structure
2796 * @buf: data buffer
2797 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002798 * @page: page number to write
David Brownellee86b8d2009-11-07 16:27:01 -05002799 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002800 * Not for syndrome calculating ECC controllers, which use a special oob layout.
William Juul52c07962007-10-31 13:53:06 +01002801 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002802static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood52ab7ce2016-05-30 13:57:58 -05002803 const uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002804{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002805 int ret;
2806
2807 ret = nand_write_data_op(chip, buf, mtd->writesize, false);
2808 if (ret)
2809 return ret;
2810
2811 if (oob_required) {
2812 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,
2813 false);
2814 if (ret)
2815 return ret;
2816 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00002817
2818 return 0;
William Juul52c07962007-10-31 13:53:06 +01002819}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002820
William Juul52c07962007-10-31 13:53:06 +01002821/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002822 * nand_write_page_raw_syndrome - [INTERN] raw page write function
2823 * @mtd: mtd info structure
2824 * @chip: nand chip info structure
2825 * @buf: data buffer
2826 * @oob_required: must write chip->oob_poi to OOB
Scott Wood52ab7ce2016-05-30 13:57:58 -05002827 * @page: page number to write
David Brownellee86b8d2009-11-07 16:27:01 -05002828 *
2829 * We need a special oob layout and handling even when ECC isn't checked.
2830 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002831static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
Christian Hitz13fc0e22011-10-12 09:32:01 +02002832 struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05002833 const uint8_t *buf, int oob_required,
2834 int page)
David Brownellee86b8d2009-11-07 16:27:01 -05002835{
2836 int eccsize = chip->ecc.size;
2837 int eccbytes = chip->ecc.bytes;
2838 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002839 int steps, size, ret;
David Brownellee86b8d2009-11-07 16:27:01 -05002840
2841 for (steps = chip->ecc.steps; steps > 0; steps--) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002842 ret = nand_write_data_op(chip, buf, eccsize, false);
2843 if (ret)
2844 return ret;
2845
David Brownellee86b8d2009-11-07 16:27:01 -05002846 buf += eccsize;
2847
2848 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002849 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
2850 false);
2851 if (ret)
2852 return ret;
2853
David Brownellee86b8d2009-11-07 16:27:01 -05002854 oob += chip->ecc.prepad;
2855 }
2856
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002857 ret = nand_write_data_op(chip, oob, eccbytes, false);
2858 if (ret)
2859 return ret;
2860
David Brownellee86b8d2009-11-07 16:27:01 -05002861 oob += eccbytes;
2862
2863 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002864 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
2865 false);
2866 if (ret)
2867 return ret;
2868
David Brownellee86b8d2009-11-07 16:27:01 -05002869 oob += chip->ecc.postpad;
2870 }
2871 }
2872
2873 size = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002874 if (size) {
2875 ret = nand_write_data_op(chip, oob, size, false);
2876 if (ret)
2877 return ret;
2878 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00002879
2880 return 0;
David Brownellee86b8d2009-11-07 16:27:01 -05002881}
2882/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002883 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
2884 * @mtd: mtd info structure
2885 * @chip: nand chip info structure
2886 * @buf: data buffer
2887 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002888 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002889 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002890static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood52ab7ce2016-05-30 13:57:58 -05002891 const uint8_t *buf, int oob_required,
2892 int page)
William Juul52c07962007-10-31 13:53:06 +01002893{
2894 int i, eccsize = chip->ecc.size;
2895 int eccbytes = chip->ecc.bytes;
2896 int eccsteps = chip->ecc.steps;
2897 uint8_t *ecc_calc = chip->buffers->ecccalc;
2898 const uint8_t *p = buf;
2899 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002900
Sergey Lapin3a38a552013-01-14 03:46:50 +00002901 /* Software ECC calculation */
William Juul52c07962007-10-31 13:53:06 +01002902 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
2903 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002904
William Juul52c07962007-10-31 13:53:06 +01002905 for (i = 0; i < chip->ecc.total; i++)
2906 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002907
Scott Wood46e13102016-05-30 13:57:57 -05002908 return chip->ecc.write_page_raw(mtd, chip, buf, 1, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002909}
2910
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002911/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002912 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
2913 * @mtd: mtd info structure
2914 * @chip: nand chip info structure
2915 * @buf: data buffer
2916 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002917 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002918 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002919static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05002920 const uint8_t *buf, int oob_required,
2921 int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002922{
William Juul52c07962007-10-31 13:53:06 +01002923 int i, eccsize = chip->ecc.size;
2924 int eccbytes = chip->ecc.bytes;
2925 int eccsteps = chip->ecc.steps;
2926 uint8_t *ecc_calc = chip->buffers->ecccalc;
2927 const uint8_t *p = buf;
2928 uint32_t *eccpos = chip->ecc.layout->eccpos;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002929 int ret;
William Juul52c07962007-10-31 13:53:06 +01002930
2931 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2932 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002933
2934 ret = nand_write_data_op(chip, p, eccsize, false);
2935 if (ret)
2936 return ret;
2937
William Juul52c07962007-10-31 13:53:06 +01002938 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2939 }
2940
2941 for (i = 0; i < chip->ecc.total; i++)
2942 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2943
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002944 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
2945 if (ret)
2946 return ret;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002947
2948 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002949}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002950
Heiko Schocherf5895d12014-06-24 10:10:04 +02002951/**
Scott Wood3ea94ed2015-06-26 19:03:26 -05002952 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
Heiko Schocherf5895d12014-06-24 10:10:04 +02002953 * @mtd: mtd info structure
2954 * @chip: nand chip info structure
2955 * @offset: column address of subpage within the page
2956 * @data_len: data length
2957 * @buf: data buffer
2958 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002959 * @page: page number to write
Heiko Schocherf5895d12014-06-24 10:10:04 +02002960 */
2961static int nand_write_subpage_hwecc(struct mtd_info *mtd,
2962 struct nand_chip *chip, uint32_t offset,
2963 uint32_t data_len, const uint8_t *buf,
Scott Wood46e13102016-05-30 13:57:57 -05002964 int oob_required, int page)
Heiko Schocherf5895d12014-06-24 10:10:04 +02002965{
2966 uint8_t *oob_buf = chip->oob_poi;
2967 uint8_t *ecc_calc = chip->buffers->ecccalc;
2968 int ecc_size = chip->ecc.size;
2969 int ecc_bytes = chip->ecc.bytes;
2970 int ecc_steps = chip->ecc.steps;
2971 uint32_t *eccpos = chip->ecc.layout->eccpos;
2972 uint32_t start_step = offset / ecc_size;
2973 uint32_t end_step = (offset + data_len - 1) / ecc_size;
2974 int oob_bytes = mtd->oobsize / ecc_steps;
2975 int step, i;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002976 int ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002977
2978 for (step = 0; step < ecc_steps; step++) {
2979 /* configure controller for WRITE access */
2980 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2981
2982 /* write data (untouched subpages already masked by 0xFF) */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002983 ret = nand_write_data_op(chip, buf, ecc_size, false);
2984 if (ret)
2985 return ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002986
2987 /* mask ECC of un-touched subpages by padding 0xFF */
2988 if ((step < start_step) || (step > end_step))
2989 memset(ecc_calc, 0xff, ecc_bytes);
2990 else
2991 chip->ecc.calculate(mtd, buf, ecc_calc);
2992
2993 /* mask OOB of un-touched subpages by padding 0xFF */
2994 /* if oob_required, preserve OOB metadata of written subpage */
2995 if (!oob_required || (step < start_step) || (step > end_step))
2996 memset(oob_buf, 0xff, oob_bytes);
2997
2998 buf += ecc_size;
2999 ecc_calc += ecc_bytes;
3000 oob_buf += oob_bytes;
3001 }
3002
3003 /* copy calculated ECC for whole page to chip->buffer->oob */
3004 /* this include masked-value(0xFF) for unwritten subpages */
3005 ecc_calc = chip->buffers->ecccalc;
3006 for (i = 0; i < chip->ecc.total; i++)
3007 chip->oob_poi[eccpos[i]] = ecc_calc[i];
3008
3009 /* write OOB buffer to NAND device */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003010 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
3011 if (ret)
3012 return ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003013
3014 return 0;
3015}
3016
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003017/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003018 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3019 * @mtd: mtd info structure
3020 * @chip: nand chip info structure
3021 * @buf: data buffer
3022 * @oob_required: must write chip->oob_poi to OOB
Scott Wood52ab7ce2016-05-30 13:57:58 -05003023 * @page: page number to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003024 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003025 * The hw generator calculates the error syndrome automatically. Therefore we
3026 * need a special oob layout and handling.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003027 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003028static int nand_write_page_syndrome(struct mtd_info *mtd,
3029 struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05003030 const uint8_t *buf, int oob_required,
3031 int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003032{
William Juul52c07962007-10-31 13:53:06 +01003033 int i, eccsize = chip->ecc.size;
3034 int eccbytes = chip->ecc.bytes;
3035 int eccsteps = chip->ecc.steps;
3036 const uint8_t *p = buf;
3037 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003038 int ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003039
William Juul52c07962007-10-31 13:53:06 +01003040 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
William Juul52c07962007-10-31 13:53:06 +01003041 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003042
3043 ret = nand_write_data_op(chip, p, eccsize, false);
3044 if (ret)
3045 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003046
William Juul52c07962007-10-31 13:53:06 +01003047 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003048 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
3049 false);
3050 if (ret)
3051 return ret;
3052
William Juul52c07962007-10-31 13:53:06 +01003053 oob += chip->ecc.prepad;
3054 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003055
William Juul52c07962007-10-31 13:53:06 +01003056 chip->ecc.calculate(mtd, p, oob);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003057
3058 ret = nand_write_data_op(chip, oob, eccbytes, false);
3059 if (ret)
3060 return ret;
3061
William Juul52c07962007-10-31 13:53:06 +01003062 oob += eccbytes;
3063
3064 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003065 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
3066 false);
3067 if (ret)
3068 return ret;
3069
William Juul52c07962007-10-31 13:53:06 +01003070 oob += chip->ecc.postpad;
3071 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003072 }
3073
William Juul52c07962007-10-31 13:53:06 +01003074 /* Calculate remaining oob bytes */
3075 i = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003076 if (i) {
3077 ret = nand_write_data_op(chip, oob, i, false);
3078 if (ret)
3079 return ret;
3080 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00003081
3082 return 0;
William Juul52c07962007-10-31 13:53:06 +01003083}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003084
William Juul52c07962007-10-31 13:53:06 +01003085/**
3086 * nand_write_page - [REPLACEABLE] write one page
Sergey Lapin3a38a552013-01-14 03:46:50 +00003087 * @mtd: MTD device structure
3088 * @chip: NAND chip descriptor
Heiko Schocherf5895d12014-06-24 10:10:04 +02003089 * @offset: address offset within the page
3090 * @data_len: length of actual data to be written
Sergey Lapin3a38a552013-01-14 03:46:50 +00003091 * @buf: the data to write
3092 * @oob_required: must write chip->oob_poi to OOB
3093 * @page: page number to write
Sergey Lapin3a38a552013-01-14 03:46:50 +00003094 * @raw: use _raw version of write_page
William Juul52c07962007-10-31 13:53:06 +01003095 */
3096static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Heiko Schocherf5895d12014-06-24 10:10:04 +02003097 uint32_t offset, int data_len, const uint8_t *buf,
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003098 int oob_required, int page, int raw)
William Juul52c07962007-10-31 13:53:06 +01003099{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003100 int status, subpage;
3101
3102 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3103 chip->ecc.write_subpage)
3104 subpage = offset || (data_len < mtd->writesize);
3105 else
3106 subpage = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003107
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003108 if (nand_standard_page_accessors(&chip->ecc)) {
3109 status = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3110 if (status)
3111 return status;
3112 }
William Juul52c07962007-10-31 13:53:06 +01003113
3114 if (unlikely(raw))
Heiko Schocherf5895d12014-06-24 10:10:04 +02003115 status = chip->ecc.write_page_raw(mtd, chip, buf,
Scott Wood46e13102016-05-30 13:57:57 -05003116 oob_required, page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003117 else if (subpage)
3118 status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
Scott Wood52ab7ce2016-05-30 13:57:58 -05003119 buf, oob_required, page);
William Juul52c07962007-10-31 13:53:06 +01003120 else
Scott Wood46e13102016-05-30 13:57:57 -05003121 status = chip->ecc.write_page(mtd, chip, buf, oob_required,
3122 page);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003123
3124 if (status < 0)
3125 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003126
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003127 if (nand_standard_page_accessors(&chip->ecc))
3128 return nand_prog_page_end_op(chip);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003129
William Juul52c07962007-10-31 13:53:06 +01003130 return 0;
3131}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003132
William Juul52c07962007-10-31 13:53:06 +01003133/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003134 * nand_fill_oob - [INTERN] Transfer client buffer to oob
3135 * @mtd: MTD device structure
3136 * @oob: oob data buffer
3137 * @len: oob data write length
3138 * @ops: oob ops structure
William Juul52c07962007-10-31 13:53:06 +01003139 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003140static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
3141 struct mtd_oob_ops *ops)
William Juul52c07962007-10-31 13:53:06 +01003142{
Scott Wood17fed142016-05-30 13:57:56 -05003143 struct nand_chip *chip = mtd_to_nand(mtd);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003144
3145 /*
3146 * Initialise to all 0xFF, to avoid the possibility of left over OOB
3147 * data from a previous OOB read.
3148 */
3149 memset(chip->oob_poi, 0xff, mtd->oobsize);
3150
Christian Hitz13fc0e22011-10-12 09:32:01 +02003151 switch (ops->mode) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003152
Sergey Lapin3a38a552013-01-14 03:46:50 +00003153 case MTD_OPS_PLACE_OOB:
3154 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01003155 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
3156 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003157
Sergey Lapin3a38a552013-01-14 03:46:50 +00003158 case MTD_OPS_AUTO_OOB: {
William Juul52c07962007-10-31 13:53:06 +01003159 struct nand_oobfree *free = chip->ecc.layout->oobfree;
3160 uint32_t boffs = 0, woffs = ops->ooboffs;
3161 size_t bytes = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003162
Christian Hitz13fc0e22011-10-12 09:32:01 +02003163 for (; free->length && len; free++, len -= bytes) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003164 /* Write request not from offset 0? */
William Juul52c07962007-10-31 13:53:06 +01003165 if (unlikely(woffs)) {
3166 if (woffs >= free->length) {
3167 woffs -= free->length;
3168 continue;
3169 }
3170 boffs = free->offset + woffs;
3171 bytes = min_t(size_t, len,
3172 (free->length - woffs));
3173 woffs = 0;
3174 } else {
3175 bytes = min_t(size_t, len, free->length);
3176 boffs = free->offset;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003177 }
William Juul52c07962007-10-31 13:53:06 +01003178 memcpy(chip->oob_poi + boffs, oob, bytes);
3179 oob += bytes;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003180 }
William Juul52c07962007-10-31 13:53:06 +01003181 return oob;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003182 }
William Juul52c07962007-10-31 13:53:06 +01003183 default:
3184 BUG();
3185 }
3186 return NULL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003187}
3188
Christian Hitzb8a6b372011-10-12 09:32:02 +02003189#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003190
3191/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003192 * nand_do_write_ops - [INTERN] NAND write with ECC
3193 * @mtd: MTD device structure
3194 * @to: offset to write to
3195 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003196 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003197 * NAND write with ECC.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003198 */
William Juul52c07962007-10-31 13:53:06 +01003199static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
3200 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003201{
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003202 int chipnr, realpage, page, column;
Scott Wood17fed142016-05-30 13:57:56 -05003203 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +01003204 uint32_t writelen = ops->len;
Christian Hitzb8a6b372011-10-12 09:32:02 +02003205
3206 uint32_t oobwritelen = ops->ooblen;
Scott Wood52ab7ce2016-05-30 13:57:58 -05003207 uint32_t oobmaxlen = mtd_oobavail(mtd, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003208
William Juul52c07962007-10-31 13:53:06 +01003209 uint8_t *oob = ops->oobbuf;
3210 uint8_t *buf = ops->datbuf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003211 int ret;
Sergey Lapin3a38a552013-01-14 03:46:50 +00003212 int oob_required = oob ? 1 : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003213
William Juul52c07962007-10-31 13:53:06 +01003214 ops->retlen = 0;
3215 if (!writelen)
3216 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003217
Heiko Schocherf5895d12014-06-24 10:10:04 +02003218 /* Reject writes, which are not page aligned */
3219 if (NOTALIGNED(to)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003220 pr_notice("%s: attempt to write non page aligned data\n",
3221 __func__);
William Juul52c07962007-10-31 13:53:06 +01003222 return -EINVAL;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003223 }
3224
3225 column = to & (mtd->writesize - 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003226
William Juul52c07962007-10-31 13:53:06 +01003227 chipnr = (int)(to >> chip->chip_shift);
3228 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003229
3230 /* Check, if it is write protected */
William Juul52c07962007-10-31 13:53:06 +01003231 if (nand_check_wp(mtd)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003232 ret = -EIO;
3233 goto err_out;
William Juul52c07962007-10-31 13:53:06 +01003234 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003235
William Juul52c07962007-10-31 13:53:06 +01003236 realpage = (int)(to >> chip->page_shift);
3237 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003238
William Juul52c07962007-10-31 13:53:06 +01003239 /* Invalidate the page cache, when we write to the cached page */
Scott Wood3ea94ed2015-06-26 19:03:26 -05003240 if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
3241 ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len))
William Juul52c07962007-10-31 13:53:06 +01003242 chip->pagebuf = -1;
3243
Christian Hitzb8a6b372011-10-12 09:32:02 +02003244 /* Don't allow multipage oob writes with offset */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003245 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
3246 ret = -EINVAL;
3247 goto err_out;
3248 }
Christian Hitzb8a6b372011-10-12 09:32:02 +02003249
Christian Hitz13fc0e22011-10-12 09:32:01 +02003250 while (1) {
William Juul52c07962007-10-31 13:53:06 +01003251 int bytes = mtd->writesize;
William Juul52c07962007-10-31 13:53:06 +01003252 uint8_t *wbuf = buf;
Scott Wood3ea94ed2015-06-26 19:03:26 -05003253 int use_bufpoi;
Hector Palaciose4fcdbb2016-07-18 09:37:41 +02003254 int part_pagewr = (column || writelen < mtd->writesize);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003255
3256 if (part_pagewr)
3257 use_bufpoi = 1;
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09003258 else if (chip->options & NAND_USE_BOUNCE_BUFFER)
3259 use_bufpoi = !IS_ALIGNED((unsigned long)buf,
3260 chip->buf_align);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003261 else
3262 use_bufpoi = 0;
William Juul52c07962007-10-31 13:53:06 +01003263
Stefan Roese80877fa2022-09-02 14:10:46 +02003264 schedule();
Scott Wood3ea94ed2015-06-26 19:03:26 -05003265 /* Partial page write?, or need to use bounce buffer */
3266 if (use_bufpoi) {
3267 pr_debug("%s: using write bounce buffer for buf@%p\n",
3268 __func__, buf);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003269 if (part_pagewr)
3270 bytes = min_t(int, bytes - column, writelen);
William Juul52c07962007-10-31 13:53:06 +01003271 chip->pagebuf = -1;
3272 memset(chip->buffers->databuf, 0xff, mtd->writesize);
3273 memcpy(&chip->buffers->databuf[column], buf, bytes);
3274 wbuf = chip->buffers->databuf;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02003275 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003276
Christian Hitzb8a6b372011-10-12 09:32:02 +02003277 if (unlikely(oob)) {
3278 size_t len = min(oobwritelen, oobmaxlen);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003279 oob = nand_fill_oob(mtd, oob, len, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003280 oobwritelen -= len;
Sergey Lapin3a38a552013-01-14 03:46:50 +00003281 } else {
3282 /* We still need to erase leftover OOB data */
3283 memset(chip->oob_poi, 0xff, mtd->oobsize);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003284 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02003285 ret = chip->write_page(mtd, chip, column, bytes, wbuf,
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003286 oob_required, page,
Heiko Schocherf5895d12014-06-24 10:10:04 +02003287 (ops->mode == MTD_OPS_RAW));
William Juul52c07962007-10-31 13:53:06 +01003288 if (ret)
3289 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003290
William Juul52c07962007-10-31 13:53:06 +01003291 writelen -= bytes;
3292 if (!writelen)
3293 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003294
Heiko Schocherf5895d12014-06-24 10:10:04 +02003295 column = 0;
3296 buf += bytes;
3297 realpage++;
3298
3299 page = realpage & chip->pagemask;
3300 /* Check, if we cross a chip boundary */
3301 if (!page) {
3302 chipnr++;
3303 chip->select_chip(mtd, -1);
3304 chip->select_chip(mtd, chipnr);
3305 }
3306 }
3307
3308 ops->retlen = ops->len - writelen;
3309 if (unlikely(oob))
3310 ops->oobretlen = ops->ooblen;
3311
3312err_out:
3313 chip->select_chip(mtd, -1);
3314 return ret;
3315}
3316
3317/**
3318 * panic_nand_write - [MTD Interface] NAND write with ECC
3319 * @mtd: MTD device structure
3320 * @to: offset to write to
3321 * @len: number of bytes to write
3322 * @retlen: pointer to variable to store the number of written bytes
3323 * @buf: the data to write
3324 *
3325 * NAND write with ECC. Used when performing writes in interrupt context, this
3326 * may for example be called by mtdoops when writing an oops while in panic.
3327 */
3328static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
3329 size_t *retlen, const uint8_t *buf)
3330{
Scott Wood17fed142016-05-30 13:57:56 -05003331 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003332 struct mtd_oob_ops ops;
3333 int ret;
3334
3335 /* Wait for the device to get ready */
3336 panic_nand_wait(mtd, chip, 400);
3337
3338 /* Grab the device */
3339 panic_nand_get_device(chip, mtd, FL_WRITING);
3340
Scott Wood3ea94ed2015-06-26 19:03:26 -05003341 memset(&ops, 0, sizeof(ops));
Heiko Schocherf5895d12014-06-24 10:10:04 +02003342 ops.len = len;
3343 ops.datbuf = (uint8_t *)buf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003344 ops.mode = MTD_OPS_PLACE_OOB;
William Juul52c07962007-10-31 13:53:06 +01003345
Heiko Schocherf5895d12014-06-24 10:10:04 +02003346 ret = nand_do_write_ops(mtd, to, &ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003347
Sergey Lapin3a38a552013-01-14 03:46:50 +00003348 *retlen = ops.retlen;
William Juul52c07962007-10-31 13:53:06 +01003349 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003350}
3351
3352/**
William Juul52c07962007-10-31 13:53:06 +01003353 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00003354 * @mtd: MTD device structure
3355 * @to: offset to write to
3356 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003357 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003358 * NAND write out-of-band.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003359 */
William Juul52c07962007-10-31 13:53:06 +01003360static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
3361 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003362{
William Juul52c07962007-10-31 13:53:06 +01003363 int chipnr, page, status, len;
Scott Wood17fed142016-05-30 13:57:56 -05003364 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003365
Heiko Schocherf5895d12014-06-24 10:10:04 +02003366 pr_debug("%s: to = 0x%08x, len = %i\n",
Christian Hitz13fc0e22011-10-12 09:32:01 +02003367 __func__, (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003368
Scott Wood52ab7ce2016-05-30 13:57:58 -05003369 len = mtd_oobavail(mtd, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003370
3371 /* Do not allow write past end of page */
William Juul52c07962007-10-31 13:53:06 +01003372 if ((ops->ooboffs + ops->ooblen) > len) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003373 pr_debug("%s: attempt to write past end of page\n",
3374 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003375 return -EINVAL;
3376 }
3377
William Juul52c07962007-10-31 13:53:06 +01003378 if (unlikely(ops->ooboffs >= len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003379 pr_debug("%s: attempt to start write outside oob\n",
3380 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003381 return -EINVAL;
3382 }
3383
Christian Hitz13fc0e22011-10-12 09:32:01 +02003384 /* Do not allow write past end of device */
William Juul52c07962007-10-31 13:53:06 +01003385 if (unlikely(to >= mtd->size ||
3386 ops->ooboffs + ops->ooblen >
3387 ((mtd->size >> chip->page_shift) -
3388 (to >> chip->page_shift)) * len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003389 pr_debug("%s: attempt to write beyond end of device\n",
3390 __func__);
William Juul52c07962007-10-31 13:53:06 +01003391 return -EINVAL;
3392 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003393
William Juul52c07962007-10-31 13:53:06 +01003394 chipnr = (int)(to >> chip->chip_shift);
William Juul52c07962007-10-31 13:53:06 +01003395
3396 /*
3397 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
3398 * of my DiskOnChip 2000 test units) will clear the whole data page too
3399 * if we don't do this. I have no clue why, but I seem to have 'fixed'
3400 * it in the doc2000 driver in August 1999. dwmw2.
3401 */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09003402 nand_reset(chip, chipnr);
3403
3404 chip->select_chip(mtd, chipnr);
3405
3406 /* Shift to get page */
3407 page = (int)(to >> chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003408
3409 /* Check, if it is write protected */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003410 if (nand_check_wp(mtd)) {
3411 chip->select_chip(mtd, -1);
William Juul52c07962007-10-31 13:53:06 +01003412 return -EROFS;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003413 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003414
William Juul52c07962007-10-31 13:53:06 +01003415 /* Invalidate the page cache, if we write to the cached page */
3416 if (page == chip->pagebuf)
3417 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003418
Sergey Lapin3a38a552013-01-14 03:46:50 +00003419 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
3420
3421 if (ops->mode == MTD_OPS_RAW)
3422 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
3423 else
3424 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003425
Heiko Schocherf5895d12014-06-24 10:10:04 +02003426 chip->select_chip(mtd, -1);
3427
William Juul52c07962007-10-31 13:53:06 +01003428 if (status)
3429 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003430
William Juul52c07962007-10-31 13:53:06 +01003431 ops->oobretlen = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003432
William Juul52c07962007-10-31 13:53:06 +01003433 return 0;
3434}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003435
William Juul52c07962007-10-31 13:53:06 +01003436/**
3437 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00003438 * @mtd: MTD device structure
3439 * @to: offset to write to
3440 * @ops: oob operation description structure
William Juul52c07962007-10-31 13:53:06 +01003441 */
3442static int nand_write_oob(struct mtd_info *mtd, loff_t to,
3443 struct mtd_oob_ops *ops)
3444{
William Juul52c07962007-10-31 13:53:06 +01003445 int ret = -ENOTSUPP;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003446
William Juul52c07962007-10-31 13:53:06 +01003447 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003448
William Juul52c07962007-10-31 13:53:06 +01003449 /* Do not allow writes past end of device */
3450 if (ops->datbuf && (to + ops->len) > mtd->size) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003451 pr_debug("%s: attempt to write beyond end of device\n",
3452 __func__);
William Juul52c07962007-10-31 13:53:06 +01003453 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003454 }
William Juul52c07962007-10-31 13:53:06 +01003455
Heiko Schocherf5895d12014-06-24 10:10:04 +02003456 nand_get_device(mtd, FL_WRITING);
William Juul52c07962007-10-31 13:53:06 +01003457
Christian Hitz13fc0e22011-10-12 09:32:01 +02003458 switch (ops->mode) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003459 case MTD_OPS_PLACE_OOB:
3460 case MTD_OPS_AUTO_OOB:
3461 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01003462 break;
3463
3464 default:
3465 goto out;
3466 }
3467
3468 if (!ops->datbuf)
3469 ret = nand_do_write_oob(mtd, to, ops);
3470 else
3471 ret = nand_do_write_ops(mtd, to, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003472
Christian Hitz13fc0e22011-10-12 09:32:01 +02003473out:
William Juul52c07962007-10-31 13:53:06 +01003474 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003475 return ret;
3476}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003477
3478/**
Scott Wood3ea94ed2015-06-26 19:03:26 -05003479 * single_erase - [GENERIC] NAND standard block erase command function
Sergey Lapin3a38a552013-01-14 03:46:50 +00003480 * @mtd: MTD device structure
3481 * @page: the page address of the block which will be erased
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003482 *
Scott Wood3ea94ed2015-06-26 19:03:26 -05003483 * Standard erase command for NAND chips. Returns NAND status.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003484 */
Scott Wood3ea94ed2015-06-26 19:03:26 -05003485static int single_erase(struct mtd_info *mtd, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003486{
Scott Wood17fed142016-05-30 13:57:56 -05003487 struct nand_chip *chip = mtd_to_nand(mtd);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003488 unsigned int eraseblock;
3489
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003490 /* Send commands to erase a block */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003491 eraseblock = page >> (chip->phys_erase_shift - chip->page_shift);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003492
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003493 return nand_erase_op(chip, eraseblock);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003494}
3495
3496/**
3497 * nand_erase - [MTD Interface] erase block(s)
Sergey Lapin3a38a552013-01-14 03:46:50 +00003498 * @mtd: MTD device structure
3499 * @instr: erase instruction
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003500 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003501 * Erase one ore more blocks.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003502 */
William Juul52c07962007-10-31 13:53:06 +01003503static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003504{
William Juul52c07962007-10-31 13:53:06 +01003505 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003506}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003507
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003508/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003509 * nand_erase_nand - [INTERN] erase block(s)
3510 * @mtd: MTD device structure
3511 * @instr: erase instruction
3512 * @allowbbt: allow erasing the bbt area
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003513 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003514 * Erase one ore more blocks.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003515 */
William Juul52c07962007-10-31 13:53:06 +01003516int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
3517 int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003518{
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04003519 int page, status, pages_per_block, ret, chipnr;
Scott Wood17fed142016-05-30 13:57:56 -05003520 struct nand_chip *chip = mtd_to_nand(mtd);
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04003521 loff_t len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003522
Heiko Schocherf5895d12014-06-24 10:10:04 +02003523 pr_debug("%s: start = 0x%012llx, len = %llu\n",
3524 __func__, (unsigned long long)instr->addr,
3525 (unsigned long long)instr->len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003526
Christian Hitzb8a6b372011-10-12 09:32:02 +02003527 if (check_offs_len(mtd, instr->addr, instr->len))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003528 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003529
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003530 /* Grab the lock and see if the device is available */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003531 nand_get_device(mtd, FL_ERASING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003532
3533 /* Shift to get first page */
William Juul52c07962007-10-31 13:53:06 +01003534 page = (int)(instr->addr >> chip->page_shift);
3535 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003536
3537 /* Calculate pages in each block */
William Juul52c07962007-10-31 13:53:06 +01003538 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juulb76ec382007-11-08 10:39:53 +01003539
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003540 /* Select the NAND device */
William Juul52c07962007-10-31 13:53:06 +01003541 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003542
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003543 /* Check, if it is write protected */
3544 if (nand_check_wp(mtd)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003545 pr_debug("%s: device is write protected!\n",
3546 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003547 instr->state = MTD_ERASE_FAILED;
3548 goto erase_exit;
3549 }
3550
3551 /* Loop through the pages */
3552 len = instr->len;
3553
3554 instr->state = MTD_ERASING;
3555
3556 while (len) {
Stefan Roese80877fa2022-09-02 14:10:46 +02003557 schedule();
Heiko Schocherf5895d12014-06-24 10:10:04 +02003558
Sergey Lapin3a38a552013-01-14 03:46:50 +00003559 /* Check if we have a bad block, we do not erase bad blocks! */
Masahiro Yamadaf5a19022014-12-16 15:36:33 +09003560 if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) <<
Scott Wood52ab7ce2016-05-30 13:57:58 -05003561 chip->page_shift, allowbbt)) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003562 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
Heiko Schocherf5895d12014-06-24 10:10:04 +02003563 __func__, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003564 instr->state = MTD_ERASE_FAILED;
Farhan Ali7c053192021-02-24 15:25:53 -08003565 instr->fail_addr =
3566 ((loff_t)page << chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003567 goto erase_exit;
3568 }
William Juul52c07962007-10-31 13:53:06 +01003569
3570 /*
3571 * Invalidate the page cache, if we erase the block which
Sergey Lapin3a38a552013-01-14 03:46:50 +00003572 * contains the current cached page.
William Juul52c07962007-10-31 13:53:06 +01003573 */
3574 if (page <= chip->pagebuf && chip->pagebuf <
3575 (page + pages_per_block))
3576 chip->pagebuf = -1;
3577
Scott Wood3ea94ed2015-06-26 19:03:26 -05003578 status = chip->erase(mtd, page & chip->pagemask);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003579
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003580 /* See if block erase succeeded */
William Juul52c07962007-10-31 13:53:06 +01003581 if (status & NAND_STATUS_FAIL) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003582 pr_debug("%s: failed erase, page 0x%08x\n",
3583 __func__, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003584 instr->state = MTD_ERASE_FAILED;
Christian Hitz13fc0e22011-10-12 09:32:01 +02003585 instr->fail_addr =
3586 ((loff_t)page << chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003587 goto erase_exit;
3588 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003589
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003590 /* Increment page address and decrement length */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003591 len -= (1ULL << chip->phys_erase_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003592 page += pages_per_block;
3593
3594 /* Check, if we cross a chip boundary */
William Juul52c07962007-10-31 13:53:06 +01003595 if (len && !(page & chip->pagemask)) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003596 chipnr++;
William Juul52c07962007-10-31 13:53:06 +01003597 chip->select_chip(mtd, -1);
3598 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003599 }
3600 }
3601 instr->state = MTD_ERASE_DONE;
3602
Christian Hitz13fc0e22011-10-12 09:32:01 +02003603erase_exit:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003604
3605 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003606
3607 /* Deselect and wake up anyone waiting on the device */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003608 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003609 nand_release_device(mtd);
3610
3611 /* Return more or less happy */
3612 return ret;
3613}
3614
3615/**
3616 * nand_sync - [MTD Interface] sync
Sergey Lapin3a38a552013-01-14 03:46:50 +00003617 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003618 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003619 * Sync is actually a wait for chip ready function.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003620 */
William Juul52c07962007-10-31 13:53:06 +01003621static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003622{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003623 pr_debug("%s: called\n", __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003624
3625 /* Grab the lock and see if the device is available */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003626 nand_get_device(mtd, FL_SYNCING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003627 /* Release it and go back */
William Juul52c07962007-10-31 13:53:06 +01003628 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003629}
3630
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003631/**
William Juul52c07962007-10-31 13:53:06 +01003632 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Sergey Lapin3a38a552013-01-14 03:46:50 +00003633 * @mtd: MTD device structure
3634 * @offs: offset relative to mtd start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003635 */
William Juul52c07962007-10-31 13:53:06 +01003636static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003637{
Scott Wood52ab7ce2016-05-30 13:57:58 -05003638 struct nand_chip *chip = mtd_to_nand(mtd);
3639 int chipnr = (int)(offs >> chip->chip_shift);
3640 int ret;
3641
3642 /* Select the NAND device */
3643 nand_get_device(mtd, FL_READING);
3644 chip->select_chip(mtd, chipnr);
3645
3646 ret = nand_block_checkbad(mtd, offs, 0);
3647
3648 chip->select_chip(mtd, -1);
3649 nand_release_device(mtd);
3650
3651 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003652}
3653
3654/**
William Juul52c07962007-10-31 13:53:06 +01003655 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Sergey Lapin3a38a552013-01-14 03:46:50 +00003656 * @mtd: MTD device structure
3657 * @ofs: offset relative to mtd start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003658 */
William Juul52c07962007-10-31 13:53:06 +01003659static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003660{
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003661 int ret;
3662
Christian Hitzb8a6b372011-10-12 09:32:02 +02003663 ret = nand_block_isbad(mtd, ofs);
3664 if (ret) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003665 /* If it was bad already, return success and do nothing */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003666 if (ret > 0)
3667 return 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003668 return ret;
3669 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003670
Heiko Schocherf5895d12014-06-24 10:10:04 +02003671 return nand_block_markbad_lowlevel(mtd, ofs);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003672}
3673
Heiko Schocherf5895d12014-06-24 10:10:04 +02003674/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003675 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
3676 * @mtd: MTD device structure
3677 * @chip: nand chip info structure
3678 * @addr: feature address.
3679 * @subfeature_param: the subfeature parameters, a four bytes array.
3680 */
3681static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
3682 int addr, uint8_t *subfeature_param)
3683{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003684#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
3685 if (!chip->onfi_version ||
3686 !(le16_to_cpu(chip->onfi_params.opt_cmd)
3687 & ONFI_OPT_CMD_SET_GET_FEATURES))
Mylène Josserandc21946b2018-07-13 18:10:23 +02003688 return -ENOTSUPP;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003689#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +00003690
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003691 return nand_set_features_op(chip, addr, subfeature_param);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003692}
3693
3694/**
3695 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
3696 * @mtd: MTD device structure
3697 * @chip: nand chip info structure
3698 * @addr: feature address.
3699 * @subfeature_param: the subfeature parameters, a four bytes array.
William Juul52c07962007-10-31 13:53:06 +01003700 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003701static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
3702 int addr, uint8_t *subfeature_param)
3703{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003704#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
3705 if (!chip->onfi_version ||
3706 !(le16_to_cpu(chip->onfi_params.opt_cmd)
3707 & ONFI_OPT_CMD_SET_GET_FEATURES))
Mylène Josserandc21946b2018-07-13 18:10:23 +02003708 return -ENOTSUPP;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003709#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +00003710
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003711 return nand_get_features_op(chip, addr, subfeature_param);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003712}
Heiko Schocherf5895d12014-06-24 10:10:04 +02003713
Sergey Lapin3a38a552013-01-14 03:46:50 +00003714/* Set default functions */
William Juul52c07962007-10-31 13:53:06 +01003715static void nand_set_defaults(struct nand_chip *chip, int busw)
3716{
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003717 /* check for proper chip_delay setup, set 20us if not */
William Juul52c07962007-10-31 13:53:06 +01003718 if (!chip->chip_delay)
3719 chip->chip_delay = 20;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003720
3721 /* check, if a user supplied command function given */
William Juul52c07962007-10-31 13:53:06 +01003722 if (chip->cmdfunc == NULL)
3723 chip->cmdfunc = nand_command;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003724
3725 /* check, if a user supplied wait function given */
William Juul52c07962007-10-31 13:53:06 +01003726 if (chip->waitfunc == NULL)
3727 chip->waitfunc = nand_wait;
3728
3729 if (!chip->select_chip)
3730 chip->select_chip = nand_select_chip;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003731
3732 /* set for ONFI nand */
3733 if (!chip->onfi_set_features)
3734 chip->onfi_set_features = nand_onfi_set_features;
3735 if (!chip->onfi_get_features)
3736 chip->onfi_get_features = nand_onfi_get_features;
3737
3738 /* If called twice, pointers that depend on busw may need to be reset */
3739 if (!chip->read_byte || chip->read_byte == nand_read_byte)
William Juul52c07962007-10-31 13:53:06 +01003740 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
3741 if (!chip->read_word)
3742 chip->read_word = nand_read_word;
3743 if (!chip->block_bad)
3744 chip->block_bad = nand_block_bad;
3745 if (!chip->block_markbad)
3746 chip->block_markbad = nand_default_block_markbad;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003747 if (!chip->write_buf || chip->write_buf == nand_write_buf)
William Juul52c07962007-10-31 13:53:06 +01003748 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003749 if (!chip->write_byte || chip->write_byte == nand_write_byte)
3750 chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;
3751 if (!chip->read_buf || chip->read_buf == nand_read_buf)
William Juul52c07962007-10-31 13:53:06 +01003752 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
Roger Quadrosb590f612022-12-20 12:21:57 +02003753
Simon Glass7ec24132024-09-29 19:49:48 -06003754#ifndef CONFIG_XPL_BUILD
William Juul52c07962007-10-31 13:53:06 +01003755 if (!chip->scan_bbt)
3756 chip->scan_bbt = nand_default_bbt;
Roger Quadrosb590f612022-12-20 12:21:57 +02003757#endif
Heiko Schocherf5895d12014-06-24 10:10:04 +02003758
3759 if (!chip->controller) {
William Juul52c07962007-10-31 13:53:06 +01003760 chip->controller = &chip->hwcontrol;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003761 spin_lock_init(&chip->controller->lock);
3762 init_waitqueue_head(&chip->controller->wq);
3763 }
3764
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09003765 if (!chip->buf_align)
3766 chip->buf_align = 1;
William Juul52c07962007-10-31 13:53:06 +01003767}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003768
Sergey Lapin3a38a552013-01-14 03:46:50 +00003769/* Sanitize ONFI strings so we can safely print them */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003770static void sanitize_string(char *s, size_t len)
3771{
3772 ssize_t i;
3773
Sergey Lapin3a38a552013-01-14 03:46:50 +00003774 /* Null terminate */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003775 s[len - 1] = 0;
3776
Sergey Lapin3a38a552013-01-14 03:46:50 +00003777 /* Remove non printable chars */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003778 for (i = 0; i < len - 1; i++) {
3779 if (s[i] < ' ' || s[i] > 127)
3780 s[i] = '?';
3781 }
3782
Sergey Lapin3a38a552013-01-14 03:46:50 +00003783 /* Remove trailing spaces */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003784 strim(s);
3785}
3786
Florian Fainellic98a9352011-02-25 00:01:34 +00003787static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
3788{
3789 int i;
Florian Fainellic98a9352011-02-25 00:01:34 +00003790 while (len--) {
3791 crc ^= *p++ << 8;
3792 for (i = 0; i < 8; i++)
3793 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
3794 }
3795
3796 return crc;
3797}
3798
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003799#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
Heiko Schocherf5895d12014-06-24 10:10:04 +02003800/* Parse the Extended Parameter Page. */
3801static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
3802 struct nand_chip *chip, struct nand_onfi_params *p)
3803{
3804 struct onfi_ext_param_page *ep;
3805 struct onfi_ext_section *s;
3806 struct onfi_ext_ecc_info *ecc;
3807 uint8_t *cursor;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003808 int ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003809 int len;
3810 int i;
3811
3812 len = le16_to_cpu(p->ext_param_page_length) * 16;
3813 ep = kmalloc(len, GFP_KERNEL);
3814 if (!ep)
3815 return -ENOMEM;
3816
3817 /* Send our own NAND_CMD_PARAM. */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003818 ret = nand_read_param_page_op(chip, 0, NULL, 0);
3819 if (ret)
3820 goto ext_out;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003821
3822 /* Use the Change Read Column command to skip the ONFI param pages. */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003823 ret = nand_change_read_column_op(chip,
3824 sizeof(*p) * p->num_of_param_pages,
3825 ep, len, true);
3826 if (ret)
3827 goto ext_out;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003828
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003829 ret = -EINVAL;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003830 if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
3831 != le16_to_cpu(ep->crc))) {
3832 pr_debug("fail in the CRC.\n");
3833 goto ext_out;
3834 }
3835
3836 /*
3837 * Check the signature.
3838 * Do not strictly follow the ONFI spec, maybe changed in future.
3839 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003840 if (strncmp((char *)ep->sig, "EPPS", 4)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003841 pr_debug("The signature is invalid.\n");
3842 goto ext_out;
3843 }
3844
3845 /* find the ECC section. */
3846 cursor = (uint8_t *)(ep + 1);
3847 for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {
3848 s = ep->sections + i;
3849 if (s->type == ONFI_SECTION_TYPE_2)
3850 break;
3851 cursor += s->length * 16;
3852 }
3853 if (i == ONFI_EXT_SECTION_MAX) {
3854 pr_debug("We can not find the ECC section.\n");
3855 goto ext_out;
3856 }
3857
3858 /* get the info we want. */
3859 ecc = (struct onfi_ext_ecc_info *)cursor;
3860
3861 if (!ecc->codeword_size) {
3862 pr_debug("Invalid codeword size\n");
3863 goto ext_out;
3864 }
3865
3866 chip->ecc_strength_ds = ecc->ecc_bits;
3867 chip->ecc_step_ds = 1 << ecc->codeword_size;
3868 ret = 0;
3869
3870ext_out:
3871 kfree(ep);
3872 return ret;
3873}
3874
Florian Fainellic98a9352011-02-25 00:01:34 +00003875/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00003876 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainellic98a9352011-02-25 00:01:34 +00003877 */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003878static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
Florian Fainellic98a9352011-02-25 00:01:34 +00003879{
3880 struct nand_onfi_params *p = &chip->onfi_params;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003881 char id[4];
3882 int i, ret, val;
Florian Fainellic98a9352011-02-25 00:01:34 +00003883
Sergey Lapin3a38a552013-01-14 03:46:50 +00003884 /* Try ONFI for unknown chip or LP */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003885 ret = nand_readid_op(chip, 0x20, id, sizeof(id));
3886 if (ret || strncmp(id, "ONFI", 4))
3887 return 0;
3888
3889 ret = nand_read_param_page_op(chip, 0, NULL, 0);
3890 if (ret)
Florian Fainellic98a9352011-02-25 00:01:34 +00003891 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003892
Florian Fainellic98a9352011-02-25 00:01:34 +00003893 for (i = 0; i < 3; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003894 ret = nand_read_data_op(chip, p, sizeof(*p), true);
3895 if (ret)
3896 return 0;
3897
Florian Fainellic98a9352011-02-25 00:01:34 +00003898 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
Christian Hitz13fc0e22011-10-12 09:32:01 +02003899 le16_to_cpu(p->crc)) {
Florian Fainellic98a9352011-02-25 00:01:34 +00003900 break;
3901 }
3902 }
3903
Heiko Schocherf5895d12014-06-24 10:10:04 +02003904 if (i == 3) {
3905 pr_err("Could not find valid ONFI parameter page; aborting\n");
Florian Fainellic98a9352011-02-25 00:01:34 +00003906 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003907 }
Florian Fainellic98a9352011-02-25 00:01:34 +00003908
Sergey Lapin3a38a552013-01-14 03:46:50 +00003909 /* Check version */
Florian Fainellic98a9352011-02-25 00:01:34 +00003910 val = le16_to_cpu(p->revision);
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003911 if (val & (1 << 5))
3912 chip->onfi_version = 23;
3913 else if (val & (1 << 4))
Florian Fainellic98a9352011-02-25 00:01:34 +00003914 chip->onfi_version = 22;
3915 else if (val & (1 << 3))
3916 chip->onfi_version = 21;
3917 else if (val & (1 << 2))
3918 chip->onfi_version = 20;
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003919 else if (val & (1 << 1))
Florian Fainellic98a9352011-02-25 00:01:34 +00003920 chip->onfi_version = 10;
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003921
3922 if (!chip->onfi_version) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003923 pr_info("unsupported ONFI version: %d\n", val);
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003924 return 0;
3925 }
Florian Fainellic98a9352011-02-25 00:01:34 +00003926
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003927 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
3928 sanitize_string(p->model, sizeof(p->model));
Florian Fainellic98a9352011-02-25 00:01:34 +00003929 if (!mtd->name)
3930 mtd->name = p->model;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003931
Florian Fainellic98a9352011-02-25 00:01:34 +00003932 mtd->writesize = le32_to_cpu(p->byte_per_page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003933
3934 /*
3935 * pages_per_block and blocks_per_lun may not be a power-of-2 size
3936 * (don't ask me who thought of this...). MTD assumes that these
3937 * dimensions will be power-of-2, so just truncate the remaining area.
3938 */
3939 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
3940 mtd->erasesize *= mtd->writesize;
3941
Florian Fainellic98a9352011-02-25 00:01:34 +00003942 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003943
3944 /* See erasesize comment */
3945 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
Matthieu CASTETb20b6f22012-03-19 15:35:25 +01003946 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003947 chip->bits_per_cell = p->bits_per_cell;
3948
3949 if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003950 chip->options |= NAND_BUSWIDTH_16;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003951
3952 if (p->ecc_bits != 0xff) {
3953 chip->ecc_strength_ds = p->ecc_bits;
3954 chip->ecc_step_ds = 512;
3955 } else if (chip->onfi_version >= 21 &&
3956 (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
3957
3958 /*
3959 * The nand_flash_detect_ext_param_page() uses the
3960 * Change Read Column command which maybe not supported
3961 * by the chip->cmdfunc. So try to update the chip->cmdfunc
3962 * now. We do not replace user supplied command function.
3963 */
3964 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3965 chip->cmdfunc = nand_command_lp;
3966
3967 /* The Extended Parameter Page is supported since ONFI 2.1. */
3968 if (nand_flash_detect_ext_param_page(mtd, chip, p))
3969 pr_warn("Failed to detect ONFI extended param page\n");
3970 } else {
3971 pr_warn("Could not retrieve ONFI ECC requirements\n");
3972 }
3973
Florian Fainellic98a9352011-02-25 00:01:34 +00003974 return 1;
3975}
3976#else
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003977static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
Florian Fainellic98a9352011-02-25 00:01:34 +00003978{
3979 return 0;
3980}
3981#endif
3982
William Juul52c07962007-10-31 13:53:06 +01003983/*
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003984 * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
3985 */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003986static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip)
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003987{
3988 struct nand_jedec_params *p = &chip->jedec_params;
3989 struct jedec_ecc_info *ecc;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003990 char id[5];
3991 int i, val, ret;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003992
3993 /* Try JEDEC for unknown chip or LP */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003994 ret = nand_readid_op(chip, 0x40, id, sizeof(id));
3995 if (ret || strncmp(id, "JEDEC", sizeof(id)))
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003996 return 0;
3997
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003998 ret = nand_read_param_page_op(chip, 0x40, NULL, 0);
3999 if (ret)
4000 return 0;
4001
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004002 for (i = 0; i < 3; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004003 ret = nand_read_data_op(chip, p, sizeof(*p), true);
4004 if (ret)
4005 return 0;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004006
4007 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==
4008 le16_to_cpu(p->crc))
4009 break;
4010 }
4011
4012 if (i == 3) {
4013 pr_err("Could not find valid JEDEC parameter page; aborting\n");
4014 return 0;
4015 }
4016
4017 /* Check version */
4018 val = le16_to_cpu(p->revision);
4019 if (val & (1 << 2))
4020 chip->jedec_version = 10;
4021 else if (val & (1 << 1))
4022 chip->jedec_version = 1; /* vendor specific version */
4023
4024 if (!chip->jedec_version) {
4025 pr_info("unsupported JEDEC version: %d\n", val);
4026 return 0;
4027 }
4028
4029 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
4030 sanitize_string(p->model, sizeof(p->model));
4031 if (!mtd->name)
4032 mtd->name = p->model;
4033
4034 mtd->writesize = le32_to_cpu(p->byte_per_page);
4035
4036 /* Please reference to the comment for nand_flash_detect_onfi. */
4037 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
4038 mtd->erasesize *= mtd->writesize;
4039
4040 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
4041
4042 /* Please reference to the comment for nand_flash_detect_onfi. */
4043 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
4044 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
4045 chip->bits_per_cell = p->bits_per_cell;
4046
4047 if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004048 chip->options |= NAND_BUSWIDTH_16;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004049
4050 /* ECC info */
4051 ecc = &p->ecc_info[0];
4052
4053 if (ecc->codeword_size >= 9) {
4054 chip->ecc_strength_ds = ecc->ecc_bits;
4055 chip->ecc_step_ds = 1 << ecc->codeword_size;
4056 } else {
4057 pr_warn("Invalid codeword size\n");
4058 }
4059
4060 return 1;
4061}
4062
4063/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004064 * nand_id_has_period - Check if an ID string has a given wraparound period
4065 * @id_data: the ID string
4066 * @arrlen: the length of the @id_data array
4067 * @period: the period of repitition
4068 *
4069 * Check if an ID string is repeated within a given sequence of bytes at
4070 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
Heiko Schocherf5895d12014-06-24 10:10:04 +02004071 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
Sergey Lapin3a38a552013-01-14 03:46:50 +00004072 * if the repetition has a period of @period; otherwise, returns zero.
4073 */
4074static int nand_id_has_period(u8 *id_data, int arrlen, int period)
4075{
4076 int i, j;
4077 for (i = 0; i < period; i++)
4078 for (j = i + period; j < arrlen; j += period)
4079 if (id_data[i] != id_data[j])
4080 return 0;
4081 return 1;
4082}
4083
4084/*
4085 * nand_id_len - Get the length of an ID string returned by CMD_READID
4086 * @id_data: the ID string
4087 * @arrlen: the length of the @id_data array
4088
4089 * Returns the length of the ID string, according to known wraparound/trailing
4090 * zero patterns. If no pattern exists, returns the length of the array.
4091 */
4092static int nand_id_len(u8 *id_data, int arrlen)
4093{
4094 int last_nonzero, period;
4095
4096 /* Find last non-zero byte */
4097 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
4098 if (id_data[last_nonzero])
4099 break;
4100
4101 /* All zeros */
4102 if (last_nonzero < 0)
4103 return 0;
4104
4105 /* Calculate wraparound period */
4106 for (period = 1; period < arrlen; period++)
4107 if (nand_id_has_period(id_data, arrlen, period))
4108 break;
4109
4110 /* There's a repeated pattern */
4111 if (period < arrlen)
4112 return period;
4113
4114 /* There are trailing zeros */
4115 if (last_nonzero < arrlen - 1)
4116 return last_nonzero + 1;
4117
4118 /* No pattern detected */
4119 return arrlen;
4120}
4121
Heiko Schocherf5895d12014-06-24 10:10:04 +02004122/* Extract the bits of per cell from the 3rd byte of the extended ID */
4123static int nand_get_bits_per_cell(u8 cellinfo)
4124{
4125 int bits;
4126
4127 bits = cellinfo & NAND_CI_CELLTYPE_MSK;
4128 bits >>= NAND_CI_CELLTYPE_SHIFT;
4129 return bits + 1;
4130}
4131
Sergey Lapin3a38a552013-01-14 03:46:50 +00004132/*
4133 * Many new NAND share similar device ID codes, which represent the size of the
4134 * chip. The rest of the parameters must be decoded according to generic or
4135 * manufacturer-specific "extended ID" decoding patterns.
4136 */
Michael Trimarchi60f26dc2022-07-20 18:22:08 +02004137void nand_decode_ext_id(struct nand_chip *chip)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004138{
Alexander Dahlaa124532024-03-20 10:02:09 +01004139 struct mtd_info *mtd = nand_to_mtd(chip);
Michael Trimarchi3ba671b2022-07-20 18:22:11 +02004140 int extid;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004141 /* The 3rd id byte holds MLC / multichip data */
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004142 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004143 /* The 4th id byte is the important one */
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004144 extid = chip->id.data[3];
Sergey Lapin3a38a552013-01-14 03:46:50 +00004145
Michael Trimarchi3dc90602022-07-20 18:22:10 +02004146 /* Calc pagesize */
4147 mtd->writesize = 1024 << (extid & 0x03);
4148 extid >>= 2;
4149 /* Calc oobsize */
4150 mtd->oobsize = (8 << (extid & 0x01)) *
4151 (mtd->writesize >> 9);
4152 extid >>= 2;
4153 /* Calc blocksize. Blocksize is multiples of 64KiB */
4154 mtd->erasesize = (64 * 1024) << (extid & 0x03);
4155 extid >>= 2;
4156 /* Get buswidth information */
4157 /* Get buswidth information */
4158 if (extid & 0x1)
4159 chip->options |= NAND_BUSWIDTH_16;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004160}
Michael Trimarchi60f26dc2022-07-20 18:22:08 +02004161EXPORT_SYMBOL_GPL(nand_decode_ext_id);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004162
Heiko Schocherf5895d12014-06-24 10:10:04 +02004163/*
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004164 * Manufacturer detection. Only used when the NAND is not ONFI or JEDEC
4165 * compliant and does not have a full-id or legacy-id entry in the nand_ids
4166 * table.
4167 */
Michael Trimarchi270c1532022-07-20 18:22:07 +02004168static void nand_manufacturer_detect(struct nand_chip *chip)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004169{
4170 /*
4171 * Try manufacturer detection if available and use
4172 * nand_decode_ext_id() otherwise.
4173 */
4174 if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004175 chip->manufacturer.desc->ops->detect) {
4176 /* The 3rd id byte holds MLC / multichip data */
4177 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004178 chip->manufacturer.desc->ops->detect(chip);
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004179 } else {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004180 nand_decode_ext_id(chip);
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004181 }
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004182}
4183
4184/*
4185 * Manufacturer initialization. This function is called for all NANDs including
4186 * ONFI and JEDEC compliant ones.
4187 * Manufacturer drivers should put all their specific initialization code in
4188 * their ->init() hook.
4189 */
4190static int nand_manufacturer_init(struct nand_chip *chip)
4191{
4192 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops ||
4193 !chip->manufacturer.desc->ops->init)
4194 return 0;
4195
4196 return chip->manufacturer.desc->ops->init(chip);
4197}
4198
4199/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004200 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
4201 * decodes a matching ID table entry and assigns the MTD size parameters for
4202 * the chip.
4203 */
Michael Trimarchi270c1532022-07-20 18:22:07 +02004204static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004205{
Alexander Dahlaa124532024-03-20 10:02:09 +01004206 struct mtd_info *mtd = nand_to_mtd(chip);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004207
4208 mtd->erasesize = type->erasesize;
4209 mtd->writesize = type->pagesize;
4210 mtd->oobsize = mtd->writesize / 32;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004211
Heiko Schocherf5895d12014-06-24 10:10:04 +02004212 /* All legacy ID NAND are small-page, SLC */
4213 chip->bits_per_cell = 1;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004214}
4215
Heiko Schocherf5895d12014-06-24 10:10:04 +02004216/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004217 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
4218 * heuristic patterns using various detected parameters (e.g., manufacturer,
4219 * page size, cell-type information).
4220 */
4221static void nand_decode_bbm_options(struct mtd_info *mtd,
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004222 struct nand_chip *chip)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004223{
Sergey Lapin3a38a552013-01-14 03:46:50 +00004224 /* Set the bad block position */
4225 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
4226 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
4227 else
4228 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004229}
4230
Heiko Schocherf5895d12014-06-24 10:10:04 +02004231static inline bool is_full_id_nand(struct nand_flash_dev *type)
4232{
4233 return type->id_len;
4234}
4235
4236static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004237 struct nand_flash_dev *type)
Heiko Schocherf5895d12014-06-24 10:10:04 +02004238{
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004239 if (!strncmp((char *)type->id, (char *)chip->id.data, type->id_len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004240 mtd->writesize = type->pagesize;
4241 mtd->erasesize = type->erasesize;
4242 mtd->oobsize = type->oobsize;
4243
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004244 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004245 chip->chipsize = (uint64_t)type->chipsize << 20;
4246 chip->options |= type->options;
4247 chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
4248 chip->ecc_step_ds = NAND_ECC_STEP(type);
Scott Wood3ea94ed2015-06-26 19:03:26 -05004249 chip->onfi_timing_mode_default =
4250 type->onfi_timing_mode_default;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004251
Heiko Schocherf5895d12014-06-24 10:10:04 +02004252 if (!mtd->name)
4253 mtd->name = type->name;
4254
4255 return true;
4256 }
4257 return false;
4258}
4259
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004260/**
4261 * nand_get_manufacturer_desc - Get manufacturer information from the
4262 * manufacturer ID
4263 * @id: manufacturer ID
4264 *
4265 * Returns a nand_manufacturer_desc object if the manufacturer is defined
4266 * in the NAND manufacturers database, NULL otherwise.
4267 */
Michael Trimarchi25bb1792022-07-26 18:33:11 +02004268static const struct nand_manufacturer *nand_get_manufacturer_desc(u8 id)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004269{
4270 int i;
4271
4272 for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {
4273 if (nand_manuf_ids[i].id == id)
4274 return &nand_manuf_ids[i];
4275 }
4276
4277 return NULL;
4278}
4279
Sergey Lapin3a38a552013-01-14 03:46:50 +00004280/*
4281 * Get the flash and manufacturer id and lookup if the type is supported.
William Juul52c07962007-10-31 13:53:06 +01004282 */
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004283int nand_detect(struct nand_chip *chip, int *maf_id,
4284 int *dev_id, struct nand_flash_dev *type)
William Juul52c07962007-10-31 13:53:06 +01004285{
Alexander Dahlaa124532024-03-20 10:02:09 +01004286 struct mtd_info *mtd = nand_to_mtd(chip);
Michael Trimarchi25bb1792022-07-26 18:33:11 +02004287 const struct nand_manufacturer *manufacturer_desc;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004288 int busw, ret;
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004289 u8 *id_data = chip->id.data;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004290
Karl Beldanb6322fc2008-09-15 16:08:03 +02004291 /*
4292 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004293 * after power-up.
Karl Beldanb6322fc2008-09-15 16:08:03 +02004294 */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004295 ret = nand_reset(chip, 0);
4296 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004297 return ret;
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004298
4299 /* Select the device */
4300 chip->select_chip(mtd, 0);
Karl Beldanb6322fc2008-09-15 16:08:03 +02004301
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004302 /* Send the command for reading device ID */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004303 ret = nand_readid_op(chip, 0, id_data, 2);
4304 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004305 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004306
4307 /* Read manufacturer and device IDs */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004308 *maf_id = id_data[0];
4309 *dev_id = id_data[1];
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004310
Sergey Lapin3a38a552013-01-14 03:46:50 +00004311 /*
4312 * Try again to make sure, as some systems the bus-hold or other
Scott Wood3628f002008-10-24 16:20:43 -05004313 * interface concerns can cause random data which looks like a
4314 * possibly credible NAND flash to appear. If the two results do
4315 * not match, ignore the device completely.
4316 */
4317
Sergey Lapin3a38a552013-01-14 03:46:50 +00004318 /* Read entire ID string */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004319 ret = nand_readid_op(chip, 0, id_data, 8);
4320 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004321 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05004322
Christian Hitzb8a6b372011-10-12 09:32:02 +02004323 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004324 pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",
Sergey Lapin3a38a552013-01-14 03:46:50 +00004325 *maf_id, *dev_id, id_data[0], id_data[1]);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004326 return -ENODEV;
Scott Wood3628f002008-10-24 16:20:43 -05004327 }
4328
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004329 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data));
4330
4331 /* Try to identify manufacturer */
4332 manufacturer_desc = nand_get_manufacturer_desc(*maf_id);
4333 chip->manufacturer.desc = manufacturer_desc;
4334
Lei Wen75bde942011-01-06 09:48:18 +08004335 if (!type)
4336 type = nand_flash_ids;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004337
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004338 /*
4339 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic
4340 * override it.
4341 * This is required to make sure initial NAND bus width set by the
4342 * NAND controller driver is coherent with the real NAND bus width
4343 * (extracted by auto-detection code).
4344 */
4345 busw = chip->options & NAND_BUSWIDTH_16;
4346
4347 /*
4348 * The flag is only set (never cleared), reset it to its default value
4349 * before starting auto-detection.
4350 */
4351 chip->options &= ~NAND_BUSWIDTH_16;
4352
Heiko Schocherf5895d12014-06-24 10:10:04 +02004353 for (; type->name != NULL; type++) {
4354 if (is_full_id_nand(type)) {
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004355 if (find_full_id_nand(mtd, chip, type))
Heiko Schocherf5895d12014-06-24 10:10:04 +02004356 goto ident_done;
4357 } else if (*dev_id == type->dev_id) {
Scott Wood52ab7ce2016-05-30 13:57:58 -05004358 break;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004359 }
4360 }
Lei Wen75bde942011-01-06 09:48:18 +08004361
Christian Hitzb8a6b372011-10-12 09:32:02 +02004362 chip->onfi_version = 0;
4363 if (!type->name || !type->pagesize) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05004364 /* Check if the chip is ONFI compliant */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004365 if (nand_flash_detect_onfi(mtd, chip))
Christian Hitzb8a6b372011-10-12 09:32:02 +02004366 goto ident_done;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004367
4368 /* Check if the chip is JEDEC compliant */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004369 if (nand_flash_detect_jedec(mtd, chip))
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004370 goto ident_done;
Florian Fainellid6191892010-06-12 20:59:25 +02004371 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004372
Christian Hitzb8a6b372011-10-12 09:32:02 +02004373 if (!type->name)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004374 return -ENODEV;
Christian Hitzb8a6b372011-10-12 09:32:02 +02004375
William Juul52c07962007-10-31 13:53:06 +01004376 if (!mtd->name)
4377 mtd->name = type->name;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004378
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04004379 chip->chipsize = (uint64_t)type->chipsize << 20;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004380
Scott Wood52ab7ce2016-05-30 13:57:58 -05004381 if (!type->pagesize) {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004382 nand_manufacturer_detect(chip);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004383 } else {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004384 nand_decode_id(chip, type);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004385 }
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004386
Heiko Schocherf5895d12014-06-24 10:10:04 +02004387 /* Get chip options */
Marek Vasutfc417192012-08-30 13:39:38 +00004388 chip->options |= type->options;
Florian Fainellic98a9352011-02-25 00:01:34 +00004389
Christian Hitzb8a6b372011-10-12 09:32:02 +02004390ident_done:
4391
Heiko Schocherf5895d12014-06-24 10:10:04 +02004392 if (chip->options & NAND_BUSWIDTH_AUTO) {
4393 WARN_ON(chip->options & NAND_BUSWIDTH_16);
4394 chip->options |= busw;
4395 nand_set_defaults(chip, busw);
4396 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
4397 /*
4398 * Check, if buswidth is correct. Hardware drivers should set
4399 * chip correct!
4400 */
4401 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
4402 *maf_id, *dev_id);
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004403 pr_info("%s %s\n", manufacturer_desc->name, mtd->name);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004404 pr_warn("bus width %d instead %d bit\n",
Sergey Lapin3a38a552013-01-14 03:46:50 +00004405 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
4406 busw ? 16 : 8);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004407 return -EINVAL;
William Juul52c07962007-10-31 13:53:06 +01004408 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004409
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004410 nand_decode_bbm_options(mtd, chip);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004411
William Juul52c07962007-10-31 13:53:06 +01004412 /* Calculate the address shift from the page size */
4413 chip->page_shift = ffs(mtd->writesize) - 1;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004414 /* Convert chipsize to number of pages per chip -1 */
William Juul52c07962007-10-31 13:53:06 +01004415 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004416
William Juul52c07962007-10-31 13:53:06 +01004417 chip->bbt_erase_shift = chip->phys_erase_shift =
4418 ffs(mtd->erasesize) - 1;
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04004419 if (chip->chipsize & 0xffffffff)
Sandeep Paulraj1bc877c2009-11-07 14:24:06 -05004420 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Christian Hitzb8a6b372011-10-12 09:32:02 +02004421 else {
4422 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
4423 chip->chip_shift += 32 - 1;
4424 }
4425
Masahiro Yamada984926b2017-11-22 02:38:31 +09004426 if (chip->chip_shift - chip->page_shift > 16)
4427 chip->options |= NAND_ROW_ADDR_3;
4428
Christian Hitzb8a6b372011-10-12 09:32:02 +02004429 chip->badblockbits = 8;
Scott Wood3ea94ed2015-06-26 19:03:26 -05004430 chip->erase = single_erase;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004431
Sergey Lapin3a38a552013-01-14 03:46:50 +00004432 /* Do not replace user supplied command function! */
William Juul52c07962007-10-31 13:53:06 +01004433 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
4434 chip->cmdfunc = nand_command_lp;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004435
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004436 ret = nand_manufacturer_init(chip);
4437 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004438 return ret;
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004439
Heiko Schocherf5895d12014-06-24 10:10:04 +02004440 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
4441 *maf_id, *dev_id);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004442
Christian Hitzb8a6b372011-10-12 09:32:02 +02004443#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004444 if (chip->onfi_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004445 pr_info("%s %s\n", manufacturer_desc->name,
4446 chip->onfi_params.model);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004447 else if (chip->jedec_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004448 pr_info("%s %s\n", manufacturer_desc->name,
4449 chip->jedec_params.model);
Sean Andersone476f112023-11-04 16:37:40 -04004450 else if (manufacturer_desc)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004451 pr_info("%s %s\n", manufacturer_desc->name, type->name);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004452#else
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004453 if (chip->jedec_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004454 pr_info("%s %s\n", manufacturer_desc->name,
4455 chip->jedec_params.model);
Sean Andersone476f112023-11-04 16:37:40 -04004456 else if (manufacturer_desc)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004457 pr_info("%s %s\n", manufacturer_desc->name, type->name);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004458#endif
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004459
Scott Wood3ea94ed2015-06-26 19:03:26 -05004460 pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
Heiko Schocherf5895d12014-06-24 10:10:04 +02004461 (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
Scott Wood3ea94ed2015-06-26 19:03:26 -05004462 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004463 return 0;
William Juul52c07962007-10-31 13:53:06 +01004464}
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004465EXPORT_SYMBOL(nand_detect);
William Juul52c07962007-10-31 13:53:06 +01004466
Brian Norrisba6463d2016-06-15 21:09:22 +02004467#if CONFIG_IS_ENABLED(OF_CONTROL)
Brian Norrisba6463d2016-06-15 21:09:22 +02004468
Patrice Chotardbc77af52021-09-13 16:25:53 +02004469static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
Brian Norrisba6463d2016-06-15 21:09:22 +02004470{
4471 int ret, ecc_mode = -1, ecc_strength, ecc_step;
Linus Walleij4e8611a2023-04-07 15:40:05 +02004472 int ecc_algo = NAND_ECC_UNKNOWN;
Brian Norrisba6463d2016-06-15 21:09:22 +02004473 const char *str;
4474
Patrice Chotardbc77af52021-09-13 16:25:53 +02004475 ret = ofnode_read_s32_default(node, "nand-bus-width", -1);
Brian Norrisba6463d2016-06-15 21:09:22 +02004476 if (ret == 16)
4477 chip->options |= NAND_BUSWIDTH_16;
4478
Arseniy Krasnov8b4a27a2024-08-26 16:17:08 +03004479 if (ofnode_read_bool(node, "nand-is-boot-medium"))
4480 chip->options |= NAND_IS_BOOT_MEDIUM;
4481
Patrice Chotardbc77af52021-09-13 16:25:53 +02004482 if (ofnode_read_bool(node, "nand-on-flash-bbt"))
Brian Norrisba6463d2016-06-15 21:09:22 +02004483 chip->bbt_options |= NAND_BBT_USE_FLASH;
4484
Patrice Chotardbc77af52021-09-13 16:25:53 +02004485 str = ofnode_read_string(node, "nand-ecc-mode");
Brian Norrisba6463d2016-06-15 21:09:22 +02004486 if (str) {
4487 if (!strcmp(str, "none"))
4488 ecc_mode = NAND_ECC_NONE;
4489 else if (!strcmp(str, "soft"))
4490 ecc_mode = NAND_ECC_SOFT;
4491 else if (!strcmp(str, "hw"))
4492 ecc_mode = NAND_ECC_HW;
4493 else if (!strcmp(str, "hw_syndrome"))
4494 ecc_mode = NAND_ECC_HW_SYNDROME;
4495 else if (!strcmp(str, "hw_oob_first"))
4496 ecc_mode = NAND_ECC_HW_OOB_FIRST;
4497 else if (!strcmp(str, "soft_bch"))
4498 ecc_mode = NAND_ECC_SOFT_BCH;
4499 }
4500
Linus Walleij4e8611a2023-04-07 15:40:05 +02004501 str = ofnode_read_string(node, "nand-ecc-algo");
4502 if (str) {
4503 /*
4504 * If we are in NAND_ECC_SOFT mode, just alter the
4505 * soft mode to BCH here. No change of algorithm.
4506 */
4507 if (ecc_mode == NAND_ECC_SOFT) {
4508 if (!strcmp(str, "bch"))
4509 ecc_mode = NAND_ECC_SOFT_BCH;
4510 } else {
4511 if (!strcmp(str, "bch")) {
4512 ecc_algo = NAND_ECC_BCH;
4513 } else if (!strcmp(str, "hamming")) {
4514 ecc_algo = NAND_ECC_HAMMING;
4515 }
4516 }
Pali Rohár44acf8a2022-04-04 18:17:21 +02004517 }
4518
Patrice Chotardbc77af52021-09-13 16:25:53 +02004519 ecc_strength = ofnode_read_s32_default(node,
4520 "nand-ecc-strength", -1);
4521 ecc_step = ofnode_read_s32_default(node,
4522 "nand-ecc-step-size", -1);
Brian Norrisba6463d2016-06-15 21:09:22 +02004523
4524 if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
4525 (!(ecc_step >= 0) && ecc_strength >= 0)) {
4526 pr_err("must set both strength and step size in DT\n");
4527 return -EINVAL;
4528 }
4529
Linus Walleij4e8611a2023-04-07 15:40:05 +02004530 /*
4531 * Chip drivers may have assigned default algorithms here,
4532 * onlt override it if we have found something explicitly
4533 * specified in the device tree.
4534 */
4535 if (ecc_algo != NAND_ECC_UNKNOWN)
4536 chip->ecc.algo = ecc_algo;
4537
Brian Norrisba6463d2016-06-15 21:09:22 +02004538 if (ecc_mode >= 0)
4539 chip->ecc.mode = ecc_mode;
4540
4541 if (ecc_strength >= 0)
4542 chip->ecc.strength = ecc_strength;
4543
4544 if (ecc_step > 0)
4545 chip->ecc.size = ecc_step;
4546
Patrice Chotardbc77af52021-09-13 16:25:53 +02004547 if (ofnode_read_bool(node, "nand-ecc-maximize"))
Boris Brezillonf1a54b02017-11-22 02:38:13 +09004548 chip->ecc.options |= NAND_ECC_MAXIMIZE;
4549
Brian Norrisba6463d2016-06-15 21:09:22 +02004550 return 0;
4551}
4552#else
Patrice Chotardbc77af52021-09-13 16:25:53 +02004553static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
Brian Norrisba6463d2016-06-15 21:09:22 +02004554{
4555 return 0;
4556}
4557#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
4558
William Juul52c07962007-10-31 13:53:06 +01004559/**
4560 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00004561 * @mtd: MTD device structure
4562 * @maxchips: number of chips to scan for
4563 * @table: alternative NAND ID table
William Juul52c07962007-10-31 13:53:06 +01004564 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00004565 * This is the first phase of the normal nand_scan() function. It reads the
4566 * flash ID and sets up MTD fields accordingly.
William Juul52c07962007-10-31 13:53:06 +01004567 *
William Juul52c07962007-10-31 13:53:06 +01004568 */
Lei Wen75bde942011-01-06 09:48:18 +08004569int nand_scan_ident(struct mtd_info *mtd, int maxchips,
Heiko Schocherf5895d12014-06-24 10:10:04 +02004570 struct nand_flash_dev *table)
William Juul52c07962007-10-31 13:53:06 +01004571{
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004572 int i, nand_maf_id, nand_dev_id;
Scott Wood17fed142016-05-30 13:57:56 -05004573 struct nand_chip *chip = mtd_to_nand(mtd);
Brian Norrisba6463d2016-06-15 21:09:22 +02004574 int ret;
4575
Patrice Chotardbc77af52021-09-13 16:25:53 +02004576 if (ofnode_valid(chip->flash_node)) {
Brian Norrisba6463d2016-06-15 21:09:22 +02004577 ret = nand_dt_init(mtd, chip, chip->flash_node);
4578 if (ret)
4579 return ret;
4580 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004581
William Juul52c07962007-10-31 13:53:06 +01004582 /* Set the default functions */
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004583 nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
William Juul52c07962007-10-31 13:53:06 +01004584
4585 /* Read the flash type */
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004586 ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, table);
William Juul52c07962007-10-31 13:53:06 +01004587
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004588 if (ret) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004589 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
4590 pr_warn("No NAND device found\n");
William Juul52c07962007-10-31 13:53:06 +01004591 chip->select_chip(mtd, -1);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004592 return ret;
William Juul52c07962007-10-31 13:53:06 +01004593 }
4594
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004595 /* Initialize the ->data_interface field. */
Boris Brezillone509cba2017-11-22 02:38:19 +09004596 ret = nand_init_data_interface(chip);
4597 if (ret)
4598 return ret;
4599
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004600 /*
4601 * Setup the data interface correctly on the chip and controller side.
4602 * This explicit call to nand_setup_data_interface() is only required
4603 * for the first die, because nand_reset() has been called before
4604 * ->data_interface and ->default_onfi_timing_mode were set.
4605 * For the other dies, nand_reset() will automatically switch to the
4606 * best mode for us.
4607 */
Boris Brezillon32935f42017-11-22 02:38:28 +09004608 ret = nand_setup_data_interface(chip, 0);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004609 if (ret)
4610 return ret;
4611
Heiko Schocherf5895d12014-06-24 10:10:04 +02004612 chip->select_chip(mtd, -1);
4613
William Juul52c07962007-10-31 13:53:06 +01004614 /* Check for a chip array */
4615 for (i = 1; i < maxchips; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004616 u8 id[2];
4617
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004618 /* See comment in nand_detect for reset */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004619 nand_reset(chip, i);
4620
4621 chip->select_chip(mtd, i);
William Juul52c07962007-10-31 13:53:06 +01004622 /* Send the command for reading device ID */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004623 nand_readid_op(chip, 0, id, sizeof(id));
4624
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004625 /* Read manufacturer and device IDs */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004626 if (nand_maf_id != id[0] || nand_dev_id != id[1]) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004627 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004628 break;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004629 }
4630 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004631 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02004632
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01004633#ifdef DEBUG
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004634 if (i > 1)
Heiko Schocherf5895d12014-06-24 10:10:04 +02004635 pr_info("%d chips detected\n", i);
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01004636#endif
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004637
William Juul52c07962007-10-31 13:53:06 +01004638 /* Store the number of chips and calc total size for mtd */
4639 chip->numchips = i;
4640 mtd->size = i * chip->chipsize;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004641
William Juul52c07962007-10-31 13:53:06 +01004642 return 0;
4643}
Heiko Schocherf5895d12014-06-24 10:10:04 +02004644EXPORT_SYMBOL(nand_scan_ident);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004645
Masahiro Yamada820eb482017-11-22 02:38:29 +09004646/**
4647 * nand_check_ecc_caps - check the sanity of preset ECC settings
4648 * @chip: nand chip info structure
4649 * @caps: ECC caps info structure
4650 * @oobavail: OOB size that the ECC engine can use
4651 *
4652 * When ECC step size and strength are already set, check if they are supported
4653 * by the controller and the calculated ECC bytes fit within the chip's OOB.
4654 * On success, the calculated ECC bytes is set.
4655 */
4656int nand_check_ecc_caps(struct nand_chip *chip,
4657 const struct nand_ecc_caps *caps, int oobavail)
4658{
4659 struct mtd_info *mtd = nand_to_mtd(chip);
4660 const struct nand_ecc_step_info *stepinfo;
4661 int preset_step = chip->ecc.size;
4662 int preset_strength = chip->ecc.strength;
4663 int nsteps, ecc_bytes;
4664 int i, j;
4665
4666 if (WARN_ON(oobavail < 0))
4667 return -EINVAL;
4668
4669 if (!preset_step || !preset_strength)
4670 return -ENODATA;
4671
4672 nsteps = mtd->writesize / preset_step;
4673
4674 for (i = 0; i < caps->nstepinfos; i++) {
4675 stepinfo = &caps->stepinfos[i];
4676
4677 if (stepinfo->stepsize != preset_step)
4678 continue;
4679
4680 for (j = 0; j < stepinfo->nstrengths; j++) {
4681 if (stepinfo->strengths[j] != preset_strength)
4682 continue;
4683
4684 ecc_bytes = caps->calc_ecc_bytes(preset_step,
4685 preset_strength);
4686 if (WARN_ON_ONCE(ecc_bytes < 0))
4687 return ecc_bytes;
4688
4689 if (ecc_bytes * nsteps > oobavail) {
4690 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",
4691 preset_step, preset_strength);
4692 return -ENOSPC;
4693 }
4694
4695 chip->ecc.bytes = ecc_bytes;
4696
4697 return 0;
4698 }
4699 }
4700
4701 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",
4702 preset_step, preset_strength);
4703
4704 return -ENOTSUPP;
4705}
4706EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
4707
4708/**
4709 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
4710 * @chip: nand chip info structure
4711 * @caps: ECC engine caps info structure
4712 * @oobavail: OOB size that the ECC engine can use
4713 *
4714 * If a chip's ECC requirement is provided, try to meet it with the least
4715 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
4716 * On success, the chosen ECC settings are set.
4717 */
4718int nand_match_ecc_req(struct nand_chip *chip,
4719 const struct nand_ecc_caps *caps, int oobavail)
4720{
4721 struct mtd_info *mtd = nand_to_mtd(chip);
4722 const struct nand_ecc_step_info *stepinfo;
4723 int req_step = chip->ecc_step_ds;
4724 int req_strength = chip->ecc_strength_ds;
4725 int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
4726 int best_step, best_strength, best_ecc_bytes;
4727 int best_ecc_bytes_total = INT_MAX;
4728 int i, j;
4729
4730 if (WARN_ON(oobavail < 0))
4731 return -EINVAL;
4732
4733 /* No information provided by the NAND chip */
4734 if (!req_step || !req_strength)
4735 return -ENOTSUPP;
4736
4737 /* number of correctable bits the chip requires in a page */
4738 req_corr = mtd->writesize / req_step * req_strength;
4739
4740 for (i = 0; i < caps->nstepinfos; i++) {
4741 stepinfo = &caps->stepinfos[i];
4742 step_size = stepinfo->stepsize;
4743
4744 for (j = 0; j < stepinfo->nstrengths; j++) {
4745 strength = stepinfo->strengths[j];
4746
4747 /*
4748 * If both step size and strength are smaller than the
4749 * chip's requirement, it is not easy to compare the
4750 * resulted reliability.
4751 */
4752 if (step_size < req_step && strength < req_strength)
4753 continue;
4754
4755 if (mtd->writesize % step_size)
4756 continue;
4757
4758 nsteps = mtd->writesize / step_size;
4759
4760 ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
4761 if (WARN_ON_ONCE(ecc_bytes < 0))
4762 continue;
4763 ecc_bytes_total = ecc_bytes * nsteps;
4764
4765 if (ecc_bytes_total > oobavail ||
4766 strength * nsteps < req_corr)
4767 continue;
4768
4769 /*
4770 * We assume the best is to meet the chip's requrement
4771 * with the least number of ECC bytes.
4772 */
4773 if (ecc_bytes_total < best_ecc_bytes_total) {
4774 best_ecc_bytes_total = ecc_bytes_total;
4775 best_step = step_size;
4776 best_strength = strength;
4777 best_ecc_bytes = ecc_bytes;
4778 }
4779 }
4780 }
4781
4782 if (best_ecc_bytes_total == INT_MAX)
4783 return -ENOTSUPP;
4784
4785 chip->ecc.size = best_step;
4786 chip->ecc.strength = best_strength;
4787 chip->ecc.bytes = best_ecc_bytes;
4788
4789 return 0;
4790}
4791EXPORT_SYMBOL_GPL(nand_match_ecc_req);
4792
4793/**
4794 * nand_maximize_ecc - choose the max ECC strength available
4795 * @chip: nand chip info structure
4796 * @caps: ECC engine caps info structure
4797 * @oobavail: OOB size that the ECC engine can use
4798 *
4799 * Choose the max ECC strength that is supported on the controller, and can fit
4800 * within the chip's OOB. On success, the chosen ECC settings are set.
4801 */
4802int nand_maximize_ecc(struct nand_chip *chip,
4803 const struct nand_ecc_caps *caps, int oobavail)
4804{
4805 struct mtd_info *mtd = nand_to_mtd(chip);
4806 const struct nand_ecc_step_info *stepinfo;
4807 int step_size, strength, nsteps, ecc_bytes, corr;
4808 int best_corr = 0;
4809 int best_step = 0;
4810 int best_strength, best_ecc_bytes;
4811 int i, j;
4812
4813 if (WARN_ON(oobavail < 0))
4814 return -EINVAL;
4815
4816 for (i = 0; i < caps->nstepinfos; i++) {
4817 stepinfo = &caps->stepinfos[i];
4818 step_size = stepinfo->stepsize;
4819
4820 /* If chip->ecc.size is already set, respect it */
4821 if (chip->ecc.size && step_size != chip->ecc.size)
4822 continue;
4823
4824 for (j = 0; j < stepinfo->nstrengths; j++) {
4825 strength = stepinfo->strengths[j];
4826
4827 if (mtd->writesize % step_size)
4828 continue;
4829
4830 nsteps = mtd->writesize / step_size;
4831
4832 ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
4833 if (WARN_ON_ONCE(ecc_bytes < 0))
4834 continue;
4835
4836 if (ecc_bytes * nsteps > oobavail)
4837 continue;
4838
4839 corr = strength * nsteps;
4840
4841 /*
4842 * If the number of correctable bits is the same,
4843 * bigger step_size has more reliability.
4844 */
4845 if (corr > best_corr ||
4846 (corr == best_corr && step_size > best_step)) {
4847 best_corr = corr;
4848 best_step = step_size;
4849 best_strength = strength;
4850 best_ecc_bytes = ecc_bytes;
4851 }
4852 }
4853 }
4854
4855 if (!best_corr)
4856 return -ENOTSUPP;
4857
4858 chip->ecc.size = best_step;
4859 chip->ecc.strength = best_strength;
4860 chip->ecc.bytes = best_ecc_bytes;
4861
4862 return 0;
4863}
4864EXPORT_SYMBOL_GPL(nand_maximize_ecc);
4865
Scott Wood3ea94ed2015-06-26 19:03:26 -05004866/*
4867 * Check if the chip configuration meet the datasheet requirements.
4868
4869 * If our configuration corrects A bits per B bytes and the minimum
4870 * required correction level is X bits per Y bytes, then we must ensure
4871 * both of the following are true:
4872 *
4873 * (1) A / B >= X / Y
4874 * (2) A >= X
4875 *
4876 * Requirement (1) ensures we can correct for the required bitflip density.
4877 * Requirement (2) ensures we can correct even when all bitflips are clumped
4878 * in the same sector.
4879 */
4880static bool nand_ecc_strength_good(struct mtd_info *mtd)
4881{
Scott Wood17fed142016-05-30 13:57:56 -05004882 struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood3ea94ed2015-06-26 19:03:26 -05004883 struct nand_ecc_ctrl *ecc = &chip->ecc;
4884 int corr, ds_corr;
4885
4886 if (ecc->size == 0 || chip->ecc_step_ds == 0)
4887 /* Not enough information */
4888 return true;
4889
4890 /*
4891 * We get the number of corrected bits per page to compare
4892 * the correction density.
4893 */
4894 corr = (mtd->writesize * ecc->strength) / ecc->size;
4895 ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds;
4896
4897 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
4898}
William Juul52c07962007-10-31 13:53:06 +01004899
Marc Gonzalezc3a29852017-11-22 02:38:22 +09004900static bool invalid_ecc_page_accessors(struct nand_chip *chip)
4901{
4902 struct nand_ecc_ctrl *ecc = &chip->ecc;
4903
4904 if (nand_standard_page_accessors(ecc))
4905 return false;
4906
4907 /*
4908 * NAND_ECC_CUSTOM_PAGE_ACCESS flag is set, make sure the NAND
4909 * controller driver implements all the page accessors because
4910 * default helpers are not suitable when the core does not
4911 * send the READ0/PAGEPROG commands.
4912 */
4913 return (!ecc->read_page || !ecc->write_page ||
4914 !ecc->read_page_raw || !ecc->write_page_raw ||
4915 (NAND_HAS_SUBPAGE_READ(chip) && !ecc->read_subpage) ||
4916 (NAND_HAS_SUBPAGE_WRITE(chip) && !ecc->write_subpage &&
4917 ecc->hwctl && ecc->calculate));
4918}
4919
William Juul52c07962007-10-31 13:53:06 +01004920/**
4921 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00004922 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +01004923 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00004924 * This is the second phase of the normal nand_scan() function. It fills out
4925 * all the uninitialized function pointers with the defaults and scans for a
4926 * bad block table if appropriate.
William Juul52c07962007-10-31 13:53:06 +01004927 */
4928int nand_scan_tail(struct mtd_info *mtd)
4929{
4930 int i;
Scott Wood17fed142016-05-30 13:57:56 -05004931 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004932 struct nand_ecc_ctrl *ecc = &chip->ecc;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004933 struct nand_buffers *nbuf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004934
Sergey Lapin3a38a552013-01-14 03:46:50 +00004935 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
4936 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
4937 !(chip->bbt_options & NAND_BBT_USE_FLASH));
4938
Marc Gonzalezc3a29852017-11-22 02:38:22 +09004939 if (invalid_ecc_page_accessors(chip)) {
4940 pr_err("Invalid ECC page accessors setup\n");
4941 return -EINVAL;
4942 }
4943
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004944 if (!(chip->options & NAND_OWN_BUFFERS)) {
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004945 nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004946 chip->buffers = nbuf;
4947 } else {
4948 if (!chip->buffers)
4949 return -ENOMEM;
4950 }
William Juul52c07962007-10-31 13:53:06 +01004951
4952 /* Set the internal oob buffer location, just after the page data */
4953 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
4954
4955 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004956 * If no default placement scheme is given, select an appropriate one.
William Juul52c07962007-10-31 13:53:06 +01004957 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02004958 if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004959 switch (mtd->oobsize) {
Gregory CLEMENTe5b96312019-04-17 11:22:05 +02004960#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004961 case 8:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004962 ecc->layout = &nand_oob_8;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004963 break;
4964 case 16:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004965 ecc->layout = &nand_oob_16;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004966 break;
4967 case 64:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004968 ecc->layout = &nand_oob_64;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004969 break;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02004970 case 128:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004971 ecc->layout = &nand_oob_128;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02004972 break;
Stefan Agnerbd186142018-12-06 14:57:09 +01004973#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004974 default:
Sergey Lapin3a38a552013-01-14 03:46:50 +00004975 pr_warn("No oob scheme defined for oobsize %d\n",
4976 mtd->oobsize);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004977 BUG();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004978 }
4979 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004980
William Juul52c07962007-10-31 13:53:06 +01004981 if (!chip->write_page)
4982 chip->write_page = nand_write_page;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004983
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004984 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004985 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
William Juul52c07962007-10-31 13:53:06 +01004986 * selected and we have 256 byte pagesize fallback to software ECC
4987 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004988
Heiko Schocherf5895d12014-06-24 10:10:04 +02004989 switch (ecc->mode) {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004990 case NAND_ECC_HW_OOB_FIRST:
4991 /* Similar to NAND_ECC_HW, but a separate read_page handle */
Heiko Schocherf5895d12014-06-24 10:10:04 +02004992 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05004993 pr_warn("No ECC functions supplied; hardware ECC not possible\n");
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004994 BUG();
4995 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02004996 if (!ecc->read_page)
4997 ecc->read_page = nand_read_page_hwecc_oob_first;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004998
Andre Przywaraa50e5c62025-03-27 15:33:10 +00004999 fallthrough;
William Juul52c07962007-10-31 13:53:06 +01005000 case NAND_ECC_HW:
Sergey Lapin3a38a552013-01-14 03:46:50 +00005001 /* Use standard hwecc read page function? */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005002 if (!ecc->read_page)
5003 ecc->read_page = nand_read_page_hwecc;
5004 if (!ecc->write_page)
5005 ecc->write_page = nand_write_page_hwecc;
5006 if (!ecc->read_page_raw)
5007 ecc->read_page_raw = nand_read_page_raw;
5008 if (!ecc->write_page_raw)
5009 ecc->write_page_raw = nand_write_page_raw;
5010 if (!ecc->read_oob)
5011 ecc->read_oob = nand_read_oob_std;
5012 if (!ecc->write_oob)
5013 ecc->write_oob = nand_write_oob_std;
5014 if (!ecc->read_subpage)
5015 ecc->read_subpage = nand_read_subpage;
Scott Wood52ab7ce2016-05-30 13:57:58 -05005016 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)
Heiko Schocherf5895d12014-06-24 10:10:04 +02005017 ecc->write_subpage = nand_write_subpage_hwecc;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005018
Andre Przywaraa50e5c62025-03-27 15:33:10 +00005019 fallthrough;
William Juul52c07962007-10-31 13:53:06 +01005020 case NAND_ECC_HW_SYNDROME:
Heiko Schocherf5895d12014-06-24 10:10:04 +02005021 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
5022 (!ecc->read_page ||
5023 ecc->read_page == nand_read_page_hwecc ||
5024 !ecc->write_page ||
5025 ecc->write_page == nand_write_page_hwecc)) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05005026 pr_warn("No ECC functions supplied; hardware ECC not possible\n");
William Juul52c07962007-10-31 13:53:06 +01005027 BUG();
5028 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00005029 /* Use standard syndrome read/write page function? */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005030 if (!ecc->read_page)
5031 ecc->read_page = nand_read_page_syndrome;
5032 if (!ecc->write_page)
5033 ecc->write_page = nand_write_page_syndrome;
5034 if (!ecc->read_page_raw)
5035 ecc->read_page_raw = nand_read_page_raw_syndrome;
5036 if (!ecc->write_page_raw)
5037 ecc->write_page_raw = nand_write_page_raw_syndrome;
5038 if (!ecc->read_oob)
5039 ecc->read_oob = nand_read_oob_syndrome;
5040 if (!ecc->write_oob)
5041 ecc->write_oob = nand_write_oob_syndrome;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005042
Heiko Schocherf5895d12014-06-24 10:10:04 +02005043 if (mtd->writesize >= ecc->size) {
5044 if (!ecc->strength) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005045 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
5046 BUG();
5047 }
William Juul52c07962007-10-31 13:53:06 +01005048 break;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005049 }
Scott Wood3ea94ed2015-06-26 19:03:26 -05005050 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
5051 ecc->size, mtd->writesize);
Heiko Schocherf5895d12014-06-24 10:10:04 +02005052 ecc->mode = NAND_ECC_SOFT;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005053
Andre Przywaraa50e5c62025-03-27 15:33:10 +00005054 fallthrough;
William Juul52c07962007-10-31 13:53:06 +01005055 case NAND_ECC_SOFT:
Heiko Schocherf5895d12014-06-24 10:10:04 +02005056 ecc->calculate = nand_calculate_ecc;
5057 ecc->correct = nand_correct_data;
5058 ecc->read_page = nand_read_page_swecc;
5059 ecc->read_subpage = nand_read_subpage;
5060 ecc->write_page = nand_write_page_swecc;
5061 ecc->read_page_raw = nand_read_page_raw;
5062 ecc->write_page_raw = nand_write_page_raw;
5063 ecc->read_oob = nand_read_oob_std;
5064 ecc->write_oob = nand_write_oob_std;
5065 if (!ecc->size)
5066 ecc->size = 256;
5067 ecc->bytes = 3;
5068 ecc->strength = 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005069 break;
5070
Christian Hitz55f7bca2011-10-12 09:31:59 +02005071 case NAND_ECC_SOFT_BCH:
5072 if (!mtd_nand_has_bch()) {
Heiko Schocher081fe9e2014-07-15 16:08:43 +02005073 pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005074 BUG();
Christian Hitz55f7bca2011-10-12 09:31:59 +02005075 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02005076 ecc->calculate = nand_bch_calculate_ecc;
5077 ecc->correct = nand_bch_correct_data;
5078 ecc->read_page = nand_read_page_swecc;
5079 ecc->read_subpage = nand_read_subpage;
5080 ecc->write_page = nand_write_page_swecc;
5081 ecc->read_page_raw = nand_read_page_raw;
5082 ecc->write_page_raw = nand_write_page_raw;
5083 ecc->read_oob = nand_read_oob_std;
5084 ecc->write_oob = nand_write_oob_std;
Christian Hitz55f7bca2011-10-12 09:31:59 +02005085 /*
Scott Wood3ea94ed2015-06-26 19:03:26 -05005086 * Board driver should supply ecc.size and ecc.strength values
5087 * to select how many bits are correctable. Otherwise, default
5088 * to 4 bits for large page devices.
Christian Hitz55f7bca2011-10-12 09:31:59 +02005089 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005090 if (!ecc->size && (mtd->oobsize >= 64)) {
5091 ecc->size = 512;
Scott Wood3ea94ed2015-06-26 19:03:26 -05005092 ecc->strength = 4;
Christian Hitz55f7bca2011-10-12 09:31:59 +02005093 }
Scott Wood3ea94ed2015-06-26 19:03:26 -05005094
5095 /* See nand_bch_init() for details. */
Scott Wood52ab7ce2016-05-30 13:57:58 -05005096 ecc->bytes = 0;
5097 ecc->priv = nand_bch_init(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02005098 if (!ecc->priv) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005099 pr_warn("BCH ECC initialization failed!\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005100 BUG();
5101 }
Christian Hitz55f7bca2011-10-12 09:31:59 +02005102 break;
5103
William Juul52c07962007-10-31 13:53:06 +01005104 case NAND_ECC_NONE:
Scott Wood3ea94ed2015-06-26 19:03:26 -05005105 pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005106 ecc->read_page = nand_read_page_raw;
5107 ecc->write_page = nand_write_page_raw;
5108 ecc->read_oob = nand_read_oob_std;
5109 ecc->read_page_raw = nand_read_page_raw;
5110 ecc->write_page_raw = nand_write_page_raw;
5111 ecc->write_oob = nand_write_oob_std;
5112 ecc->size = mtd->writesize;
5113 ecc->bytes = 0;
5114 ecc->strength = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005115 break;
5116
5117 default:
Heiko Schocherf5895d12014-06-24 10:10:04 +02005118 pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);
William Juul52c07962007-10-31 13:53:06 +01005119 BUG();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005120 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005121
Sergey Lapin3a38a552013-01-14 03:46:50 +00005122 /* For many systems, the standard OOB write also works for raw */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005123 if (!ecc->read_oob_raw)
5124 ecc->read_oob_raw = ecc->read_oob;
5125 if (!ecc->write_oob_raw)
5126 ecc->write_oob_raw = ecc->write_oob;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005127
William Juul52c07962007-10-31 13:53:06 +01005128 /*
5129 * The number of bytes available for a client to place data into
Sergey Lapin3a38a552013-01-14 03:46:50 +00005130 * the out of band area.
William Juul52c07962007-10-31 13:53:06 +01005131 */
Scott Wood52ab7ce2016-05-30 13:57:58 -05005132 mtd->oobavail = 0;
5133 if (ecc->layout) {
5134 for (i = 0; ecc->layout->oobfree[i].length; i++)
5135 mtd->oobavail += ecc->layout->oobfree[i].length;
5136 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005137
Scott Wood3ea94ed2015-06-26 19:03:26 -05005138 /* ECC sanity check: warn if it's too weak */
5139 if (!nand_ecc_strength_good(mtd))
5140 pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n",
5141 mtd->name);
5142
William Juul52c07962007-10-31 13:53:06 +01005143 /*
5144 * Set the number of read / write steps for one page depending on ECC
Sergey Lapin3a38a552013-01-14 03:46:50 +00005145 * mode.
William Juul52c07962007-10-31 13:53:06 +01005146 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005147 ecc->steps = mtd->writesize / ecc->size;
5148 if (ecc->steps * ecc->size != mtd->writesize) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005149 pr_warn("Invalid ECC parameters\n");
William Juul52c07962007-10-31 13:53:06 +01005150 BUG();
5151 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02005152 ecc->total = ecc->steps * ecc->bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005153
Sergey Lapin3a38a552013-01-14 03:46:50 +00005154 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005155 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
5156 switch (ecc->steps) {
William Juul52c07962007-10-31 13:53:06 +01005157 case 2:
5158 mtd->subpage_sft = 1;
5159 break;
5160 case 4:
5161 case 8:
Sandeep Paulrajfd9874d2009-11-07 14:24:34 -05005162 case 16:
William Juul52c07962007-10-31 13:53:06 +01005163 mtd->subpage_sft = 2;
5164 break;
5165 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005166 }
William Juul52c07962007-10-31 13:53:06 +01005167 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005168
William Juul52c07962007-10-31 13:53:06 +01005169 /* Initialize state */
5170 chip->state = FL_READY;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005171
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005172 /* Invalidate the pagebuffer reference */
William Juul52c07962007-10-31 13:53:06 +01005173 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005174
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00005175 /* Large page NAND with SOFT_ECC should support subpage reads */
Scott Wood3ea94ed2015-06-26 19:03:26 -05005176 switch (ecc->mode) {
5177 case NAND_ECC_SOFT:
5178 case NAND_ECC_SOFT_BCH:
5179 if (chip->page_shift > 9)
5180 chip->options |= NAND_SUBPAGE_READ;
5181 break;
5182
5183 default:
5184 break;
5185 }
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00005186
Patrice Chotardbee32872022-03-21 09:13:36 +01005187 mtd->flash_node = chip->flash_node;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005188 /* Fill in remaining MTD driver data */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005189 mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;
Christian Hitzb8a6b372011-10-12 09:32:02 +02005190 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
5191 MTD_CAP_NANDFLASH;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005192 mtd->_erase = nand_erase;
Heiko Schocherf5895d12014-06-24 10:10:04 +02005193 mtd->_panic_write = panic_nand_write;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005194 mtd->_read_oob = nand_read_oob;
5195 mtd->_write_oob = nand_write_oob;
5196 mtd->_sync = nand_sync;
5197 mtd->_lock = NULL;
5198 mtd->_unlock = NULL;
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -03005199 mtd->_block_isreserved = nand_block_isreserved;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005200 mtd->_block_isbad = nand_block_isbad;
5201 mtd->_block_markbad = nand_block_markbad;
Heiko Schocherf5895d12014-06-24 10:10:04 +02005202 mtd->writebufsize = mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005203
Sergey Lapin3a38a552013-01-14 03:46:50 +00005204 /* propagate ecc info to mtd_info */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005205 mtd->ecclayout = ecc->layout;
5206 mtd->ecc_strength = ecc->strength;
5207 mtd->ecc_step_size = ecc->size;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005208 /*
5209 * Initialize bitflip_threshold to its default prior scan_bbt() call.
5210 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
5211 * properly set.
5212 */
5213 if (!mtd->bitflip_threshold)
Scott Wood3ea94ed2015-06-26 19:03:26 -05005214 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
William Juul52c07962007-10-31 13:53:06 +01005215
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +02005216 return 0;
William Juul52c07962007-10-31 13:53:06 +01005217}
Heiko Schocherf5895d12014-06-24 10:10:04 +02005218EXPORT_SYMBOL(nand_scan_tail);
5219
William Juul52c07962007-10-31 13:53:06 +01005220/**
5221 * nand_scan - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00005222 * @mtd: MTD device structure
5223 * @maxchips: number of chips to scan for
William Juul52c07962007-10-31 13:53:06 +01005224 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00005225 * This fills out all the uninitialized function pointers with the defaults.
5226 * The flash ID is read and the mtd/chip structures are filled with the
Scott Wood52ab7ce2016-05-30 13:57:58 -05005227 * appropriate values.
William Juul52c07962007-10-31 13:53:06 +01005228 */
5229int nand_scan(struct mtd_info *mtd, int maxchips)
5230{
5231 int ret;
5232
Lei Wen75bde942011-01-06 09:48:18 +08005233 ret = nand_scan_ident(mtd, maxchips, NULL);
William Juul52c07962007-10-31 13:53:06 +01005234 if (!ret)
5235 ret = nand_scan_tail(mtd);
5236 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005237}
Heiko Schocherf5895d12014-06-24 10:10:04 +02005238EXPORT_SYMBOL(nand_scan);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005239
Heiko Schocherf5895d12014-06-24 10:10:04 +02005240MODULE_LICENSE("GPL");
5241MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
5242MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
5243MODULE_DESCRIPTION("Generic NAND flash driver code");