blob: 0717833df5568952560cfb2754562ffc193f8c95 [file] [log] [blame]
Lukas Auer396f0bd2019-08-21 21:14:45 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Based on arch/riscv/cpu/u-boot.lds, which is
4 * Copyright (C) 2017 Andes Technology Corporation
5 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
6 *
7 * and arch/mips/cpu/u-boot-spl.lds.
8 */
9MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, LENGTH = IMAGE_MAX_SIZE }
10MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
11 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
12
13OUTPUT_ARCH("riscv")
14ENTRY(_start)
15
16SECTIONS
17{
18 . = ALIGN(4);
Yao Zia97117d2025-04-16 16:25:33 +000019 __image_copy_start = ADDR(.text);
Lukas Auer396f0bd2019-08-21 21:14:45 +020020 .text : {
21 arch/riscv/cpu/start.o (.text)
22 *(.text*)
23 } > .spl_mem
24
25 . = ALIGN(4);
26 .rodata : {
27 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
28 } > .spl_mem
29
30 . = ALIGN(4);
31 .data : {
32 *(.data*)
33 } > .spl_mem
34 . = ALIGN(4);
35
Andrew Scull5a9095c2022-05-30 10:00:04 +000036 __u_boot_list : {
37 KEEP(*(SORT(__u_boot_list*)));
Lukas Auer396f0bd2019-08-21 21:14:45 +020038 } > .spl_mem
39
40 . = ALIGN(4);
41
42 .binman_sym_table : {
43 __binman_sym_start = .;
44 KEEP(*(SORT(.binman_sym*)));
45 __binman_sym_end = .;
46 } > .spl_mem
47
Lukas Auer396f0bd2019-08-21 21:14:45 +020048 _end = .;
Pragnesh Patel45b4ad9d2020-05-29 11:33:23 +053049 _image_binary_end = .;
Yao Zia97117d2025-04-16 16:25:33 +000050 __image_copy_end = .;
Lukas Auer396f0bd2019-08-21 21:14:45 +020051
52 .bss : {
53 __bss_start = .;
54 *(.bss*)
Rick Chen55bc1bd2019-11-14 13:52:27 +080055 . = ALIGN(8);
Lukas Auer396f0bd2019-08-21 21:14:45 +020056 __bss_end = .;
57 } > .bss_mem
58}