Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
| 4 | * |
| 5 | * Sunxi PMIC bus access helpers |
| 6 | * |
| 7 | * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the |
| 8 | * axp223 uses the rsb bus, these functions abstract this. |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 9 | */ |
| 10 | |
Samuel Holland | 60d4928 | 2021-10-08 00:17:20 -0500 | [diff] [blame] | 11 | #include <axp_pmic.h> |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 12 | #include <dm.h> |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 13 | #include <asm/arch/p2wi.h> |
| 14 | #include <asm/arch/rsb.h> |
Hans de Goede | 858b6db | 2015-04-25 22:18:09 +0200 | [diff] [blame] | 15 | #include <i2c.h> |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 16 | #include <power/pmic.h> |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 17 | #include <asm/arch/pmic_bus.h> |
| 18 | |
| 19 | #define AXP221_CHIP_ADDR 0x68 |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 20 | |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 21 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 22 | static struct udevice *pmic; |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 23 | #endif |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 24 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 25 | int pmic_bus_init(void) |
| 26 | { |
| 27 | /* This cannot be 0 because it is used in SPL before BSS is ready */ |
| 28 | static int needs_init = 1; |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 29 | int ret = 0; |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 30 | |
| 31 | if (!needs_init) |
| 32 | return 0; |
| 33 | |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 34 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 35 | ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic), |
| 36 | &pmic); |
| 37 | #else |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 38 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) { |
| 39 | p2wi_init(); |
| 40 | ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, |
| 41 | AXP_PMIC_MODE_REG, |
| 42 | AXP_PMIC_MODE_P2WI); |
| 43 | } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) { |
| 44 | ret = rsb_init(); |
| 45 | if (ret) |
| 46 | return ret; |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 47 | |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 48 | ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR, |
| 49 | AXP_PMIC_PRI_RUNTIME_ADDR); |
| 50 | } |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 51 | #endif |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 52 | |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 53 | needs_init = ret; |
| 54 | |
| 55 | return ret; |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | int pmic_bus_read(u8 reg, u8 *data) |
| 59 | { |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 60 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 61 | return pmic_read(pmic, reg, data, 1); |
| 62 | #else |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 63 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) |
| 64 | return p2wi_read(reg, data); |
| 65 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) |
| 66 | return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data); |
| 67 | |
Andre Przywara | c300f17 | 2025-03-18 00:39:43 +0000 | [diff] [blame] | 68 | return i2c_read(CONFIG_AXP_I2C_ADDRESS, reg, 1, data, 1); |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 69 | #endif |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | int pmic_bus_write(u8 reg, u8 data) |
| 73 | { |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 74 | #if CONFIG_IS_ENABLED(PMIC_AXP) |
| 75 | return pmic_write(pmic, reg, &data, 1); |
| 76 | #else |
Samuel Holland | 1e4d869 | 2021-10-08 00:17:22 -0500 | [diff] [blame] | 77 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) |
| 78 | return p2wi_write(reg, data); |
| 79 | if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) |
| 80 | return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data); |
| 81 | |
Andre Przywara | c300f17 | 2025-03-18 00:39:43 +0000 | [diff] [blame] | 82 | return i2c_write(CONFIG_AXP_I2C_ADDRESS, reg, 1, &data, 1); |
Samuel Holland | 388fe64 | 2021-10-08 00:17:23 -0500 | [diff] [blame] | 83 | #endif |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | int pmic_bus_setbits(u8 reg, u8 bits) |
| 87 | { |
| 88 | int ret; |
| 89 | u8 val; |
| 90 | |
| 91 | ret = pmic_bus_read(reg, &val); |
| 92 | if (ret) |
| 93 | return ret; |
| 94 | |
Olliver Schinagl | fa2ca7c | 2018-11-21 20:05:26 +0200 | [diff] [blame] | 95 | if ((val & bits) == bits) |
| 96 | return 0; |
| 97 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 98 | val |= bits; |
| 99 | return pmic_bus_write(reg, val); |
| 100 | } |
| 101 | |
| 102 | int pmic_bus_clrbits(u8 reg, u8 bits) |
| 103 | { |
| 104 | int ret; |
| 105 | u8 val; |
| 106 | |
| 107 | ret = pmic_bus_read(reg, &val); |
| 108 | if (ret) |
| 109 | return ret; |
| 110 | |
Olliver Schinagl | fa2ca7c | 2018-11-21 20:05:26 +0200 | [diff] [blame] | 111 | if (!(val & bits)) |
| 112 | return 0; |
| 113 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 114 | val &= ~bits; |
| 115 | return pmic_bus_write(reg, val); |
| 116 | } |