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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hans de Goedebb930c32015-04-25 14:07:37 +02002/*
3 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
4 *
5 * Sunxi PMIC bus access helpers
6 *
7 * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
8 * axp223 uses the rsb bus, these functions abstract this.
Hans de Goedebb930c32015-04-25 14:07:37 +02009 */
10
Samuel Holland60d49282021-10-08 00:17:20 -050011#include <axp_pmic.h>
Samuel Holland388fe642021-10-08 00:17:23 -050012#include <dm.h>
Hans de Goedebb930c32015-04-25 14:07:37 +020013#include <asm/arch/p2wi.h>
14#include <asm/arch/rsb.h>
Hans de Goede858b6db2015-04-25 22:18:09 +020015#include <i2c.h>
Samuel Holland388fe642021-10-08 00:17:23 -050016#include <power/pmic.h>
Hans de Goedebb930c32015-04-25 14:07:37 +020017#include <asm/arch/pmic_bus.h>
18
19#define AXP221_CHIP_ADDR 0x68
Hans de Goedebb930c32015-04-25 14:07:37 +020020
Samuel Holland388fe642021-10-08 00:17:23 -050021#if CONFIG_IS_ENABLED(PMIC_AXP)
22static struct udevice *pmic;
Samuel Holland388fe642021-10-08 00:17:23 -050023#endif
Samuel Holland1e4d8692021-10-08 00:17:22 -050024
Hans de Goedebb930c32015-04-25 14:07:37 +020025int pmic_bus_init(void)
26{
27 /* This cannot be 0 because it is used in SPL before BSS is ready */
28 static int needs_init = 1;
Samuel Holland1e4d8692021-10-08 00:17:22 -050029 int ret = 0;
Hans de Goedebb930c32015-04-25 14:07:37 +020030
31 if (!needs_init)
32 return 0;
33
Samuel Holland388fe642021-10-08 00:17:23 -050034#if CONFIG_IS_ENABLED(PMIC_AXP)
35 ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic),
36 &pmic);
37#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050038 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) {
39 p2wi_init();
40 ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR,
41 AXP_PMIC_MODE_REG,
42 AXP_PMIC_MODE_P2WI);
43 } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) {
44 ret = rsb_init();
45 if (ret)
46 return ret;
Hans de Goedebb930c32015-04-25 14:07:37 +020047
Samuel Holland1e4d8692021-10-08 00:17:22 -050048 ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
49 AXP_PMIC_PRI_RUNTIME_ADDR);
50 }
Samuel Holland388fe642021-10-08 00:17:23 -050051#endif
Hans de Goedebb930c32015-04-25 14:07:37 +020052
Samuel Holland1e4d8692021-10-08 00:17:22 -050053 needs_init = ret;
54
55 return ret;
Hans de Goedebb930c32015-04-25 14:07:37 +020056}
57
58int pmic_bus_read(u8 reg, u8 *data)
59{
Samuel Holland388fe642021-10-08 00:17:23 -050060#if CONFIG_IS_ENABLED(PMIC_AXP)
61 return pmic_read(pmic, reg, data, 1);
62#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050063 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
64 return p2wi_read(reg, data);
65 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
66 return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
67
Andre Przywarac300f172025-03-18 00:39:43 +000068 return i2c_read(CONFIG_AXP_I2C_ADDRESS, reg, 1, data, 1);
Samuel Holland388fe642021-10-08 00:17:23 -050069#endif
Hans de Goedebb930c32015-04-25 14:07:37 +020070}
71
72int pmic_bus_write(u8 reg, u8 data)
73{
Samuel Holland388fe642021-10-08 00:17:23 -050074#if CONFIG_IS_ENABLED(PMIC_AXP)
75 return pmic_write(pmic, reg, &data, 1);
76#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050077 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
78 return p2wi_write(reg, data);
79 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
80 return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
81
Andre Przywarac300f172025-03-18 00:39:43 +000082 return i2c_write(CONFIG_AXP_I2C_ADDRESS, reg, 1, &data, 1);
Samuel Holland388fe642021-10-08 00:17:23 -050083#endif
Hans de Goedebb930c32015-04-25 14:07:37 +020084}
85
86int pmic_bus_setbits(u8 reg, u8 bits)
87{
88 int ret;
89 u8 val;
90
91 ret = pmic_bus_read(reg, &val);
92 if (ret)
93 return ret;
94
Olliver Schinaglfa2ca7c2018-11-21 20:05:26 +020095 if ((val & bits) == bits)
96 return 0;
97
Hans de Goedebb930c32015-04-25 14:07:37 +020098 val |= bits;
99 return pmic_bus_write(reg, val);
100}
101
102int pmic_bus_clrbits(u8 reg, u8 bits)
103{
104 int ret;
105 u8 val;
106
107 ret = pmic_bus_read(reg, &val);
108 if (ret)
109 return ret;
110
Olliver Schinaglfa2ca7c2018-11-21 20:05:26 +0200111 if (!(val & bits))
112 return 0;
113
Hans de Goedebb930c32015-04-25 14:07:37 +0200114 val &= ~bits;
115 return pmic_bus_write(reg, val);
116}