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Michal Simekcaa11b82024-11-01 10:17:58 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Xilinx ZynqMP platforms
4 *
Michal Simeka734f252025-04-07 17:17:30 +02005 * (C) Copyright 2024-2025, Advanced Micro Devices, Inc.
Michal Simekcaa11b82024-11-01 10:17:58 +01006 *
7 * Michal Simek <michal.simek@amd.com>
8 */
9
10#include <config.h>
11
Michal Simeka734f252025-04-07 17:17:30 +020012#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)
13#define U_BOOT_ITB_FILENAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
14#else
15#define U_BOOT_ITB_FILENAME "u-boot.itb"
16#endif
17
Michal Simekcaa11b82024-11-01 10:17:58 +010018/dts-v1/;
19/ {
20 binman: binman {
21 multiple-images;
22
Prasad Kummari6629bd82025-01-21 13:24:59 +010023#ifdef CONFIG_SPL
Michal Simeka734f252025-04-07 17:17:30 +020024 /* Generation in a static way */
Michal Simekcaa11b82024-11-01 10:17:58 +010025 itb {
Michal Simeka734f252025-04-07 17:17:30 +020026 filename = U_BOOT_ITB_FILENAME;
Michal Simekcaa11b82024-11-01 10:17:58 +010027 pad-byte = <0>;
28
29 fit {
30 description = "Configuration for Xilinx ZynqMP SoC";
31 fit,align = <0x8>;
32 fit,external-offset = <0x0>;
33 fit,fdt-list = "of-list";
34 images {
35 uboot {
36 description = "U-Boot (64-bit)";
37 type = "firmware";
38 os = "u-boot";
39 arch = "arm64";
40 compression = "none";
41 load = /bits/ 64 <CONFIG_TEXT_BASE>;
42 entry = /bits/ 64 <CONFIG_TEXT_BASE>;
43 hash {
44 algo = "md5";
45 };
46 u-boot-nodtb {
47 };
48 };
49 atf {
50 description = "Trusted Firmware-A";
51 type = "firmware";
52 os = "arm-trusted-firmware";
53 arch = "arm64";
54 compression = "none";
55 load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
56 entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
57 hash {
58 algo = "md5";
59 };
60 atf-bl31 {
61 optional;
62 };
63 };
64 tee {
65 description = "OP-TEE";
66 type = "tee";
67 arch = "arm64";
68 compression = "none";
69 os = "tee";
Michal Simek775cbf42025-02-04 09:53:39 +010070 load = /bits/ 64 <CONFIG_BL32_LOAD_ADDR>;
71 entry = /bits/ 64 <CONFIG_BL32_LOAD_ADDR>;
72 hash {
73 algo = "md5";
74 };
Michal Simekcaa11b82024-11-01 10:17:58 +010075 tee-os {
76 optional;
77 };
78 };
79 @fdt-SEQ {
80 description = "NAME";
81 type = "flat_dt";
82 arch = "arm64";
83 compression = "none";
Michal Simekf77acbb2025-02-04 09:53:40 +010084#if CONFIG_XILINX_OF_BOARD_DTB_ADDR
85 load = /bits/ 64 <CONFIG_XILINX_OF_BOARD_DTB_ADDR>;
86#endif
87 hash {
Michal Simekcaa11b82024-11-01 10:17:58 +010088 algo = "md5";
89 };
90 };
91 };
92 configurations {
93 default = "@conf-DEFAULT-SEQ";
94 @conf-SEQ {
95 description = "NAME";
Michal Simek7fd34582025-02-04 09:53:41 +010096#if CONFIG_BL31_LOAD_ADDR
Michal Simekcaa11b82024-11-01 10:17:58 +010097 firmware = "atf";
98 loadables = "tee", "uboot";
99 fdt = "fdt-SEQ";
Michal Simek7fd34582025-02-04 09:53:41 +0100100#else
101 firmware = "uboot";
102 loadables = "fdt";
103#endif
104
Michal Simekcaa11b82024-11-01 10:17:58 +0100105 };
106 };
107 };
108 };
109
Michal Simek7bbd3bb2024-11-20 09:05:27 +0100110 itb-single {
111 filename = "u-boot-single.itb";
112 pad-byte = <0>;
113
114 fit {
115 description = "Configuration for Xilinx ZynqMP SoC";
116 fit,align = <0x8>;
117 fit,external-offset = <0x0>;
118 fit,fdt-list = "of-list";
119 images {
120 uboot {
121 description = "U-Boot (64-bit)";
122 type = "firmware";
123 os = "u-boot";
124 arch = "arm64";
125 compression = "none";
126 load = /bits/ 64 <CONFIG_TEXT_BASE>;
127 entry = /bits/ 64 <CONFIG_TEXT_BASE>;
128 hash {
129 algo = "md5";
130 };
131 u-boot-nodtb {
132 };
133 };
134 atf {
135 description = "Trusted Firmware-A";
136 type = "firmware";
137 os = "arm-trusted-firmware";
138 arch = "arm64";
139 compression = "none";
140 load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
141 entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
142 hash {
143 algo = "md5";
144 };
145 atf-bl31 {
146 optional;
147 };
148 };
149 tee {
150 description = "OP-TEE";
151 type = "tee";
152 arch = "arm64";
153 compression = "none";
154 os = "tee";
Michal Simek775cbf42025-02-04 09:53:39 +0100155 load = /bits/ 64 <CONFIG_BL32_LOAD_ADDR>;
156 entry = /bits/ 64 <CONFIG_BL32_LOAD_ADDR>;
157 hash {
158 algo = "md5";
159 };
Michal Simek7bbd3bb2024-11-20 09:05:27 +0100160 tee-os {
161 optional;
162 };
163 };
164 fdt {
165 description = "DT";
166 type = "flat_dt";
167 arch = "arm64";
168 compression = "none";
Michal Simekf77acbb2025-02-04 09:53:40 +0100169#if CONFIG_XILINX_OF_BOARD_DTB_ADDR
170 load = /bits/ 64 <CONFIG_XILINX_OF_BOARD_DTB_ADDR>;
171#endif
172 hash {
173 algo = "md5";
174 };
Michal Simek7bbd3bb2024-11-20 09:05:27 +0100175 uboot-fdt-blob {
176 filename = "u-boot.dtb";
177 type = "blob-ext";
178 };
Michal Simek7bbd3bb2024-11-20 09:05:27 +0100179 };
180 };
181 configurations {
182 default = "conf-1";
183 conf-1 {
184 description = "Single DT";
185 firmware = "atf";
186 loadables = "tee", "uboot";
187 fdt = "fdt";
188 };
189 };
190 };
191 };
192
Michal Simekcaa11b82024-11-01 10:17:58 +0100193#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS
194 /* QSPI image for testing QSPI boot mode */
195 image {
196 filename = "qspi.bin";
197 pad-byte = <0>;
198
199 blob-ext@1 {
200 offset = <0x0>;
201 filename = "spl/boot.bin";
202 };
203 blob-ext@2 {
204 offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
Michal Simeka734f252025-04-07 17:17:30 +0200205 filename = U_BOOT_ITB_FILENAME;
Michal Simekcaa11b82024-11-01 10:17:58 +0100206 };
207 fdtmap {
208 };
209 };
Michal Simek7bbd3bb2024-11-20 09:05:27 +0100210
211 image-single {
212 filename = "qspi-single.bin";
213 pad-byte = <0>;
214
215 blob-ext@1 {
216 offset = <0x0>;
217 filename = "spl/boot.bin";
218 };
219 blob-ext@2 {
220 offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
221 filename = "u-boot-single.itb";
222 };
223 fdtmap {
224 };
225 };
Michal Simekcaa11b82024-11-01 10:17:58 +0100226#endif
Prasad Kummari6629bd82025-01-21 13:24:59 +0100227#endif
Michal Simekcaa11b82024-11-01 10:17:58 +0100228 };
229};