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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / arch / arm / dts / tegra20-lg-star.dts
blob: 3045bc3135f340e6c9ecde7e4fdab4459060a763 [file] [log] [blame]
Svyatoslav Ryhel4a950b32023-11-03 21:00:22 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5
6#include "tegra20.dtsi"
7
8/ {
9 model = "LG Optimus 2X (P990)";
10 compatible = "lg,star", "nvidia,tegra20";
11
12 chosen {
13 stdout-path = &uartb;
14 };
15
16 aliases {
17 i2c0 = &pwr_i2c;
18 i2c5 = &dcdc_i2c;
19
20 mmc0 = &sdmmc4; /* eMMC */
21 mmc1 = &sdmmc3; /* uSD slot */
22
23 rtc0 = &pmic;
24 rtc1 = "/rtc@7000e000";
25
26 usb0 = &micro_usb;
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x00000000 0x20000000>; /* 512 MB */
32 };
33
34 host1x@50000000 {
35 dc@54200000 {
36 rgb {
37 status = "okay";
38
39 port {
40 dpi_output: endpoint {
41 remote-endpoint = <&bridge_input>;
42 bus-width = <24>;
43 };
44 };
45 };
46 };
47 };
48
49 pinmux@70000014 {
50 pinctrl-names = "default";
51 pinctrl-0 = <&state_default>;
52
53 state_default: pinmux {
54 crt {
55 nvidia,pins = "crtp";
56 nvidia,function = "crt";
57 };
58
59 dap1 {
60 nvidia,pins = "dap1";
61 nvidia,function = "dap1";
62 };
63
64 dap2 {
65 nvidia,pins = "dap2";
66 nvidia,function = "dap2";
67 };
68
69 dap3 {
70 nvidia,pins = "dap3";
71 nvidia,function = "dap3";
72 };
73
74 dap4 {
75 nvidia,pins = "dap4";
76 nvidia,function = "dap4";
77 };
78
79 displaya {
80 nvidia,pins = "lcsn", "ld0", "ld1", "ld10",
81 "ld11", "ld12", "ld13", "ld14",
82 "ld15", "ld16", "ld17", "ld2",
83 "ld3", "ld4", "ld5", "ld6",
84 "ld7", "ld8", "ld9", "ldc",
85 "ldi", "lhp0", "lhp1", "lhp2",
86 "lhs", "lm0", "lm1", "lpp",
87 "lpw0", "lpw1", "lpw2", "lsc0",
88 "lsc1", "lsck", "lsda", "lsdi",
89 "lspi", "lvp0", "lvp1", "lvs";
90 nvidia,function = "displaya";
91 };
92
93 gmi {
94 nvidia,pins = "ata", "atc", "atd", "ate",
95 "gmb", "irrx", "irtx";
96 nvidia,function = "gmi";
97 };
98
99 hdmi {
100 nvidia,pins = "hdint";
101 nvidia,function = "hdmi";
102 };
103
104 i2c {
105 nvidia,pins = "i2cp", "rm";
106 nvidia,function = "i2c";
107 };
108
109 i2c2 {
110 nvidia,pins = "pta";
111 nvidia,function = "i2c2";
112 };
113
114 i2c3 {
115 nvidia,pins = "dtf";
116 nvidia,function = "i2c3";
117 };
118
119 kbc {
120 nvidia,pins = "kbca", "kbcb", "kbcc", "kbce",
121 "kbcf";
122 nvidia,function = "kbc";
123 };
124
125 owr {
126 nvidia,pins = "owc";
127 nvidia,function = "owr";
128 };
129
130 plla-out {
131 nvidia,pins = "cdev1";
132 nvidia,function = "plla_out";
133 };
134
135 pllp-out4 {
136 nvidia,pins = "cdev2";
137 nvidia,function = "pllp_out4";
138 };
139
140 pwm {
141 nvidia,pins = "gpu";
142 nvidia,function = "pwm";
143 };
144
145 pwr-on {
146 nvidia,pins = "pmc";
147 nvidia,function = "pwr_on";
148 };
149
150 rtck {
151 nvidia,pins = "gpu7";
152 nvidia,function = "rtck";
153 };
154
155 sdio1 {
156 nvidia,pins = "sdio1";
157 nvidia,function = "sdio1";
158 };
159
160 sdio2 {
161 nvidia,pins = "kbcd";
162 nvidia,function = "sdio2";
163 };
164
165 sdio3 {
166 nvidia,pins = "sdb", "sdc", "sdd", "slxa",
167 "slxd", "slxk", "slxc";
168 nvidia,function = "sdio3";
169 };
170
171 sdio4 {
172 nvidia,pins = "atb", "gma", "gme";
173 nvidia,function = "sdio4";
174 };
175
176 spi1 {
177 nvidia,pins = "uda";
178 nvidia,function = "spi1";
179 };
180
181 spi2 {
182 nvidia,pins = "spia", "spib", "spic";
183 nvidia,function = "spi2";
184 };
185
186 spi2-alt {
187 nvidia,pins = "spid", "spie", "spig", "spih";
188 nvidia,function = "spi2_alt";
189 };
190
191 uarta {
192 nvidia,pins = "uaa", "uab";
193 nvidia,function = "uarta";
194 };
195
196 uartc {
197 nvidia,pins = "uca", "ucb";
198 nvidia,function = "uartc";
199 };
200
201 uartd {
202 nvidia,pins = "gmc";
203 nvidia,function = "uartd";
204 };
205
206 vi {
207 nvidia,pins = "dtc", "dtd";
208 nvidia,function = "vi";
209 };
210
211 vi-sensor-clk {
212 nvidia,pins = "csus";
213 nvidia,function = "vi_sensor_clk";
214 };
215
216 conf-lsda {
217 nvidia,pins = "lsda", "owc";
218 nvidia,pull = <TEGRA_PIN_PULL_UP>;
219 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 };
221
222 conf-ata {
223 nvidia,pins = "ata", "dtf", "gmb", "gmc",
224 "i2cp", "irrx", "kbca", "kbcc",
225 "kbcd", "kbce", "kbcf", "lcsn",
226 "ldc", "pta", "rm", "sdc",
227 "sdd", "spie", "spif", "spig",
228 "spih", "uaa", "uad", "uca",
229 "ucb", "pmce";
230 nvidia,pull = <TEGRA_PIN_PULL_UP>;
231 nvidia,tristate = <TEGRA_PIN_DISABLE>;
232 };
233
234 conf-crtp {
235 nvidia,pins = "crtp", "gpv", "hdint", "lhs",
236 "lm0", "lpw0", "lpw1", "lpw2",
237 "lsc1", "lsck", "lspi", "lvs",
238 "slxa", "slxd", "spdi";
239 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
240 nvidia,tristate = <TEGRA_PIN_ENABLE>;
241 };
242
243 conf-atb {
244 nvidia,pins = "atb", "atc", "atd", "ate",
245 "cdev1", "cdev2", "csus", "dap1",
246 "dap2", "dap3", "dap4", "ddc",
247 "dta", "dtb", "dte", "gma",
248 "gmd", "gme", "gpu", "gpu7",
249 "irtx", "kbcb", "lm1", "lsc0",
250 "lsdi", "lvp0", "pmc", "sdb",
251 "sdio1", "slxc", "spdo", "spia",
252 "spib", "spic", "uab", "uac",
253 "uda", "ck32", "ddrc", "pmca",
254 "pmcb", "pmcc", "pmcd", "xm2c",
255 "xm2d";
256 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257 nvidia,tristate = <TEGRA_PIN_DISABLE>;
258 };
259
260 conf-dtc {
261 nvidia,pins = "dtc", "dtd";
262 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
263 nvidia,tristate = <TEGRA_PIN_ENABLE>;
264 };
265
266 conf-ld0 {
267 nvidia,pins = "ld0", "ld1", "ld2", "ld3",
268 "ld4", "ld5", "ld6", "ld7",
269 "ld8", "ld9", "ld10", "ld11",
270 "ld12", "ld13", "ld14", "ld15",
271 "ld16", "ld17", "ldi", "lhp0",
272 "lhp1", "lhp2", "lpp", "lvp1",
273 "slxk", "spid";
274 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
275 nvidia,tristate = <TEGRA_PIN_DISABLE>;
276 };
277
278 drive-sdio1 {
279 nvidia,pins = "drive_sdio1", "drive_vi1";
280 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
281 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
282 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
283 nvidia,pull-down-strength = <31>;
284 nvidia,pull-up-strength = <31>;
285 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
286 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
287 };
288
289 drive-i2c {
290 nvidia,pins = "drive_dbg", "drive_ddc", "drive_at1",
291 "drive_vi2", "drive_ao1";
292 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
293 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
294 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
295 nvidia,pull-down-strength = <31>;
296 nvidia,pull-up-strength = <31>;
297 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
298 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
299 };
300
301 drive-dap {
302 nvidia,pins = "drive_dap2", "drive_dap3";
303 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
304 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
305 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
306 nvidia,pull-down-strength = <46>;
307 nvidia,pull-up-strength = <46>;
308 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
309 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
310 };
311 };
312 };
313
314 uartb: serial@70006040 {
315 clocks = <&tegra_car 7>;
316 status = "okay";
317 };
318
319 pwr_i2c: i2c@7000d000 {
320 status = "okay";
321 clock-frequency = <400000>;
322
323 pmic: max8907@3c {
324 compatible = "maxim,max8907";
325 reg = <0x3c>;
326
327 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
328 #interrupt-cells = <2>;
329 interrupt-controller;
330
331 #gpio-cells = <2>;
332 gpio-controller;
333
334 maxim,system-power-controller;
335
336 regulators {
337 vdd_1v8_vio: sd3 {
338 regulator-name = "vcc_1v8_io";
339 regulator-min-microvolt = <1800000>;
340 regulator-max-microvolt = <1800000>;
341 regulator-always-on;
342 regulator-boot-on;
343 };
344
345 iovcc_1v8_lcd: ldo3 {
346 regulator-name = "vcc_1v8_lcd";
347 regulator-min-microvolt = <1800000>;
348 regulator-max-microvolt = <1800000>;
349 regulator-boot-on;
350 };
351
352 avdd_3v3_usb: ldo4 {
353 regulator-name = "avdd_3v3_usb";
354 regulator-min-microvolt = <3300000>;
355 regulator-max-microvolt = <3300000>;
356 regulator-always-on;
357 regulator-boot-on;
358 };
359
360 vcore_emmc: ldo5 {
361 regulator-name = "vcc_2v8_emmc";
362 regulator-min-microvolt = <2800000>;
363 regulator-max-microvolt = <2800000>;
364 regulator-boot-on;
365 };
366
367 vdd_usd: ldo12 {
368 regulator-name = "vcc_2v8_sdio";
369 regulator-min-microvolt = <2800000>;
370 regulator-max-microvolt = <2800000>;
371 regulator-boot-on;
372 };
373
374 vcc_2v8_lcd: ldo14 {
375 regulator-name = "vcc_2v8_lcd";
376 regulator-min-microvolt = <2800000>;
377 regulator-max-microvolt = <2800000>;
378 regulator-boot-on;
379 };
380 };
381 };
382 };
383
384 dcdc_i2c: i2c-5 {
385 compatible = "i2c-gpio";
386
387 sda-gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
388 scl-gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_HIGH>;
389
390 i2c-gpio,delay-us = <5>;
391 i2c-gpio,timeout-ms = <100>;
392
393 #address-cells = <1>;
394 #size-cells = <0>;
395
396 aat2870: led-controller@60 {
397 compatible = "skyworks,aat2870";
398 reg = <0x60>;
399
400 enable-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
401
402 backlight {
403 current-max-microamp = <27900000>;
404 };
405 };
406 };
407
408 micro_usb: usb@c5000000 {
409 status = "okay";
410 dr_mode = "otg";
411 };
412
413 usb-phy@c5000000 {
414 status = "okay";
415 vbus-supply = <&avdd_3v3_usb>;
416 };
417
418 sdmmc3: sdhci@c8000400 {
419 status = "okay";
420 bus-width = <4>;
421
422 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
423
424 vmmc-supply = <&vdd_usd>;
425 vqmmc-supply = <&vdd_1v8_vio>;
426 };
427
428 sdmmc4: sdhci@c8000600 {
429 status = "okay";
430 bus-width = <8>;
431 non-removable;
432
433 vmmc-supply = <&vcore_emmc>;
434 vqmmc-supply = <&vdd_1v8_vio>;
435 };
436
437 /* 32KHz oscillator which is used by PMC */
438 clk32k_in: clock-32k-in {
439 compatible = "fixed-clock";
440 #clock-cells = <0>;
441 clock-frequency = <32768>;
442 clock-output-names = "ref-oscillator";
443 };
444
445 bridge: cpu-bridge {
446 compatible = "nvidia,tegra-8bit-cpu";
447
448 dc-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>;
449 rw-gpios = <&gpio TEGRA_GPIO(B, 3) GPIO_ACTIVE_HIGH>;
450 cs-gpios = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
451
452 data-gpios = <&gpio TEGRA_GPIO(E, 0) GPIO_ACTIVE_HIGH>,
453 <&gpio TEGRA_GPIO(E, 1) GPIO_ACTIVE_HIGH>,
454 <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>,
455 <&gpio TEGRA_GPIO(E, 3) GPIO_ACTIVE_HIGH>,
456 <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>,
457 <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>,
458 <&gpio TEGRA_GPIO(E, 6) GPIO_ACTIVE_HIGH>,
459 <&gpio TEGRA_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
460
461 nvidia,init-sequence = <0x0000002c 0x0 0x0 0x00005000>;
462
463 panel {
464 /*
465 * There are 2 rev of P990. One has Hitachi TX10D07VM0BAA
466 * panel and other has LG LH400WV3-SD04 panel. We are using
467 * Hitachi here but it is dynamically adjusted for the
468 * correct compatible.
469 */
470 compatible = "hit,tx10d07vm0baa";
471
472 reset-gpios = <&gpio TEGRA_GPIO(V, 7) GPIO_ACTIVE_LOW>;
473
474 avci-supply = <&vcc_2v8_lcd>;
475 iovcc-supply = <&iovcc_1v8_lcd>;
476
477 backlight = <&aat2870>;
478
479 port {
480 panel_input: endpoint {
481 remote-endpoint = <&bridge_output>;
482 };
483 };
484 };
485
486 ports {
487 #address-cells = <1>;
488 #size-cells = <0>;
489
490 port@0 {
491 reg = <0>;
492
493 bridge_input: endpoint {
494 remote-endpoint = <&dpi_output>;
495 };
496 };
497
498 port@1 {
499 reg = <1>;
500
501 bridge_output: endpoint {
502 remote-endpoint = <&panel_input>;
503 };
504 };
505 };
506 };
507
508 gpio-keys {
509 compatible = "gpio-keys";
510
511 key-power {
512 label = "Power";
513 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
514 linux,code = <KEY_ENTER>;
515 };
516
517 key-volume-up {
518 label = "Volume Up";
519 gpios = <&gpio TEGRA_GPIO(G, 1) GPIO_ACTIVE_LOW>;
520 linux,code = <KEY_UP>;
521 };
522
523 key-volume-down {
524 label = "Volume Down";
525 gpios = <&gpio TEGRA_GPIO(G, 0) GPIO_ACTIVE_LOW>;
526 linux,code = <KEY_DOWN>;
527 };
528 };
529
530 vdd_3v3_vbat: regulator-vbat {
531 compatible = "regulator-fixed";
532 regulator-name = "vdd_vbat";
533 regulator-min-microvolt = <3300000>;
534 regulator-max-microvolt = <3300000>;
535 regulator-always-on;
536 regulator-boot-on;
537 };
538};