Svyatoslav Ryhel | 26b302e | 2024-01-21 15:37:57 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /dts-v1/; |
| 3 | |
| 4 | #include <dt-bindings/input/input.h> |
| 5 | #include "tegra20.dtsi" |
| 6 | |
| 7 | / { |
| 8 | model = "Acer Iconia Tab A500"; |
| 9 | compatible = "acer,picasso", "nvidia,tegra20"; |
| 10 | |
| 11 | chosen { |
| 12 | stdout-path = &uartd; |
| 13 | }; |
| 14 | |
| 15 | aliases { |
| 16 | i2c0 = &pwr_i2c; |
| 17 | |
| 18 | mmc0 = &sdmmc4; /* eMMC */ |
| 19 | mmc1 = &sdmmc3; /* MicroSD */ |
| 20 | |
| 21 | rtc0 = &pmic; |
| 22 | rtc1 = "/rtc@7000e000"; |
| 23 | |
| 24 | usb0 = &usb1; |
| 25 | usb1 = &usb3; |
| 26 | }; |
| 27 | |
| 28 | memory { |
| 29 | device_type = "memory"; |
| 30 | reg = <0x00000000 0x40000000>; |
| 31 | }; |
| 32 | |
| 33 | host1x@50000000 { |
| 34 | dc@54200000 { |
| 35 | rgb { |
| 36 | status = "okay"; |
| 37 | |
| 38 | nvidia,panel = <&panel>; |
| 39 | }; |
| 40 | }; |
| 41 | }; |
| 42 | |
| 43 | pinmux@70000014 { |
| 44 | pinctrl-names = "default"; |
| 45 | pinctrl-0 = <&state_default>; |
| 46 | |
| 47 | state_default: pinmux { |
| 48 | ata { |
| 49 | nvidia,pins = "ata"; |
| 50 | nvidia,function = "ide"; |
| 51 | }; |
| 52 | atb { |
| 53 | nvidia,pins = "atb", "gma", "gme"; |
| 54 | nvidia,function = "sdio4"; |
| 55 | }; |
| 56 | atc { |
| 57 | nvidia,pins = "atc"; |
| 58 | nvidia,function = "nand"; |
| 59 | }; |
| 60 | atd { |
| 61 | nvidia,pins = "atd", "ate", "gmb", "spia", |
| 62 | "spib", "spic"; |
| 63 | nvidia,function = "gmi"; |
| 64 | }; |
| 65 | cdev1 { |
| 66 | nvidia,pins = "cdev1"; |
| 67 | nvidia,function = "plla_out"; |
| 68 | }; |
| 69 | cdev2 { |
| 70 | nvidia,pins = "cdev2"; |
| 71 | nvidia,function = "pllp_out4"; |
| 72 | }; |
| 73 | crtp { |
| 74 | nvidia,pins = "crtp", "lm1"; |
| 75 | nvidia,function = "crt"; |
| 76 | }; |
| 77 | csus { |
| 78 | nvidia,pins = "csus"; |
| 79 | nvidia,function = "vi_sensor_clk"; |
| 80 | }; |
| 81 | dap1 { |
| 82 | nvidia,pins = "dap1"; |
| 83 | nvidia,function = "dap1"; |
| 84 | }; |
| 85 | dap2 { |
| 86 | nvidia,pins = "dap2"; |
| 87 | nvidia,function = "dap2"; |
| 88 | }; |
| 89 | dap3 { |
| 90 | nvidia,pins = "dap3"; |
| 91 | nvidia,function = "dap3"; |
| 92 | }; |
| 93 | dap4 { |
| 94 | nvidia,pins = "dap4"; |
| 95 | nvidia,function = "dap4"; |
| 96 | }; |
| 97 | dta { |
| 98 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| 99 | nvidia,function = "vi"; |
| 100 | }; |
| 101 | dtf { |
| 102 | nvidia,pins = "dtf"; |
| 103 | nvidia,function = "i2c3"; |
| 104 | }; |
| 105 | gmc { |
| 106 | nvidia,pins = "gmc"; |
| 107 | nvidia,function = "uartd"; |
| 108 | }; |
| 109 | gmd { |
| 110 | nvidia,pins = "gmd"; |
| 111 | nvidia,function = "sflash"; |
| 112 | }; |
| 113 | gpu { |
| 114 | nvidia,pins = "gpu"; |
| 115 | nvidia,function = "pwm"; |
| 116 | }; |
| 117 | gpu7 { |
| 118 | nvidia,pins = "gpu7"; |
| 119 | nvidia,function = "rtck"; |
| 120 | }; |
| 121 | gpv { |
| 122 | nvidia,pins = "gpv", "slxa"; |
| 123 | nvidia,function = "pcie"; |
| 124 | }; |
| 125 | hdint { |
| 126 | nvidia,pins = "hdint"; |
| 127 | nvidia,function = "hdmi"; |
| 128 | }; |
| 129 | i2cp { |
| 130 | nvidia,pins = "i2cp"; |
| 131 | nvidia,function = "i2cp"; |
| 132 | }; |
| 133 | irrx { |
| 134 | nvidia,pins = "irrx", "irtx"; |
| 135 | nvidia,function = "uartb"; |
| 136 | }; |
| 137 | kbca { |
| 138 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 139 | "kbce", "kbcf"; |
| 140 | nvidia,function = "kbc"; |
| 141 | }; |
| 142 | lcsn { |
| 143 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", |
| 144 | "lsdi", "lvp0"; |
| 145 | nvidia,function = "rsvd4"; |
| 146 | }; |
| 147 | ld0 { |
| 148 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 149 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 150 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 151 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 152 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", |
| 153 | "lsc1", "lsck", "lsda", "lspi", "lvp1", |
| 154 | "lvs"; |
| 155 | nvidia,function = "displaya"; |
| 156 | }; |
| 157 | owc { |
| 158 | nvidia,pins = "owc", "spdi", "spdo", "uac"; |
| 159 | nvidia,function = "rsvd2"; |
| 160 | }; |
| 161 | pmc { |
| 162 | nvidia,pins = "pmc"; |
| 163 | nvidia,function = "pwr_on"; |
| 164 | }; |
| 165 | rm { |
| 166 | nvidia,pins = "rm"; |
| 167 | nvidia,function = "i2c1"; |
| 168 | }; |
| 169 | sdb { |
| 170 | nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk"; |
| 171 | nvidia,function = "sdio3"; |
| 172 | }; |
| 173 | sdio1 { |
| 174 | nvidia,pins = "sdio1"; |
| 175 | nvidia,function = "sdio1"; |
| 176 | }; |
| 177 | slxd { |
| 178 | nvidia,pins = "slxd"; |
| 179 | nvidia,function = "spdif"; |
| 180 | }; |
| 181 | spid { |
| 182 | nvidia,pins = "spid", "spie", "spif"; |
| 183 | nvidia,function = "spi1"; |
| 184 | }; |
| 185 | spig { |
| 186 | nvidia,pins = "spig", "spih"; |
| 187 | nvidia,function = "spi2_alt"; |
| 188 | }; |
| 189 | uaa { |
| 190 | nvidia,pins = "uaa", "uab", "uda"; |
| 191 | nvidia,function = "ulpi"; |
| 192 | }; |
| 193 | uad { |
| 194 | nvidia,pins = "uad"; |
| 195 | nvidia,function = "irda"; |
| 196 | }; |
| 197 | uca { |
| 198 | nvidia,pins = "uca", "ucb"; |
| 199 | nvidia,function = "uartc"; |
| 200 | }; |
| 201 | conf_ata { |
| 202 | nvidia,pins = "ata", "atb", "atc", "atd", |
| 203 | "cdev1", "cdev2", "csus", "dap1", |
| 204 | "dap4", "dte", "dtf", "gma", "gmc", |
| 205 | "gme", "gpu", "gpu7", "gpv", "i2cp", |
| 206 | "irrx", "irtx", "pta", "rm", |
| 207 | "sdc", "sdd", "slxc", "slxd", "slxk", |
| 208 | "spdi", "spdo", "uac", "uad", "uda"; |
| 209 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 210 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 211 | }; |
| 212 | conf_ate { |
| 213 | nvidia,pins = "ate", "dap2", "dap3", |
| 214 | "gmd", "owc", "spia", "spib", "spic", |
| 215 | "spid", "spie"; |
| 216 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 217 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 218 | }; |
| 219 | conf_ck32 { |
| 220 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| 221 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| 222 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 223 | }; |
| 224 | conf_crtp { |
| 225 | nvidia,pins = "crtp", "gmb", "slxa", "spig", |
| 226 | "spih"; |
| 227 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 228 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 229 | }; |
| 230 | conf_dta { |
| 231 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb"; |
| 232 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 233 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 234 | }; |
| 235 | conf_dte { |
| 236 | nvidia,pins = "spif"; |
| 237 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 238 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 239 | }; |
| 240 | conf_hdint { |
| 241 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| 242 | "lpw1", "lsck", "lsda", "lsdi", |
| 243 | "lvp0"; |
| 244 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 245 | }; |
| 246 | conf_kbca { |
| 247 | nvidia,pins = "kbca", "kbcc", "kbcd", |
| 248 | "kbce", "kbcf", "sdio1", "uaa", |
| 249 | "uab", "uca", "ucb"; |
| 250 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 251 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 252 | }; |
| 253 | conf_lc { |
| 254 | nvidia,pins = "lc", "ls"; |
| 255 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 256 | }; |
| 257 | conf_ld0 { |
| 258 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 259 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 260 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 261 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 262 | "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| 263 | "lpw0", "lpw2", "lsc0", "lsc1", "lspi", |
| 264 | "lvp1", "lvs", "pmc", "sdb"; |
| 265 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 266 | }; |
| 267 | conf_ld17_0 { |
| 268 | nvidia,pins = "ld17_0"; |
| 269 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 270 | }; |
| 271 | drive_ddc { |
| 272 | nvidia,pins = "drive_ddc", |
| 273 | "drive_vi1", |
| 274 | "drive_sdio1"; |
| 275 | nvidia,pull-up-strength = <31>; |
| 276 | nvidia,pull-down-strength = <31>; |
| 277 | nvidia,schmitt = <TEGRA_PIN_ENABLE>; |
| 278 | nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; |
| 279 | nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; |
| 280 | nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; |
| 281 | nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; |
| 282 | }; |
| 283 | drive_dbg { |
| 284 | nvidia,pins = "drive_dbg", |
| 285 | "drive_vi2", |
| 286 | "drive_at1", |
| 287 | "drive_ao1"; |
| 288 | nvidia,pull-up-strength = <31>; |
| 289 | nvidia,pull-down-strength = <31>; |
| 290 | nvidia,schmitt = <TEGRA_PIN_ENABLE>; |
| 291 | nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; |
| 292 | nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; |
| 293 | nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; |
| 294 | nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; |
| 295 | }; |
| 296 | }; |
| 297 | |
| 298 | state_i2cmux_ddc: pinmux-i2cmux-ddc { |
| 299 | ddc { |
| 300 | nvidia,pins = "ddc"; |
| 301 | nvidia,function = "i2c2"; |
| 302 | }; |
| 303 | |
| 304 | pta { |
| 305 | nvidia,pins = "pta"; |
| 306 | nvidia,function = "rsvd4"; |
| 307 | }; |
| 308 | }; |
| 309 | |
| 310 | state_i2cmux_idle: pinmux-i2cmux-idle { |
| 311 | ddc { |
| 312 | nvidia,pins = "ddc"; |
| 313 | nvidia,function = "rsvd4"; |
| 314 | }; |
| 315 | |
| 316 | pta { |
| 317 | nvidia,pins = "pta"; |
| 318 | nvidia,function = "rsvd4"; |
| 319 | }; |
| 320 | }; |
| 321 | |
| 322 | state_i2cmux_pta: pinmux-i2cmux-pta { |
| 323 | ddc { |
| 324 | nvidia,pins = "ddc"; |
| 325 | nvidia,function = "rsvd4"; |
| 326 | }; |
| 327 | |
| 328 | pta { |
| 329 | nvidia,pins = "pta"; |
| 330 | nvidia,function = "i2c2"; |
| 331 | }; |
| 332 | }; |
| 333 | }; |
| 334 | |
| 335 | uartd: serial@70006300 { |
| 336 | status = "okay"; |
| 337 | clock-frequency = <216000000>; |
| 338 | }; |
| 339 | |
| 340 | pwm: pwm@7000a000 { |
| 341 | status = "okay"; |
| 342 | }; |
| 343 | |
| 344 | pwr_i2c: i2c@7000d000 { |
| 345 | status = "okay"; |
| 346 | clock-frequency = <100000>; |
| 347 | |
| 348 | pmic: tps6586x@34 { |
| 349 | compatible = "ti,tps6586x"; |
| 350 | reg = <0x34>; |
| 351 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| 352 | |
| 353 | ti,system-power-controller; |
| 354 | |
| 355 | #gpio-cells = <2>; |
| 356 | gpio-controller; |
| 357 | |
| 358 | regulators { |
| 359 | avdd_usb: ldo3 { |
| 360 | regulator-name = "vdd_ldo3,avdd_usb*"; |
| 361 | regulator-min-microvolt = <3300000>; |
| 362 | regulator-max-microvolt = <3300000>; |
| 363 | regulator-always-on; |
| 364 | regulator-boot-on; |
| 365 | }; |
| 366 | |
| 367 | vcore_emmc: ldo5 { |
| 368 | regulator-name = "vdd_ldo5,vcore_mmc"; |
| 369 | regulator-min-microvolt = <2850000>; |
| 370 | regulator-max-microvolt = <2850000>; |
| 371 | }; |
| 372 | }; |
| 373 | }; |
| 374 | }; |
| 375 | |
| 376 | usb1: usb@c5000000 { |
| 377 | status = "okay"; |
| 378 | dr_mode = "otg"; |
| 379 | }; |
| 380 | |
| 381 | usb-phy@c5000000 { |
| 382 | status = "okay"; |
| 383 | nvidia,xcvr-setup-use-fuses; |
| 384 | nvidia,xcvr-lsfslew = <2>; |
| 385 | nvidia,xcvr-lsrslew = <2>; |
| 386 | }; |
| 387 | |
| 388 | usb3: usb@c5008000 { |
| 389 | status = "okay"; |
| 390 | }; |
| 391 | |
| 392 | usb-phy@c5008000 { |
| 393 | status = "okay"; |
| 394 | nvidia,xcvr-setup-use-fuses; |
| 395 | nvidia,xcvr-lsfslew = <2>; |
| 396 | nvidia,xcvr-lsrslew = <2>; |
| 397 | }; |
| 398 | |
| 399 | sdmmc3: sdhci@c8000400 { |
| 400 | status = "okay"; |
| 401 | bus-width = <4>; |
| 402 | |
| 403 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
| 404 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; |
| 405 | power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; |
| 406 | |
| 407 | vmmc-supply = <&vdd_3v3_sys>; |
| 408 | vqmmc-supply = <&vdd_3v3_sys>; |
| 409 | }; |
| 410 | |
| 411 | sdmmc4: sdhci@c8000600 { |
| 412 | status = "okay"; |
| 413 | bus-width = <8>; |
| 414 | non-removable; |
| 415 | |
| 416 | vmmc-supply = <&vcore_emmc>; |
| 417 | vqmmc-supply = <&vdd_3v3_sys>; |
| 418 | }; |
| 419 | |
| 420 | backlight: backlight { |
| 421 | compatible = "pwm-backlight"; |
| 422 | |
| 423 | enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; |
| 424 | power-supply = <&vdd_3v3_sys>; |
| 425 | pwms = <&pwm 2 41667>; |
| 426 | |
| 427 | brightness-levels = <1 35 70 105 140 175 210 255>; |
| 428 | default-brightness-level = <5>; |
| 429 | }; |
| 430 | |
| 431 | /* PMIC has a built-in 32KHz oscillator which is used by PMC */ |
| 432 | clk32k_in: clock-32k-in { |
| 433 | compatible = "fixed-clock"; |
| 434 | #clock-cells = <0>; |
| 435 | clock-frequency = <32768>; |
| 436 | clock-output-names = "tps658621-out32k"; |
| 437 | }; |
| 438 | |
| 439 | gpio-keys { |
| 440 | compatible = "gpio-keys"; |
| 441 | |
| 442 | key-power { |
| 443 | label = "Power"; |
| 444 | gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>; |
| 445 | linux,code = <KEY_ENTER>; |
| 446 | }; |
| 447 | |
| 448 | key-volume-down { |
| 449 | label = "Volume Down"; |
| 450 | gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>; |
| 451 | linux,code = <KEY_DOWN>; |
| 452 | }; |
| 453 | |
| 454 | key-volume-up { |
| 455 | label = "Volume Up"; |
| 456 | gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; |
| 457 | linux,code = <KEY_UP>; |
| 458 | }; |
| 459 | |
| 460 | switch-rotation-lock { |
| 461 | label = "Rotate-lock"; |
| 462 | gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>; |
| 463 | linux,code = <SW_ROTATE_LOCK>; |
| 464 | }; |
| 465 | }; |
| 466 | |
| 467 | panel: panel { |
| 468 | compatible = "simple-panel"; |
| 469 | |
| 470 | power-supply = <&vdd_pnl_reg>; |
| 471 | enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; |
| 472 | |
| 473 | backlight = <&backlight>; |
| 474 | |
| 475 | display-timings { |
| 476 | timing@0 { |
| 477 | clock-frequency = <71200000>; |
| 478 | |
| 479 | hactive = <1280>; |
| 480 | hfront-porch = <8>; |
| 481 | hback-porch = <18>; |
| 482 | hsync-len = <184>; |
| 483 | |
| 484 | vactive = <800>; |
| 485 | vfront-porch = <4>; |
| 486 | vback-porch = <8>; |
| 487 | vsync-len = <3>; |
| 488 | }; |
| 489 | }; |
| 490 | }; |
| 491 | |
| 492 | vdd_3v3_sys: regulator-3v3 { |
| 493 | compatible = "regulator-fixed"; |
| 494 | regulator-name = "vdd_3v3_vs"; |
| 495 | regulator-min-microvolt = <3300000>; |
| 496 | regulator-max-microvolt = <3300000>; |
| 497 | regulator-always-on; |
| 498 | }; |
| 499 | |
| 500 | vdd_pnl_reg: regulator-pnl { |
| 501 | compatible = "regulator-fixed"; |
| 502 | regulator-name = "vdd_panel"; |
| 503 | regulator-min-microvolt = <3300000>; |
| 504 | regulator-max-microvolt = <3300000>; |
| 505 | gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; |
| 506 | enable-active-high; |
| 507 | }; |
| 508 | }; |