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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / arch / arm / dts / tegra124-xiaomi-mocha.dts
blob: 64386f2b7b702e35fcfd572e91b7347ca61343fa [file] [log] [blame]
Svyatoslav Ryheldf7c4182024-11-16 14:33:47 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra124.dtsi"
6
7/ {
8 model = "Xiaomi Mi Pad A0101";
9 compatible = "xiaomi,mocha", "nvidia,tegra124";
10
11 chosen {
12 stdout-path = &uartd;
13 };
14
15 aliases {
16 i2c0 = &pwr_i2c;
17 i2c1 = &gen1_i2c;
18
19 mmc0 = &sdmmc4; /* eMMC */
20 mmc1 = &sdmmc3; /* uSD slot */
21
22 usb0 = &usb1;
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x80000000>;
28 };
29
30 host1x@50000000 {
31 dsia: dsi@54300000 {
32 status = "okay";
33
34 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
35 nvidia,ganged-mode = <&dsib>;
36
37 panel@0 {
38 compatible = "sharp,lq079l1sx01";
39 reg = <0>;
40
41 link2 = <&panel_secondary>;
42
43 avdd-supply = <&avdd_lcd>;
44 vddio-supply = <&vdd_lcd_io>;
45
46 vsp-supply = <&vsp_5v5_lcd>;
47 vsn-supply = <&vsn_5v5_lcd>;
48
49 reset-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_LOW>;
50
51 backlight = <&lp8556>;
52 };
53 };
54
55 dsib: dsi@54400000 {
56 status = "okay";
57
58 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
59
60 panel_secondary: panel@0 {
61 compatible = "sharp,lq079l1sx01";
62 reg = <0>;
63 };
64 };
65 };
66
67 pinmux@70000868 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&state_default>;
70
71 state_default: pinmux {
72 /* Keys pinmux */
73 keys {
74 nvidia,pins = "kb_col0_pq0",
75 "kb_col6_pq6",
76 "kb_col7_pq7";
77 nvidia,function = "rsvd2";
78 nvidia,pull = <TEGRA_PIN_PULL_UP>;
79 nvidia,tristate = <TEGRA_PIN_DISABLE>;
80 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
81 };
82 hall-front {
83 nvidia,pins = "pi5";
84 nvidia,function = "gmi";
85 nvidia,pull = <TEGRA_PIN_PULL_UP>;
86 nvidia,tristate = <TEGRA_PIN_DISABLE>;
87 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
88 };
89 hall-back {
90 nvidia,pins = "gpio_w3_aud_pw3";
91 nvidia,function = "spi1";
92 nvidia,pull = <TEGRA_PIN_PULL_UP>;
93 nvidia,tristate = <TEGRA_PIN_DISABLE>;
94 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
95 };
96
97 /* Leds pinmux */
98 bl-en {
99 nvidia,pins = "pbb4";
100 nvidia,function = "vgp4";
101 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
102 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104 };
105 keys-led {
106 nvidia,pins = "ph1";
107 nvidia,function = "pwm1";
108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
110 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111 };
112
113 /* Panel pinmux */
114 lcd-rst {
115 nvidia,pins = "ph3";
116 nvidia,function = "gmi";
117 nvidia,pull = <TEGRA_PIN_PULL_UP>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
120 };
121 lcd-vsp {
122 nvidia,pins = "pi4";
123 nvidia,function = "gmi";
124 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
125 nvidia,tristate = <TEGRA_PIN_DISABLE>;
126 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
127 };
128 lcd-vsn {
129 nvidia,pins = "kb_row10_ps2";
130 nvidia,function = "kbc";
131 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
132 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
134 };
135 lcd-id {
136 nvidia,pins = "kb_row6_pr6";
137 nvidia,function = "displaya_alt";
138 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
139 nvidia,tristate = <TEGRA_PIN_DISABLE>;
140 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141 };
142 lcd-pwm {
143 nvidia,pins = "ph2";
144 nvidia,function = "pwm2";
145 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146 nvidia,tristate = <TEGRA_PIN_DISABLE>;
147 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
148 };
149
150 /* SDMMC3 pinmux */
151 sdmmc3-clk {
152 nvidia,pins = "sdmmc3_clk_pa6";
153 nvidia,function = "sdmmc3";
154 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
157 };
158 sdmmc3-cmd {
159 nvidia,pins = "sdmmc3_cmd_pa7",
160 "sdmmc3_dat0_pb7",
161 "sdmmc3_dat1_pb6",
162 "sdmmc3_dat2_pb5",
163 "sdmmc3_dat3_pb4",
164 "sdmmc3_clk_lb_out_pee4",
165 "sdmmc3_clk_lb_in_pee5";
166 nvidia,function = "sdmmc3";
167 nvidia,pull = <TEGRA_PIN_PULL_UP>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
170 };
171 sdmmc3-cd {
172 nvidia,pins = "sdmmc3_cd_n_pv2";
173 nvidia,function = "sdmmc3";
174 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175 nvidia,tristate = <TEGRA_PIN_DISABLE>;
176 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
177 };
178 usd-pwr {
179 nvidia,pins = "kb_row0_pr0";
180 nvidia,function = "rsvd4";
181 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
182 nvidia,tristate = <TEGRA_PIN_DISABLE>;
183 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
184 };
185
186 /* SDMMC4 pinmux */
187 sdmmc4-clk {
188 nvidia,pins = "sdmmc4_clk_pcc4";
189 nvidia,function = "sdmmc4";
190 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
191 nvidia,tristate = <TEGRA_PIN_DISABLE>;
192 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193 };
194 sdmmc4-cmd {
195 nvidia,pins = "sdmmc4_cmd_pt7",
196 "sdmmc4_dat0_paa0",
197 "sdmmc4_dat1_paa1",
198 "sdmmc4_dat2_paa2",
199 "sdmmc4_dat3_paa3",
200 "sdmmc4_dat4_paa4",
201 "sdmmc4_dat5_paa5",
202 "sdmmc4_dat6_paa6",
203 "sdmmc4_dat7_paa7";
204 nvidia,function = "sdmmc4";
205 nvidia,pull = <TEGRA_PIN_PULL_UP>;
206 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208 };
209
210 /* I2C pinmux */
211 gen1-i2c {
212 nvidia,pins = "gen1_i2c_sda_pc5",
213 "gen1_i2c_scl_pc4";
214 nvidia,function = "i2c1";
215 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Svyatoslav Ryhelc8a26c32025-03-13 13:11:00 +0200[diff] [blame]218 nvidia,lock = <TEGRA_PIN_DISABLE>;
219 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
Svyatoslav Ryheldf7c4182024-11-16 14:33:47 +0200[diff] [blame]220 };
221 gen2-i2c {
222 nvidia,pins = "gen2_i2c_scl_pt5",
223 "gen2_i2c_sda_pt6";
224 nvidia,function = "i2c2";
225 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
226 nvidia,tristate = <TEGRA_PIN_DISABLE>;
227 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Svyatoslav Ryhelc8a26c32025-03-13 13:11:00 +0200[diff] [blame]228 nvidia,lock = <TEGRA_PIN_DISABLE>;
229 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
Svyatoslav Ryheldf7c4182024-11-16 14:33:47 +0200[diff] [blame]230 };
231 cam-i2c {
232 nvidia,pins = "cam_i2c_scl_pbb1",
233 "cam_i2c_sda_pbb2";
234 nvidia,function = "i2c3";
235 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
236 nvidia,tristate = <TEGRA_PIN_DISABLE>;
237 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Svyatoslav Ryhelc8a26c32025-03-13 13:11:00 +0200[diff] [blame]238 nvidia,lock = <TEGRA_PIN_DISABLE>;
239 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
Svyatoslav Ryheldf7c4182024-11-16 14:33:47 +0200[diff] [blame]240 };
241 ddc-i2c {
242 nvidia,pins = "ddc_scl_pv4",
243 "ddc_sda_pv5";
244 nvidia,function = "i2c4";
245 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
246 nvidia,tristate = <TEGRA_PIN_DISABLE>;
247 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248 };
249 pwr-i2c {
250 nvidia,pins = "pwr_i2c_scl_pz6",
251 "pwr_i2c_sda_pz7";
252 nvidia,function = "i2cpwr";
253 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
254 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
Svyatoslav Ryhelc8a26c32025-03-13 13:11:00 +0200[diff] [blame]256 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
Svyatoslav Ryheldf7c4182024-11-16 14:33:47 +0200[diff] [blame]257 };
258
259 dsi-b {
260 nvidia,pins = "mipi_pad_ctrl_dsi_b";
261 nvidia,function = "dsi_b";
262 };
263
264 /* GPIO power/drive control */
265 drive-sdio1 {
266 nvidia,pins = "drive_sdio1";
267 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
268 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
269 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
270 nvidia,pull-down-strength = <32>;
271 nvidia,pull-up-strength = <42>;
272 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
273 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
274 };
275
276 drive-sdio3 {
277 nvidia,pins = "drive_sdio3";
278 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
279 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
280 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
281 nvidia,pull-down-strength = <20>;
282 nvidia,pull-up-strength = <36>;
283 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
284 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
285 };
286
287 drive-gma {
288 nvidia,pins = "drive_gma";
289 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
290 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
291 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
292 nvidia,pull-down-strength = <1>;
293 nvidia,pull-up-strength = <2>;
294 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
295 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
296 };
297 };
298 };
299
300 uartd: serial@70006300 {
301 status = "okay";
302 };
303
304 gen1_i2c: i2c@7000c000 {
305 status = "okay";
306 clock-frequency = <400000>;
307
308 lp8556: backlight@2c {
309 compatible = "ti,lp8556";
310 reg = <0x2c>;
311
312 dev-ctrl = /bits/ 8 <0x83>;
313 init-brt = /bits/ 8 <0x1f>;
314
315 power-supply = <&vdd_3v3_sys>;
316 enable-supply = <&vddio_1v8_bl>;
317
318 rom-98h {
319 rom-addr = /bits/ 8 <0x98>;
320 rom-val = /bits/ 8 <0x80>;
321 };
322
323 rom-9eh {
324 rom-addr = /bits/ 8 <0x9e>;
325 rom-val = /bits/ 8 <0x21>;
326 };
327
328 rom-a0h {
329 rom-addr = /bits/ 8 <0xa0>;
330 rom-val = /bits/ 8 <0xff>;
331 };
332
333 rom-a1h {
334 rom-addr = /bits/ 8 <0xa1>;
335 rom-val = /bits/ 8 <0x3f>;
336 };
337
338 rom-a2h {
339 rom-addr = /bits/ 8 <0xa2>;
340 rom-val = /bits/ 8 <0x20>;
341 };
342
343 rom-a3h {
344 rom-addr = /bits/ 8 <0xa3>;
345 rom-val = /bits/ 8 <0x00>;
346 };
347
348 rom-a4h {
349 rom-addr = /bits/ 8 <0xa4>;
350 rom-val = /bits/ 8 <0x72>;
351 };
352
353 rom-a5h {
354 rom-addr = /bits/ 8 <0xa5>;
355 rom-val = /bits/ 8 <0x24>;
356 };
357
358 rom-a6h {
359 rom-addr = /bits/ 8 <0xa6>;
360 rom-val = /bits/ 8 <0x80>;
361 };
362
363 rom-a7h {
364 rom-addr = /bits/ 8 <0xa7>;
365 rom-val = /bits/ 8 <0xf5>;
366 };
367
368 rom-a8h {
369 rom-addr = /bits/ 8 <0xa8>;
370 rom-val = /bits/ 8 <0x24>;
371 };
372
373 rom-a9h {
374 rom-addr = /bits/ 8 <0xa9>;
375 rom-val = /bits/ 8 <0xb2>;
376 };
377
378 rom-aah {
379 rom-addr = /bits/ 8 <0xaa>;
380 rom-val = /bits/ 8 <0x8f>;
381 };
382
383 rom-aeh {
384 rom-addr = /bits/ 8 <0xae>;
385 rom-val = /bits/ 8 <0x0f>;
386 };
387 };
388 };
389
390 pwr_i2c: i2c@7000d000 {
391 status = "okay";
392 clock-frequency = <400000>;
393
394 /* Texas Instruments TPS65913 PMIC */
395 pmic: tps65913@58 {
396 compatible = "ti,tps65913";
397 reg = <0x58>;
398
399 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
400 #interrupt-cells = <2>;
401 interrupt-controller;
402
403 ti,system-power-controller;
404
405 palmas_gpio: gpio {
406 compatible = "ti,palmas-gpio";
407 gpio-controller;
408 #gpio-cells = <2>;
409 };
410
411 pinmux {
412 compatible = "ti,tps65913-pinctrl";
413
414 pinctrl-names = "default";
415 pinctrl-0 = <&palmas_default>;
416
417 palmas_default: pinmux {
418 pin_gpio4 {
419 pins = "gpio4";
420 function = "gpio";
421 };
422 };
423 };
424
425 pmic {
426 compatible = "ti,tps65913-pmic";
427
428 regulators {
429 vdd_1v8_vio: smps8 {
430 regulator-name = "vdd_1v8_gen";
431 regulator-min-microvolt = <1800000>;
432 regulator-max-microvolt = <1800000>;
433 regulator-always-on;
434 regulator-boot-on;
435 };
436
437 vdd_hv_sdmmc: smps9 {
438 regulator-name = "vdd_hv_sdmmc";
439 regulator-min-microvolt = <3300000>;
440 regulator-max-microvolt = <3300000>;
441 regulator-always-on;
442 regulator-boot-on;
443 };
444
445 avdd_lcd: ldo2 {
446 regulator-name = "avdd_lcd";
447 regulator-min-microvolt = <1800000>;
448 regulator-max-microvolt = <1800000>;
449 regulator-boot-on;
450 };
451
452 avdd_dsi_csi: ldo5 {
453 regulator-name = "avdd_dsi_csi";
454 regulator-min-microvolt = <1200000>;
455 regulator-max-microvolt = <1200000>;
456 regulator-boot-on;
457 };
458
459 vddio_usd: ldo9 {
460 regulator-name = "vddio_sdmmc";
461 regulator-min-microvolt = <3300000>;
462 regulator-max-microvolt = <3300000>;
463 regulator-always-on;
464 regulator-boot-on;
465 };
466
467 avdd_usb: ldousb {
468 regulator-name = "vdd_usb";
469 regulator-min-microvolt = <3300000>;
470 regulator-max-microvolt = <3300000>;
471 regulator-always-on;
472 regulator-boot-on;
473 };
474 };
475 };
476 };
477 };
478
479 sdmmc3: sdhci@700b0400 {
480 status = "okay";
481 bus-width = <4>;
482
483 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
484 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
485
486 vmmc-supply = <&vdd_hv_sdmmc>;
487 vqmmc-supply = <&vddio_usd>;
488 };
489
490 sdmmc4: sdhci@700b0600 {
491 status = "okay";
492 bus-width = <8>;
493 non-removable;
494
495 vmmc-supply = <&vdd_hv_sdmmc>;
496 vqmmc-supply = <&vdd_1v8_vio>;
497 };
498
499 usb1: usb@7d000000 {
500 status = "okay";
501 dr_mode = "otg";
502 };
503
504 clk32k_in: clock-32k {
505 compatible = "fixed-clock";
506 #clock-cells = <0>;
507 clock-frequency = <32768>;
508 clock-output-names = "ref-oscillator";
509 };
510
511 extcon-keys {
512 compatible = "gpio-keys";
513
514 switch-back-hall-sensor {
515 label = "Hall sensor (back)";
516 gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
517 linux,code = <SW_LID>;
518 };
519
520 switch-front-hall-sensor {
521 label = "Hall sensor (front)";
522 gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
523 linux,code = <SW_LID>;
524 };
525 };
526
527 gpio-keys {
528 compatible = "gpio-keys";
529
530 key-power {
531 label = "Power";
532 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
533 linux,code = <KEY_ENTER>;
534 };
535
536 key-volume-down {
537 label = "Volume Down";
538 gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
539 linux,code = <KEY_DOWN>;
540 };
541
542 key-volume-up {
543 label = "Volume Up";
544 gpios = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>;
545 linux,code = <KEY_UP>;
546 };
547 };
548
549 vdd_3v3_sys: regulator-bl-en {
550 compatible = "regulator-fixed";
551 regulator-name = "vdd_5v0_bl";
552 regulator-min-microvolt = <3300000>;
553 regulator-max-microvolt = <3300000>;
554 enable-active-high;
555 };
556
557 vddio_1v8_bl: regulator-bl-io {
558 compatible = "regulator-fixed";
559 regulator-name = "vddio_1v8_bl";
560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvolt = <1800000>;
562 enable-active-high;
563 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
564 };
565
566 vdd_lcd_io: regulator-lcdvio {
567 compatible = "regulator-fixed";
568 regulator-name = "dvdd_lcd";
569 regulator-min-microvolt = <1800000>;
570 regulator-max-microvolt = <1800000>;
571 enable-active-high;
572 gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
573 };
574
575 vsp_5v5_lcd: regulator-vsp {
576 compatible = "regulator-fixed";
577 regulator-name = "avdd_lcd_vsp";
578 regulator-min-microvolt = <5500000>;
579 regulator-max-microvolt = <5500000>;
580 enable-active-high;
581 gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
582 };
583
584 vsn_5v5_lcd: regulator-vsn {
585 compatible = "regulator-fixed";
586 regulator-name = "avdd_lcd_vsn";
587 regulator-min-microvolt = <5500000>;
588 regulator-max-microvolt = <5500000>;
589 enable-active-high;
590 gpio = <&gpio TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
591 };
592};