| Xuhui Lin | 43623c2 | 2025-04-15 23:51:16 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * (C) Copyright 2025 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
| 6 | #include "rockchip-u-boot.dtsi" |
| 7 | |
| 8 | / { |
| 9 | chosen { |
| 10 | u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; |
| 11 | }; |
| 12 | |
| 13 | dmc { |
| 14 | compatible = "rockchip,rk3576-dmc"; |
| 15 | bootph-all; |
| 16 | }; |
| 17 | }; |
| 18 | |
| 19 | &cru { |
| 20 | bootph-all; |
| 21 | }; |
| 22 | |
| 23 | &emmc_bus8 { |
| 24 | bootph-pre-ram; |
| 25 | bootph-some-ram; |
| 26 | }; |
| 27 | |
| 28 | &emmc_clk { |
| 29 | bootph-pre-ram; |
| 30 | bootph-some-ram; |
| 31 | }; |
| 32 | |
| 33 | &emmc_cmd { |
| 34 | bootph-pre-ram; |
| 35 | bootph-some-ram; |
| 36 | }; |
| 37 | |
| 38 | &emmc_rstnout { |
| 39 | bootph-pre-ram; |
| 40 | bootph-some-ram; |
| 41 | }; |
| 42 | |
| 43 | &emmc_strb { |
| 44 | bootph-pre-ram; |
| 45 | bootph-some-ram; |
| 46 | }; |
| 47 | |
| 48 | &ioc_grf { |
| 49 | bootph-all; |
| 50 | }; |
| 51 | |
| 52 | &pcfg_pull_none { |
| 53 | bootph-all; |
| 54 | }; |
| 55 | |
| 56 | &pcfg_pull_up { |
| 57 | bootph-all; |
| 58 | }; |
| 59 | |
| 60 | &pcfg_pull_up_drv_level_2 { |
| 61 | bootph-pre-ram; |
| 62 | bootph-some-ram; |
| 63 | }; |
| 64 | |
| 65 | &pcfg_pull_up_drv_level_3 { |
| 66 | bootph-pre-ram; |
| 67 | bootph-some-ram; |
| 68 | }; |
| 69 | |
| 70 | &pinctrl { |
| 71 | bootph-all; |
| 72 | }; |
| 73 | |
| 74 | &pmu1_grf { |
| 75 | bootph-all; |
| 76 | }; |
| 77 | |
| 78 | &sdhci { |
| 79 | bootph-pre-ram; |
| 80 | bootph-some-ram; |
| 81 | u-boot,spl-fifo-mode; |
| 82 | }; |
| 83 | |
| 84 | &sdmmc { |
| 85 | bootph-pre-ram; |
| 86 | bootph-some-ram; |
| 87 | u-boot,spl-fifo-mode; |
| 88 | }; |
| 89 | |
| 90 | &sdmmc0_bus4 { |
| 91 | bootph-pre-ram; |
| 92 | bootph-some-ram; |
| 93 | }; |
| 94 | |
| 95 | &sdmmc0_clk { |
| 96 | bootph-pre-ram; |
| 97 | bootph-some-ram; |
| 98 | }; |
| 99 | |
| 100 | &sdmmc0_cmd { |
| 101 | bootph-pre-ram; |
| 102 | bootph-some-ram; |
| 103 | }; |
| 104 | |
| 105 | &sdmmc0_det { |
| 106 | bootph-pre-ram; |
| 107 | bootph-some-ram; |
| 108 | }; |
| 109 | |
| 110 | &sdmmc0_pwren { |
| 111 | bootph-pre-ram; |
| 112 | bootph-some-ram; |
| 113 | }; |
| 114 | |
| 115 | &sys_grf { |
| 116 | bootph-all; |
| 117 | }; |
| 118 | |
| 119 | &uart0 { |
| 120 | bootph-all; |
| 121 | clock-frequency = <24000000>; |
| 122 | }; |
| 123 | |
| 124 | &uart0m0_xfer { |
| 125 | bootph-pre-sram; |
| 126 | bootph-pre-ram; |
| 127 | }; |
| 128 | |
| 129 | &xin24m { |
| 130 | bootph-all; |
| 131 | }; |