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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / arch / arm / dts / rk356x-u-boot.dtsi
blob: 8718697395365f1daa8566c5f47729b3ac63c793 [file] [log] [blame]
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
4 */
5
Quentin Schulzd9ffa5e2022-09-02 15:10:52 +0200[diff] [blame]6#include "rockchip-u-boot.dtsi"
7
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]8/ {
9 aliases {
10 mmc0 = &sdhci;
11 mmc1 = &sdmmc0;
Jonas Karlmanaec644c2023-07-28 12:05:40 +0000[diff] [blame]12 spi4 = &sfc;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]13 };
14
Nico Cheng16bc03c2021-10-26 10:42:20 +0800[diff] [blame]15 chosen {
Jonas Karlmandab889e2023-07-28 11:53:08 +0000[diff] [blame]16 u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
Nico Cheng16bc03c2021-10-26 10:42:20 +0800[diff] [blame]17 };
18
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]19 dmc: dmc {
20 compatible = "rockchip,rk3568-dmc";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]21 bootph-all;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]22 };
Jonas Karlmanbe56bb52023-02-22 22:44:41 +0000[diff] [blame]23
24 otp: nvmem@fe38c000 {
25 compatible = "rockchip,rk3568-otp";
26 reg = <0x0 0xfe38c000 0x0 0x4000>;
27 #address-cells = <1>;
28 #size-cells = <1>;
Jonas Karlmanbe56bb52023-02-22 22:44:41 +0000[diff] [blame]29
30 cpu_id: id@a {
31 reg = <0x0a 0x10>;
32 };
33 };
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]34};
35
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]36#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
37&binman {
38 simple-bin-spi {
39 mkimage {
40 args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
41 offset = <0x8000>;
42 };
43 };
Jonas Karlman13e3dc92023-05-17 18:26:29 +0000[diff] [blame]44};
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]45#endif
Jonas Karlman13e3dc92023-05-17 18:26:29 +0000[diff] [blame]46
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]47&cru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]48 bootph-all;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]49};
50
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]51&emmc_bus8 {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]52 bootph-pre-ram;
53 bootph-some-ram;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]54};
55
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]56&emmc_clk {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]57 bootph-pre-ram;
58 bootph-some-ram;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]59};
60
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]61&emmc_cmd {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]62 bootph-pre-ram;
63 bootph-some-ram;
Joseph Chen868dc1d2021-06-02 15:58:23 +0800[diff] [blame]64};
Nico Cheng16bc03c2021-10-26 10:42:20 +0800[diff] [blame]65
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]66&emmc_datastrobe {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]67 bootph-pre-ram;
68 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]69};
70
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]71&emmc_rstnout {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]72 bootph-pre-ram;
73 bootph-some-ram;
Jonas Karlmanc6391352023-08-03 21:11:54 +0000[diff] [blame]74};
75
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]76&fspi_pins {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]77 bootph-pre-ram;
78 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]79};
80
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]81&grf {
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]82 bootph-all;
83};
84
Jonas Karlmana1c69252024-11-10 00:56:15 +0000[diff] [blame]85&otp {
86 bootph-some-ram;
87};
88
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]89&pcfg_pull_none {
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]90 bootph-all;
91};
92
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]93&pcfg_pull_none_smt {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]94 bootph-pre-ram;
95 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]96};
97
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]98&pcfg_pull_up {
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]99 bootph-all;
100};
101
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]102&pcfg_pull_up_drv_level_2 {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]103 bootph-pre-ram;
104 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]105};
106
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]107&pinctrl {
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]108 bootph-all;
109};
110
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]111&pmucru {
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]112 bootph-all;
113};
114
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]115&pmugrf {
Jonas Karlmanc6391352023-08-03 21:11:54 +0000[diff] [blame]116 bootph-all;
117};
118
Jonas Karlman7238a692025-04-08 22:11:43 +0000[diff] [blame]119&rng {
120 status = "okay";
121};
122
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]123&sdhci {
124 bootph-pre-ram;
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]125 bootph-some-ram;
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]126 max-frequency = <200000000>;
127};
128
129&sdmmc0 {
130 bootph-pre-ram;
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]131 bootph-some-ram;
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]132};
133
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]134&sdmmc0_bus4 {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]135 bootph-pre-ram;
136 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]137};
138
139&sdmmc0_clk {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]140 bootph-pre-ram;
141 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]142};
143
144&sdmmc0_cmd {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]145 bootph-pre-ram;
146 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]147};
148
149&sdmmc0_det {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]150 bootph-pre-ram;
151 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]152};
153
154&sdmmc0_pwren {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]155 bootph-pre-ram;
156 bootph-some-ram;
Jonas Karlmanf216c612023-07-28 11:53:07 +0000[diff] [blame]157};
158
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]159&sfc {
160 u-boot,spl-sfc-no-dma;
161};
162
Jonas Karlman1fb8b8d2024-01-26 22:14:51 +0000[diff] [blame]163&uart2 {
Jonas Karlmandc3daaa2024-04-22 06:28:49 +0000[diff] [blame]164 bootph-all;
Jonas Karlman1fb8b8d2024-01-26 22:14:51 +0000[diff] [blame]165 clock-frequency = <24000000>;
166};
167
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]168&uart2m0_xfer {
169 bootph-all;
Jonas Karlmana9d8d532023-05-17 18:26:35 +0000[diff] [blame]170};
Jonas Karlman7b733dd2024-04-22 06:28:48 +0000[diff] [blame]171
172&xin24m {
173 bootph-all;
174};