blob: 1535defe38f5cdfe699833c986080f3f7f00c592 [file] [log] [blame]
Jim Liu147c0002022-09-27 16:45:15 +08001// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
3
4/dts-v1/;
Jim Liu4ddc8d42023-11-14 16:51:56 +08005
6#include <dt-bindings/phy/nuvoton,npcm-usbphy.h>
Jim Liu147c0002022-09-27 16:45:15 +08007#include "nuvoton-npcm845.dtsi"
Jim Liu89b26542022-11-28 10:32:44 +08008#include "nuvoton-npcm845-pincfg.dtsi"
Jim Liu147c0002022-09-27 16:45:15 +08009
10/ {
11 model = "Nuvoton npcm845 Development Board (Device Tree)";
12 compatible = "nuvoton,npcm845-evb", "nuvoton,npcm845";
13
14 aliases {
15 serial0 = &serial0;
Jim Liu2e4fb4e2023-01-17 16:59:21 +080016 ethernet0 = &gmac0;
17 ethernet1 = &gmac1;
18 ethernet2 = &gmac2;
19 ethernet3 = &gmac3;
Jim Liu89b26542022-11-28 10:32:44 +080020 i2c0 = &i2c0;
Jim Liu2e4fb4e2023-01-17 16:59:21 +080021 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c7;
28 i2c8 = &i2c8;
29 i2c9 = &i2c9;
30 i2c10 = &i2c10;
31 i2c11 = &i2c11;
32 i2c12 = &i2c12;
33 i2c13 = &i2c13;
34 i2c14 = &i2c14;
35 i2c15 = &i2c15;
36 i2c16 = &i2c16;
37 i2c17 = &i2c17;
38 i2c18 = &i2c18;
39 i2c19 = &i2c19;
40 i2c20 = &i2c20;
41 i2c21 = &i2c21;
42 i2c22 = &i2c22;
43 i2c23 = &i2c23;
44 i2c24 = &i2c24;
45 i2c25 = &i2c25;
46 i2c26 = &i2c26;
Jim Liu89b26542022-11-28 10:32:44 +080047 spi0 = &fiu0;
48 spi1 = &fiu1;
49 spi3 = &fiu3;
50 spi4 = &fiux;
Jim Liu4ddc8d42023-11-14 16:51:56 +080051 spi5 = &pspi;
Jim Liu89b26542022-11-28 10:32:44 +080052 usb0 = &udc0;
53 usb1 = &ehci1;
Jim Liu4ddc8d42023-11-14 16:51:56 +080054 usb2 = &udc8;
Jim Liu147c0002022-09-27 16:45:15 +080055 };
56
57 chosen {
58 stdout-path = &serial0;
59 };
60
61 memory {
62 reg = <0x0 0x0 0x0 0x40000000>;
63 };
Jim Liu89b26542022-11-28 10:32:44 +080064
Jim Liu4ddc8d42023-11-14 16:51:56 +080065 tpm@0 {
66 compatible = "microsoft,ftpm";
67 };
68
69 firmware {
70 optee {
71 compatible = "linaro,optee-tz";
72 method = "smc";
73 };
74 };
75
Jim Liu89b26542022-11-28 10:32:44 +080076 vsbr2: vsbr2 {
77 compatible = "regulator-npcm845";
78 regulator-name = "vr2";
79 regulator-min-microvolt = <1800000>;
80 regulator-max-microvolt = <3300000>;
81 regulator-always-on;
82 };
83
84 vsbv8: vsbv8 {
85 compatible = "regulator-npcm845";
86 regulator-name = "v8";
87 regulator-min-microvolt = <1800000>;
88 regulator-max-microvolt = <3300000>;
89 regulator-always-on;
90 };
91
92 vsbv5: vsbv5 {
93 compatible = "regulator-npcm845";
94 regulator-name = "v5";
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <3300000>;
97 regulator-always-on;
98 };
99
Jim Liu147c0002022-09-27 16:45:15 +0800100};
101
102&serial0 {
103 status = "okay";
104};
105
106&watchdog1 {
107 status = "okay";
108};
Jim Liu89b26542022-11-28 10:32:44 +0800109
110&fiu0 {
111 status = "okay";
112 pinctrl-names = "default";
113 pinctrl-0 = <&spi0cs1_pins>;
114 spi-nor@0 {
115 compatible = "jedec,spi-nor";
116 reg = <0>;
117 spi-max-frequency = <25000000>;
118 };
119 spi_flash@1 {
120 compatible = "jedec,spi-nor";
121 reg = <1>;
122 spi-max-frequency = <25000000>;
123 };
124};
125
126&fiu1 {
127 status = "okay";
128 spi-nor@0 {
129 compatible = "jedec,spi-nor";
130 reg = <0>;
131 spi-max-frequency = <25000000>;
132 };
133};
134
135&fiu3 {
136 pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
137 status = "okay";
138 vqspi-supply = <&vsbv5>;
139 vqspi-microvolt = <3300000>;
140 spi-nor@0 {
141 compatible = "jedec,spi-nor";
142 reg = <0>;
143 spi-max-frequency = <25000000>;
144 };
145};
146
147&fiux {
148 nuvoton,spix-mode;
149 status = "okay";
150};
151
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800152&gmac0 {
153 phy-mode = "sgmii";
154 snps,reset-active-low;
155 snps,reset-delays-us = <0 10000 1000000>;
156 snps,reset-gpio = <&gpio5 30 GPIO_ACTIVE_LOW>; /* gpio190 */
157 status = "okay";
158};
159
160&gmac1 {
161 phy-mode = "rgmii-id";
162 snps,reset-active-low;
163 snps,reset-delays-us = <0 10000 1000000>;
164 snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */
Jim Liu4ddc8d42023-11-14 16:51:56 +0800165 phy-supply = <&vsbr2>;
166 phy-supply-microvolt = <1800000>;
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800167 status = "okay";
168};
169
170&gmac2 {
171 phy-mode = "NC-SI";
172 max-speed = <100>;
173 use-ncsi;
174 pinctrl-0 = <&r1_pins
175 &r1en_pins
176 &r1oen_pins>;
177 status = "disabled";
178};
179
180&gmac3 {
181 phy-mode = "rmii";
182 pinctrl-names = "default";
183 pinctrl-0 = <&r2_pins
184 &r2oen_pins
185 &r2en_pins
186 &gpio91o_pins
187 &gpio92o_pins>;
188 snps,bitbang-mii;
189 snps,mdc-gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio91 */
190 snps,mdio-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* gpio92 */
191 snps,reset-active-low;
192 snps,reset-delays-us = <0 10000 1000000>;
Michael Changbf6c0992025-01-17 18:45:38 +0800193 snps,bitbang-delay = <1>;
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800194 snps,reset-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>; /* gpio93 */
195 status = "okay";
196};
197
Jim Liu4ddc8d42023-11-14 16:51:56 +0800198&pspi {
Jim Liu89b26542022-11-28 10:32:44 +0800199 status = "okay";
200};
201
202&usbphy1 {
203 status = "okay";
204};
205
206&usbphy2 {
207 status = "okay";
208};
209
210&usbphy3 {
211 status = "okay";
212};
213
214&udc0 {
215 status = "okay";
Jim Liu4ddc8d42023-11-14 16:51:56 +0800216 phys = <&usbphy1 NPCM_UDC0_7>;
Jim Liu89b26542022-11-28 10:32:44 +0800217};
218
219&sdhci0 {
220 bus-width = <0x8>;
221 status = "okay";
222};
223
224&ehci1 {
225 status = "okay";
Jim Liu4ddc8d42023-11-14 16:51:56 +0800226 phys = <&usbphy2 NPCM_USBH1>;
Jim Liu89b26542022-11-28 10:32:44 +0800227};
228
Jim Liu4ddc8d42023-11-14 16:51:56 +0800229&udc8 {
Jim Liu89b26542022-11-28 10:32:44 +0800230 status = "okay";
Jim Liu4ddc8d42023-11-14 16:51:56 +0800231 phys = <&usbphy3 NPCM_UDC8>;
Jim Liu89b26542022-11-28 10:32:44 +0800232};
233
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800234&rng {
235 status = "okay";
236};
237
238&aes {
239 status = "okay";
240};
241
242&sha {
243 status = "okay";
244};
245
246&otp {
247 status = "okay";
248};
249
Jim Liu89b26542022-11-28 10:32:44 +0800250&i2c0 {
251 status = "okay";
252};
253
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800254&i2c1 {
255 status = "okay";
256};
257
258&i2c2 {
259 status = "okay";
260};
261
262&i2c3 {
263 status = "okay";
264};
265
266&i2c4 {
267 status = "okay";
268};
269
270&i2c5 {
271 status = "okay";
272};
273
274&i2c6 {
275 status = "okay";
276 tmp100@48 {
277 compatible = "tmp100";
278 reg = <0x48>;
279 status = "okay";
280 };
281};
282
283&i2c7 {
284 status = "okay";
285};
286
287&i2c8 {
288 status = "okay";
289};
290
291&i2c9 {
292 status = "okay";
293};
294
295&i2c10 {
296 status = "okay";
297};
298
299&i2c11 {
300 status = "okay";
301};
302
303&i2c12 {
304 status = "okay";
305};
306
307&i2c13 {
308 status = "okay";
309};
310
311&i2c14 {
312 status = "okay";
313};
314
315&i2c15 {
316 status = "okay";
317};
318
319&i2c16 {
320 status = "okay";
321};
322
323&i2c17 {
324 status = "okay";
325};
326
327&i2c18 {
328 status = "okay";
329};
330
331&i2c19 {
332 status = "okay";
333};
334
335&i2c20 {
336 status = "okay";
337};
338
339&i2c21 {
340 status = "okay";
341};
342
343&i2c22 {
344 status = "okay";
345};
346
347&i2c23 {
348 status = "okay";
349};
350
351&i2c24 {
352 status = "okay";
353};
354
355&i2c25 {
356 status = "okay";
357};
358
359&i2c26 {
360 status = "okay";
361};
362
Jim Liu89b26542022-11-28 10:32:44 +0800363&pinctrl {
364 pinctrl-names = "default";
365 pinctrl-0 = <
366 &gspi_pins
367 &vgadig_pins
368 &spix_pins
369 &r1_pins
370 &r1en_pins
371 &r1oen_pins
372 >;
Sughosh Ganu4c3dcb32023-08-22 23:09:55 +0530373};