blob: 0060c7a69349a31e142c40806c372ed2fccdf7ea [file] [log] [blame]
Garrett Giordanoe1b8c392024-11-18 15:16:05 -08001// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * phyCORE-AM62Ax dts file for R5 SPL
4 * Copyright (C) 2024 PHYTEC America LLC
5 * Author: Garrett Giordano <ggiordano@phytec.com>
6 *
7 * Product homepage:
8 * https://www.phytec.com/product/phycore-am62ax
9 */
10
11#include "k3-am62a7-phyboard-lyra-rdk.dts"
12#include "k3-am62a-phycore-som-ddr4-2gb.dtsi"
13#include "k3-am62a-ddr.dtsi"
14
15#include "k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi"
16
17/ {
18 aliases {
19 remoteproc0 = &sysctrler;
20 remoteproc1 = &a53_0;
21 serial0 = &wkup_uart0;
22 serial3 = &main_uart1;
23 };
24
25 a53_0: a53@0 {
26 compatible = "ti,am654-rproc";
27 reg = <0x00 0x00a90000 0x00 0x10>;
28 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
29 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
30 <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
31 resets = <&k3_reset 135 0>;
32 clocks = <&k3_clks 61 0>;
33 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
34 assigned-clock-parents = <&k3_clks 61 2>;
35 assigned-clock-rates = <200000000>, <1200000000>;
36 ti,sci = <&dmsc>;
37 ti,sci-proc-id = <32>;
38 ti,sci-host-id = <10>;
39 bootph-pre-ram;
40 };
41
42 dm_tifs: dm-tifs {
43 compatible = "ti,j721e-dm-sci";
44 ti,host-id = <36>;
45 ti,secure-host;
46 mbox-names = "rx", "tx";
47 mboxes= <&secure_proxy_main 22>,
48 <&secure_proxy_main 23>;
49 bootph-pre-ram;
50 };
51
52 memory@80000000 {
53 device_type = "memory";
54 /* 2G RAM */
55 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
56 bootph-pre-ram;
57 };
58};
59
60&cbass_main {
61 bootph-pre-ram;
62 sa3_secproxy: secproxy@44880000 {
63 compatible = "ti,am654-secure-proxy";
64 #mbox-cells = <1>;
65 reg = <0x00 0x44880000 0x00 0x20000>,
66 <0x0 0x44860000 0x0 0x20000>,
67 <0x0 0x43600000 0x0 0x10000>;
68 reg-names = "rt", "scfg", "target_data";
69 bootph-pre-ram;
70 };
71
72 sysctrler: sysctrler {
73 compatible = "ti,am654-system-controller";
74 mboxes= <&secure_proxy_main 1>,
75 <&secure_proxy_main 0>,
76 <&sa3_secproxy 0>;
77 mbox-names = "tx", "rx", "boot_notify";
78 bootph-pre-ram;
79 };
80};
81
82&dmsc {
83 mboxes= <&secure_proxy_main 0>,
84 <&secure_proxy_main 1>,
85 <&secure_proxy_main 0>;
86 mbox-names = "rx", "tx", "notify";
87 ti,host-id = <35>;
88 ti,secure-host;
89};
90
91&main_bcdma {
92 ti,sci = <&dm_tifs>;
93};
94
95&main_pktdma {
96 ti,sci = <&dm_tifs>;
97};
98
99&main_pmx0 {
100 bootph-pre-ram;
101};
102
103/* Main UART1 is used for TIFS firmware logs */
104&main_uart1 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&main_uart1_pins_default>;
107 status = "okay";
108 bootph-pre-ram;
109};
110
111&mcu_pmx0 {
112 status = "okay";
113 bootph-pre-ram;
114
115 wkup_uart0_pins_default: wkup-uart0-pins-default {
116 pinctrl-single,pins = <
117 AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
118 AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
119 AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
120 AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
121 >;
122 bootph-pre-ram;
123 };
124};
125
126&ospi0 {
127 reg = <0x00 0x0fc40000 0x00 0x100>,
128 <0x00 0x60000000 0x00 0x08000000>;
129};
130
131/* WKUP UART0 is used for DM firmware logs */
132&wkup_uart0 {
133 pinctrl-names = "default";
134 pinctrl-0 = <&wkup_uart0_pins_default>;
135 status = "okay";
136 bootph-pre-ram;
137};