| Ye Li | f3c8abb | 2025-04-28 18:37:43 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2025 NXP |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | binman { |
| 8 | multiple-images; |
| 9 | |
| 10 | m33-oei-ddrfw { |
| 11 | pad-byte = <0x00>; |
| 12 | align-size = <0x8>; |
| 13 | filename = "m33-oei-ddrfw.bin"; |
| 14 | |
| 15 | oei-m33-ddr { |
| 16 | align-size = <0x4>; |
| 17 | filename = "oei-m33-ddr.bin"; |
| 18 | type = "blob-ext"; |
| 19 | }; |
| 20 | |
| 21 | imx-lpddr { |
| 22 | type = "nxp-header-ddrfw"; |
| 23 | |
| 24 | imx-lpddr-imem { |
| 25 | filename = "lpddr5_imem_v202311.bin"; |
| 26 | type = "blob-ext"; |
| 27 | }; |
| 28 | |
| 29 | imx-lpddr-dmem { |
| 30 | filename = "lpddr5_dmem_v202311.bin"; |
| 31 | type = "blob-ext"; |
| 32 | }; |
| 33 | }; |
| 34 | |
| 35 | imx-lpddr-qb { |
| 36 | type = "nxp-header-ddrfw"; |
| 37 | |
| 38 | imx-lpddr-imem-qb { |
| 39 | filename = "lpddr5_imem_qb_v202311.bin"; |
| 40 | type = "blob-ext"; |
| 41 | }; |
| 42 | |
| 43 | imx-lpddr-dmem-qb { |
| 44 | filename = "lpddr5_dmem_qb_v202311.bin"; |
| 45 | type = "blob-ext"; |
| 46 | }; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | imx-boot { |
| 51 | filename = "flash.bin"; |
| 52 | pad-byte = <0x00>; |
| 53 | |
| 54 | spl { |
| 55 | align = <0x400>; |
| 56 | align-size = <0x400>; |
| 57 | type = "mkimage"; |
| 58 | args = "-n spl/u-boot-spl.cfgout -T imx8image"; |
| 59 | }; |
| 60 | |
| 61 | u-boot { |
| 62 | type = "mkimage"; |
| 63 | args = "-n u-boot-container.cfgout -T imx8image"; |
| 64 | }; |
| 65 | }; |
| 66 | }; |
| 67 | }; |
| 68 | |
| 69 | &A55_0 { |
| 70 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 71 | /delete-property/ power-domains; |
| 72 | }; |
| 73 | |
| 74 | &A55_1 { |
| 75 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 76 | /delete-property/ power-domains; |
| 77 | }; |
| 78 | |
| 79 | &A55_2 { |
| 80 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 81 | /delete-property/ power-domains; |
| 82 | }; |
| 83 | |
| 84 | &A55_3 { |
| 85 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 86 | /delete-property/ power-domains; |
| 87 | }; |
| 88 | |
| 89 | &A55_4 { |
| 90 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 91 | /delete-property/ power-domains; |
| 92 | }; |
| 93 | |
| 94 | &A55_5 { |
| 95 | clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>; |
| 96 | /delete-property/ power-domains; |
| 97 | }; |
| 98 | |
| 99 | &aips1 { |
| 100 | bootph-all; |
| 101 | }; |
| 102 | |
| 103 | &aips2 { |
| 104 | bootph-all; |
| 105 | }; |
| 106 | |
| 107 | &aips3 { |
| 108 | bootph-pre-ram; |
| 109 | }; |
| 110 | |
| 111 | &clk_ext1 { |
| 112 | bootph-all; |
| 113 | }; |
| 114 | |
| 115 | &elemu1 { |
| 116 | bootph-all; |
| 117 | status = "okay"; |
| 118 | }; |
| 119 | |
| 120 | &elemu3 { |
| 121 | bootph-all; |
| 122 | status = "okay"; |
| 123 | }; |
| 124 | |
| 125 | &{/firmware} { |
| 126 | bootph-all; |
| 127 | }; |
| 128 | |
| 129 | &{/firmware/scmi} { |
| 130 | bootph-all; |
| 131 | }; |
| 132 | |
| 133 | &{/firmware/scmi/protocol@11} { |
| 134 | bootph-all; |
| 135 | }; |
| 136 | |
| 137 | &{/firmware/scmi/protocol@13} { |
| 138 | bootph-all; |
| 139 | }; |
| 140 | |
| 141 | &{/firmware/scmi/protocol@14} { |
| 142 | bootph-all; |
| 143 | }; |
| 144 | |
| 145 | &{/firmware/scmi/protocol@19} { |
| 146 | bootph-all; |
| 147 | }; |
| 148 | |
| 149 | &gpio2 { |
| 150 | bootph-pre-ram; |
| 151 | }; |
| 152 | |
| 153 | &gpio3 { |
| 154 | bootph-pre-ram; |
| 155 | }; |
| 156 | |
| 157 | &gpio4 { |
| 158 | bootph-pre-ram; |
| 159 | }; |
| 160 | |
| 161 | &gpio5 { |
| 162 | bootph-pre-ram; |
| 163 | }; |
| 164 | |
| 165 | &mu2 { |
| 166 | bootph-all; |
| 167 | }; |
| 168 | |
| 169 | &osc_24m { |
| 170 | bootph-all; |
| 171 | }; |
| 172 | |
| 173 | &{/soc} { |
| 174 | bootph-all; |
| 175 | }; |
| 176 | |
| 177 | &sram0 { |
| 178 | bootph-all; |
| 179 | }; |
| 180 | |
| 181 | &scmi_buf0 { |
| 182 | reg = <0x0 0x400>; |
| 183 | bootph-all; |
| 184 | }; |
| 185 | |
| 186 | &scmi_buf1 { |
| 187 | bootph-all; |
| 188 | }; |