blob: 54b4d0aa3b6534d5aea60785b05b5817d4412da8 [file] [log] [blame]
Peng Fanaafee2c2024-12-03 23:42:54 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2024 NXP
4 */
5
6#include "imx91-u-boot.dtsi"
7
8/ {
9 wdt-reboot {
10 compatible = "wdt-reboot";
11 wdt = <&wdog3>;
12 bootph-pre-ram;
13 bootph-some-ram;
14 };
15
16 firmware {
17 optee {
18 compatible = "linaro,optee-tz";
19 method = "smc";
20 };
21 };
22};
23
24&{/soc@0} {
25 bootph-all;
26 bootph-pre-ram;
27};
28
29&aips1 {
30 bootph-pre-ram;
31 bootph-all;
32};
33
34&aips2 {
35 bootph-pre-ram;
36 bootph-some-ram;
37};
38
39&aips3 {
40 bootph-pre-ram;
41 bootph-some-ram;
42};
43
44&iomuxc {
45 bootph-pre-ram;
46 bootph-some-ram;
47};
48
49&reg_usdhc2_vmmc {
50 u-boot,off-on-delay-us = <20000>;
51 bootph-pre-ram;
52 bootph-some-ram;
53};
54
55&pinctrl_reg_usdhc2_vmmc {
56 bootph-pre-ram;
57};
58
59&pinctrl_uart1 {
60 bootph-pre-ram;
61 bootph-some-ram;
62};
63
64&pinctrl_usdhc1 {
65 bootph-pre-ram;
66 bootph-some-ram;
67};
68
69&pinctrl_usdhc2_gpio {
70 bootph-pre-ram;
71 bootph-some-ram;
72};
73
74&pinctrl_usdhc2 {
75 bootph-pre-ram;
76 bootph-some-ram;
77};
78
79&gpio1 {
80 bootph-pre-ram;
81 bootph-some-ram;
82};
83
84&gpio2 {
85 bootph-pre-ram;
86 bootph-some-ram;
87};
88
89&gpio3 {
90 bootph-pre-ram;
91 bootph-some-ram;
92};
93
94&gpio4 {
95 bootph-pre-ram;
96 bootph-some-ram;
97};
98
99&lpuart1 {
100 bootph-pre-ram;
101 bootph-some-ram;
102};
103
104&usdhc1 {
105 bootph-pre-ram;
106 bootph-some-ram;
107};
108
109&usdhc2 {
110 bootph-pre-ram;
111 bootph-some-ram;
112 fsl,signal-voltage-switch-extra-delay-ms = <8>;
113};
114
115&lpi2c1 {
116 bootph-pre-ram;
117 bootph-some-ram;
118};
119
120&lpi2c2 {
121 bootph-pre-ram;
122 bootph-some-ram;
123};
124
125&lpi2c3 {
126 bootph-pre-ram;
127 bootph-some-ram;
128};
129
130&{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
131 bootph-pre-ram;
132 bootph-some-ram;
133};
134
135&{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} {
136 bootph-pre-ram;
137 bootph-some-ram;
138};
139
140&pinctrl_lpi2c1 {
141 bootph-pre-ram;
142 bootph-some-ram;
143};
144
145&pinctrl_lpi2c2 {
146 bootph-pre-ram;
147 bootph-some-ram;
148};
149
150&pinctrl_lpi2c3 {
151 bootph-pre-ram;
152 bootph-some-ram;
153};
154
155&fec {
156 compatible = "fsl,imx91-fec", "fsl,imx93-fec", "fsl,imx8mq-fec";
157 phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
158 phy-reset-duration = <15>;
159 phy-reset-post-delay = <100>;
160};
161
162&ethphy1 {
163 reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
164 reset-assert-us = <15000>;
165 reset-deassert-us = <100000>;
166};
167
168&s4muap {
169 bootph-pre-ram;
170 bootph-some-ram;
171 status = "okay";
172};
173
174&clk {
175 bootph-all;
176 bootph-pre-ram;
177 /delete-property/ assigned-clocks;
178 /delete-property/ assigned-clock-rates;
179 /delete-property/ assigned-clock-parents;
180};
181
182&osc_32k {
183 bootph-all;
184 bootph-pre-ram;
185};
186
187&osc_24m {
188 bootph-all;
189 bootph-pre-ram;
190};
191
192&clk_ext1 {
193 bootph-all;
194 bootph-pre-ram;
195};