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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / arch / arm / dts / imx8mm-phyboard-polis-rdk-u-boot.dtsi
blob: 512dbc9ee86aa79632b91b1dfe19e0f3e89bf9c2 [file] [log] [blame]
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2020 PHYTEC Messtechnik GmbH
4 * Author: Teresa Remmet <t.remmet@phytec.de>
5 */
6
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]7#include "imx8mm-u-boot.dtsi"
8
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]13 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]14 };
15};
16
Yunus Basf03f1392024-11-22 11:29:38 +0100[diff] [blame]17&pinctrl_i2c1 {
18 bootph-pre-ram;
19};
20
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]21&pinctrl_uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]22 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]23};
24
25&pinctrl_usdhc2_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]26 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]27};
28
29&pinctrl_usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]30 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]31};
32
33&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]34 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]35};
36
Teresa Remmet96303ad2021-10-06 11:56:50 +0200[diff] [blame]37&pinctrl_wdog {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]38 bootph-pre-ram;
Teresa Remmet96303ad2021-10-06 11:56:50 +0200[diff] [blame]39};
40
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]41&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]42 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]43};
44
45&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]46 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]47};
48
49&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]50 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]51};
52
53&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]54 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]55};
56
57&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]59};
60
Yunus Basf03f1392024-11-22 11:29:38 +0100[diff] [blame]61&i2c1 {
62 bootph-pre-ram;
63};
64
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]65&uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]66 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]67};
68
69&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]70 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]71};
72
73&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]74 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]75};
76
77&wdog1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]78 bootph-pre-ram;
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]79};