blob: 21addaf6ed0a192d59bc317b31c9662368d0c8b2 [file] [log] [blame]
Stefan Agner7b852342018-05-30 19:01:48 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02003 * Copyright (C) 2018-2019 Toradex AG
Stefan Agner7b852342018-05-30 19:01:48 +02004 */
5#include <common.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02006
Stefan Agner7b852342018-05-30 19:01:48 +02007#include <asm/arch/clock.h>
8#include <asm/arch/crm_regs.h>
9#include <asm/arch/imx-regs.h>
10#include <asm/arch-mx6/clock.h>
11#include <asm/arch-mx6/imx-regs.h>
12#include <asm/arch-mx6/mx6ull_pins.h>
13#include <asm/arch/sys_proto.h>
14#include <asm/gpio.h>
15#include <asm/mach-imx/boot_mode.h>
16#include <asm/mach-imx/iomux-v3.h>
17#include <asm/io.h>
Stefan Agner7b852342018-05-30 19:01:48 +020018#include <dm.h>
19#include <dm/platform_data/serial_mxc.h>
20#include <fdt_support.h>
Stefan Agner7b852342018-05-30 19:01:48 +020021#include <imx_thermal.h>
22#include <jffs2/load_kernel.h>
23#include <linux/sizes.h>
Stefan Agner7b852342018-05-30 19:01:48 +020024#include <miiphy.h>
25#include <mtd_node.h>
26#include <netdev.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020027
Stefan Agner7b852342018-05-30 19:01:48 +020028#include "../common/tdx-common.h"
Stefan Agnerbf1f2892019-04-09 17:24:09 +020029#include "../common/tdx-cfg-block.h"
Stefan Agner7b852342018-05-30 19:01:48 +020030
31DECLARE_GLOBAL_DATA_PTR;
32
Stefan Agner7b852342018-05-30 19:01:48 +020033#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
34 PAD_CTL_DSE_48ohm)
35
Philippe Schenkerde51f532019-04-09 17:24:12 +020036#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
37
Stefan Agner7b852342018-05-30 19:01:48 +020038#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
39
40#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
41
Stefan Agner7b852342018-05-30 19:01:48 +020042int dram_init(void)
43{
44 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
45
46 return 0;
47}
48
Stefan Agner7b852342018-05-30 19:01:48 +020049#ifdef CONFIG_NAND_MXS
Stefan Agner7b852342018-05-30 19:01:48 +020050static void setup_gpmi_nand(void)
51{
Stefan Agner7b852342018-05-30 19:01:48 +020052 setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
53 (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
54}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020055#endif /* CONFIG_NAND_MXS */
Stefan Agner7b852342018-05-30 19:01:48 +020056
57#ifdef CONFIG_VIDEO_MXS
58static iomux_v3_cfg_t const lcd_pads[] = {
59 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
60 MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
61 MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
62 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
63 MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
64 MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
65 MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
66 MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
67 MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
68 MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
69 MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
70 MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
71 MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
72 MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
73 MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
74 MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
75 MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
76 MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
77 MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
78 MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
79 MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
80 MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
81};
82
83static iomux_v3_cfg_t const backlight_pads[] = {
84 /* Backlight On */
85 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
86 /* Backlight PWM<A> (multiplexed pin) */
87 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
88};
89
90#define GPIO_BL_ON IMX_GPIO_NR(1, 11)
91#define GPIO_PWM_A IMX_GPIO_NR(4, 11)
92
93static int setup_lcd(void)
94{
95 imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
96
97 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
98
99 /* Set BL_ON */
100 gpio_request(GPIO_BL_ON, "BL_ON");
101 gpio_direction_output(GPIO_BL_ON, 1);
102
103 /* Set PWM<A> to full brightness (assuming inversed polarity) */
104 gpio_request(GPIO_PWM_A, "PWM<A>");
105 gpio_direction_output(GPIO_PWM_A, 0);
106
107 return 0;
108}
109#endif
110
Stefan Agner7b852342018-05-30 19:01:48 +0200111#ifdef CONFIG_FEC_MXC
Stefan Agner7b852342018-05-30 19:01:48 +0200112static int setup_fec(void)
113{
114 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
115 int ret;
116
Stefan Agner7b852342018-05-30 19:01:48 +0200117 /* provide the PHY clock from the i.MX 6 */
118 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
119 if (ret)
120 return ret;
121
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200122 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
Stefan Agner7b852342018-05-30 19:01:48 +0200123 clrsetbits_le32(&iomuxc_regs->gpr[1],
124 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
125 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
126
Marcel Ziswiler561d1372019-04-09 17:24:11 +0200127 /* give new Ethernet PHY power save mode circuitry time to settle */
128 mdelay(300);
129
Stefan Agner7b852342018-05-30 19:01:48 +0200130 return 0;
131}
132
133int board_phy_config(struct phy_device *phydev)
134{
135 if (phydev->drv->config)
136 phydev->drv->config(phydev);
137 return 0;
138}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200139#endif /* CONFIG_FEC_MXC */
Stefan Agner7b852342018-05-30 19:01:48 +0200140
141int board_init(void)
142{
143 /* address of boot parameters */
144 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
145
146#ifdef CONFIG_FEC_MXC
147 setup_fec();
148#endif
149
150#ifdef CONFIG_NAND_MXS
151 setup_gpmi_nand();
152#endif
153
154#ifdef CONFIG_VIDEO_MXS
155 setup_lcd();
156#endif
157
Stefan Agner7b852342018-05-30 19:01:48 +0200158 return 0;
159}
160
161#ifdef CONFIG_CMD_BMODE
162/* TODO */
163static const struct boot_mode board_boot_modes[] = {
164 /* 4 bit bus width */
165 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
166 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
167 {NULL, 0},
168};
169#endif
170
171int board_late_init(void)
172{
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200173#ifdef CONFIG_TDX_CFG_BLOCK
174 /*
175 * If we have a valid config block and it says we are a module with
176 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
177 */
178 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
179 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
Stefan Agner7b852342018-05-30 19:01:48 +0200180 env_set("variant", "-wifi");
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200181#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200182
Philippe Schenkerde51f532019-04-09 17:24:12 +0200183 /*
184 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
185 * SOC to request for a lower voltage during sleep. This is necessary
186 * because the voltage is changing too slow for the SOC to wake up
187 * properly.
188 */
189 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
190
Stefan Agner7b852342018-05-30 19:01:48 +0200191#ifdef CONFIG_CMD_BMODE
192 add_board_boot_modes(board_boot_modes);
193#endif
194
195#ifdef CONFIG_CMD_USB_SDP
196 if (is_boot_from_usb()) {
197 printf("Serial Downloader recovery mode, using sdp command\n");
198 env_set("bootdelay", "0");
199 env_set("bootcmd", "sdp 0");
200 }
201#endif /* CONFIG_CMD_USB_SDP */
202
203 return 0;
204}
205
206int checkboard(void)
207{
208 printf("Model: Toradex Colibri iMX6ULL\n");
209
210 return 0;
211}
212
213#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
214int ft_board_setup(void *blob, bd_t *bd)
215{
216#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
217 static struct node_info nodes[] = {
218 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
219 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
220 };
221
222 /* Update partition nodes using info from mtdparts env var */
223 puts(" Updating MTD partitions...\n");
224 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
225#endif
226
227 return ft_common_board_setup(blob, bd);
228}
229#endif
230
Stefan Agner7b852342018-05-30 19:01:48 +0200231static struct mxc_serial_platdata mxc_serial_plat = {
232 .reg = (struct mxc_uart *)UART1_BASE,
233 .use_dte = 1,
234};
235
236U_BOOT_DEVICE(mxc_serial) = {
237 .name = "serial_mxc",
238 .platdata = &mxc_serial_plat,
239};