blob: 987069447d53ef513d1fbff470f6699296acd267 [file] [log] [blame]
Peng Fancbe5d382021-08-07 16:01:13 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 NXP
4 */
5
6#ifndef __IMX8ULP_EVK_H
7#define __IMX8ULP_EVK_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#define CONFIG_SYS_BOOTM_LEN (SZ_64M)
Peng Fancbe5d382021-08-07 16:01:13 +080013#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Peng Fancbe5d382021-08-07 16:01:13 +080014#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15
16#ifdef CONFIG_SPL_BUILD
Peng Fancbe5d382021-08-07 16:01:13 +080017#define CONFIG_MALLOC_F_ADDR 0x22040000
18
Peng Fancbe5d382021-08-07 16:01:13 +080019#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
20
21#endif
22
Peng Fancbe5d382021-08-07 16:01:13 +080023/* ENET Config */
24#if defined(CONFIG_FEC_MXC)
Peng Fancbe5d382021-08-07 16:01:13 +080025#define PHY_ANEG_TIMEOUT 20000
26
Peng Fancbe5d382021-08-07 16:01:13 +080027#define CONFIG_FEC_MXC_PHYADDR 1
Peng Fancbe5d382021-08-07 16:01:13 +080028#endif
29
30#ifdef CONFIG_DISTRO_DEFAULTS
31#define BOOT_TARGET_DEVICES(func) \
32 func(MMC, mmc, 0)
33
34#include <config_distro_bootcmd.h>
35#else
36#define BOOTENV
37#endif
38
39/* Initial environment variables */
40#define CONFIG_EXTRA_ENV_SETTINGS \
41 BOOTENV \
Tom Rini9004ee02021-08-23 10:25:30 -040042 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
43 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
Peng Fancbe5d382021-08-07 16:01:13 +080044 "image=Image\0" \
45 "console=ttyLP1,115200 earlycon\0" \
46 "fdt_addr_r=0x83000000\0" \
47 "boot_fit=no\0" \
48 "fdtfile=imx8ulp-evk.dtb\0" \
49 "initrd_addr=0x83800000\0" \
50 "bootm_size=0x10000000\0" \
Tom Rinib113bca2021-12-11 14:55:52 -050051 "mmcpart=1\0" \
Peng Fanbb4bb582022-04-15 12:23:41 +080052 "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
Peng Fancbe5d382021-08-07 16:01:13 +080053
54/* Link Definitions */
Peng Fancbe5d382021-08-07 16:01:13 +080055
56#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
57#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
Peng Fancbe5d382021-08-07 16:01:13 +080058
Peng Fancbe5d382021-08-07 16:01:13 +080059
Peng Fancbe5d382021-08-07 16:01:13 +080060#define CONFIG_SYS_SDRAM_BASE 0x80000000
61#define PHYS_SDRAM 0x80000000
62#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
63
Peng Fancbe5d382021-08-07 16:01:13 +080064/* Using ULP WDOG for reset */
65#define WDOG_BASE_ADDR WDG3_RBASE
66#endif