Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 5e017409383c3677e376fa7a359d2c71c0db31b8 / . / dts / upstream / Bindings / pinctrl / mediatek,mt8195-pinctrl.yaml
blob: 33cb71775db979f34a4de52f270fc7201d1cbe39 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek MT8195 Pin Controller
8
9maintainers:
10 - Sean Wang <sean.wang@mediatek.com>
11
12description:
13 The MediaTek's MT8195 Pin controller is used to control SoC pins.
14
15properties:
16 compatible:
17 const: mediatek,mt8195-pinctrl
18
19 gpio-controller: true
20
21 '#gpio-cells':
22 description:
23 Number of cells in GPIO specifier. Since the generic GPIO binding is used,
24 the amount of cells must be specified as 2. See the below mentioned gpio
25 binding representation for description of particular cells.
26 const: 2
27
28 gpio-ranges:
29 description: GPIO valid number range.
30 maxItems: 1
31
32 gpio-line-names: true
33
34 reg:
35 description:
36 Physical address base for GPIO base registers. There are 8 GPIO physical
37 address base in mt8195.
38 maxItems: 8
39
40 reg-names:
41 description:
42 GPIO base register names.
43 maxItems: 8
44
45 interrupt-controller: true
46
47 '#interrupt-cells':
48 const: 2
49
50 interrupts:
51 description: The interrupt outputs to sysirq.
52 maxItems: 1
53
54 mediatek,rsel-resistance-in-si-unit:
55 type: boolean
56 description:
57 Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
58 define or si unit value(ohm) to set different resistance.
59
60# PIN CONFIGURATION NODES
61patternProperties:
62 '-pins$':
63 type: object
64 additionalProperties: false
65 patternProperties:
66 '^pins':
67 type: object
68 additionalProperties: false
69 description: |
70 A pinctrl node should contain at least one subnodes representing the
71 pinctrl groups available on the machine. Each subnode will list the
72 pins it needs, and how they should be configured, with regard to muxer
73 configuration, pullups, drive strength, input enable/disable and input
74 schmitt.
75 An example of using macro:
76 pincontroller {
77 /* GPIO0 set as multifunction GPIO0 */
78 gpio-pins {
79 pins {
80 pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
81 }
82 };
83 /* GPIO8 set as multifunction SDA0 */
84 i2c0-pins {
85 pins {
86 pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
87 }
88 };
89 };
90 $ref: pinmux-node.yaml
91
92 properties:
93 pinmux:
94 description:
95 Integer array, represents gpio pin number and mux setting.
96 Supported pin number and mux varies for different SoCs, and are
97 defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
98
99 drive-strength:
100 enum: [2, 4, 6, 8, 10, 12, 14, 16]
101
102 drive-strength-microamp:
103 enum: [125, 250, 500, 1000]
104
105 bias-pull-down:
106 oneOf:
107 - type: boolean
108 - enum: [100, 101, 102, 103]
109 description: mt8195 pull down PUPD/R0/R1 type define value.
110 - enum: [200, 201, 202, 203, 204, 205, 206, 207]
111 description: mt8195 pull down RSEL type define value.
112 - enum: [75000, 5000]
113 description: mt8195 pull down RSEL type si unit value(ohm).
114 description: |
115 For pull down type is normal, it don't need add RSEL & R1R0 define
116 and resistance value.
117 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
118 set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
119 "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
120 "MTK_PUPD_SET_R1R0_11" define in mt8195.
121 For pull down type is RSEL, it can add RSEL define & resistance
122 value(ohm) to set different resistance by identifying property
123 "mediatek,rsel-resistance-in-si-unit".
124 It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
125 & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
126 & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
127 & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
128 define in mt8195. It can also support resistance value(ohm)
129 "75000" & "5000" in mt8195.
130
131 An example of using RSEL define:
132 pincontroller {
133 i2c0_pin {
134 pins {
135 pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
136 bias-pull-down = <MTK_PULL_SET_RSEL_001>;
137 }
138 };
139 };
140 An example of using si unit resistance value(ohm):
141 &pio {
142 mediatek,rsel-resistance-in-si-unit;
143 }
144 pincontroller {
145 i2c0_pin {
146 pins {
147 pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
148 bias-pull-down = <75000>;
149 }
150 };
151 };
152
153 bias-pull-up:
154 oneOf:
155 - type: boolean
156 - enum: [100, 101, 102, 103]
157 description: mt8195 pull up PUPD/R0/R1 type define value.
158 - enum: [200, 201, 202, 203, 204, 205, 206, 207]
159 description: mt8195 pull up RSEL type define value.
160 - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000]
161 description: mt8195 pull up RSEL type si unit value(ohm).
162 description: |
163 For pull up type is normal, it don't need add RSEL & R1R0 define
164 and resistance value.
165 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
166 set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
167 "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
168 "MTK_PUPD_SET_R1R0_11" define in mt8195.
169 For pull up type is RSEL, it can add RSEL define & resistance
170 value(ohm) to set different resistance by identifying property
171 "mediatek,rsel-resistance-in-si-unit".
172 It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
173 & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
174 & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
175 & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
176 define in mt8195. It can also support resistance value(ohm) "1000"
177 & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000"
178 in mt8195.
179 An example of using RSEL define:
180 pincontroller {
181 i2c0-pins {
182 pins {
183 pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
184 bias-pull-up = <MTK_PULL_SET_RSEL_001>;
185 }
186 };
187 };
188 An example of using si unit resistance value(ohm):
189 &pio {
190 mediatek,rsel-resistance-in-si-unit;
191 }
192 pincontroller {
193 i2c0-pins {
194 pins {
195 pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
196 bias-pull-up = <1000>;
197 }
198 };
199 };
200
201 bias-disable: true
202
203 output-high: true
204
205 output-low: true
206
207 input-enable: true
208
209 input-disable: true
210
211 input-schmitt-enable: true
212
213 input-schmitt-disable: true
214
215 required:
216 - pinmux
217
218allOf:
219 - $ref: pinctrl.yaml#
220
221required:
222 - compatible
223 - reg
224 - interrupts
225 - interrupt-controller
226 - '#interrupt-cells'
227 - gpio-controller
228 - '#gpio-cells'
229 - gpio-ranges
230
231additionalProperties: false
232
233examples:
234 - |
235 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
236 #include <dt-bindings/interrupt-controller/arm-gic.h>
237 #
238 pio: pinctrl@10005000 {
239 compatible = "mediatek,mt8195-pinctrl";
240 reg = <0x10005000 0x1000>,
241 <0x11d10000 0x1000>,
242 <0x11d30000 0x1000>,
243 <0x11d40000 0x1000>,
244 <0x11e20000 0x1000>,
245 <0x11eb0000 0x1000>,
246 <0x11f40000 0x1000>,
247 <0x1000b000 0x1000>;
248 reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",
249 "iocfg_br", "iocfg_lm", "iocfg_rb",
250 "iocfg_tl", "eint";
251 gpio-controller;
252 #gpio-cells = <2>;
253 gpio-ranges = <&pio 0 0 144>;
254 interrupt-controller;
255 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>;
256 #interrupt-cells = <2>;
257
258 pio-pins {
259 pins {
260 pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
261 output-low;
262 };
263 };
264
265 spi0-pins {
266 pins-spi {
267 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
268 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
269 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
270 bias-disable;
271 };
272 pins-spi-mi {
273 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
274 bias-pull-down;
275 };
276 };
277
278 i2c0-pins {
279 pins {
280 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
281 <PINMUX_GPIO9__FUNC_SCL0>;
282 bias-disable;
283 drive-strength-microamp = <1000>;
284 };
285 };
286 };