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Tom Rini53633a82024-02-29 12:33:36 -05001* Freescale i.MX6 SLL IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6sll-iomuxc"
8- fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
10 input_val> are specified using a PIN_FUNC_ID macro, which can be found in
11 imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6SLL
13 Reference Manual for detailed CONFIG settings.
14
15CONFIG bits definition:
16PAD_CTL_LVE (1 << 22)
17PAD_CTL_HYS (1 << 16)
18PAD_CTL_PUS_100K_DOWN (0 << 14)
19PAD_CTL_PUS_47K_UP (1 << 14)
20PAD_CTL_PUS_100K_UP (2 << 14)
21PAD_CTL_PUS_22K_UP (3 << 14)
22PAD_CTL_PUE (1 << 13)
23PAD_CTL_PKE (1 << 12)
24PAD_CTL_ODE (1 << 11)
25PAD_CTL_SPEED_LOW (0 << 6)
26PAD_CTL_SPEED_MED (1 << 6)
27PAD_CTL_SPEED_HIGH (3 << 6)
28PAD_CTL_DSE_DISABLE (0 << 3)
29PAD_CTL_DSE_260ohm (1 << 3)
30PAD_CTL_DSE_130ohm (2 << 3)
31PAD_CTL_DSE_87ohm (3 << 3)
32PAD_CTL_DSE_65ohm (4 << 3)
33PAD_CTL_DSE_52ohm (5 << 3)
34PAD_CTL_DSE_43ohm (6 << 3)
35PAD_CTL_DSE_37ohm (7 << 3)
36PAD_CTL_SRE_FAST (1 << 0)
37PAD_CTL_SRE_SLOW (0 << 0)
38
39Refer to imx6sll-pinfunc.h in device tree source folder for all available
40imx6sll PIN_FUNC_ID.