| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Ingenic SoCs NAND controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Paul Cercueil <paul@crapouillou.net> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: nand-controller.yaml# |
| 14 | - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml# |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - ingenic,jz4740-nand |
| 20 | - ingenic,jz4725b-nand |
| 21 | - ingenic,jz4780-nand |
| 22 | |
| 23 | reg: |
| 24 | items: |
| 25 | - description: Bank number, offset and size of first attached NAND chip |
| 26 | - description: Bank number, offset and size of second attached NAND chip |
| 27 | - description: Bank number, offset and size of third attached NAND chip |
| 28 | - description: Bank number, offset and size of fourth attached NAND chip |
| 29 | minItems: 1 |
| 30 | |
| 31 | ecc-engine: true |
| 32 | |
| 33 | partitions: |
| 34 | type: object |
| 35 | deprecated: true |
| 36 | description: |
| 37 | Node containing description of fixed partitions. |
| 38 | |
| 39 | patternProperties: |
| 40 | "^nand@[a-f0-9]$": |
| 41 | type: object |
| 42 | $ref: raw-nand-chip.yaml |
| 43 | properties: |
| 44 | |
| 45 | rb-gpios: |
| 46 | description: GPIO specifier for the busy pin. |
| 47 | maxItems: 1 |
| 48 | |
| 49 | wp-gpios: |
| 50 | description: GPIO specifier for the write-protect pin. |
| 51 | maxItems: 1 |
| 52 | |
| 53 | unevaluatedProperties: false |
| 54 | |
| 55 | required: |
| 56 | - compatible |
| 57 | - reg |
| 58 | |
| 59 | unevaluatedProperties: false |
| 60 | |
| 61 | examples: |
| 62 | - | |
| 63 | #include <dt-bindings/clock/ingenic,jz4780-cgu.h> |
| 64 | memory-controller@13410000 { |
| 65 | compatible = "ingenic,jz4780-nemc"; |
| 66 | reg = <0x13410000 0x10000>; |
| 67 | #address-cells = <2>; |
| 68 | #size-cells = <1>; |
| 69 | ranges = <1 0 0x1b000000 0x1000000>, |
| 70 | <2 0 0x1a000000 0x1000000>, |
| 71 | <3 0 0x19000000 0x1000000>, |
| 72 | <4 0 0x18000000 0x1000000>, |
| 73 | <5 0 0x17000000 0x1000000>, |
| 74 | <6 0 0x16000000 0x1000000>; |
| 75 | |
| 76 | clocks = <&cgu JZ4780_CLK_NEMC>; |
| 77 | |
| 78 | nand-controller@1 { |
| 79 | compatible = "ingenic,jz4780-nand"; |
| 80 | reg = <1 0 0x1000000>; |
| 81 | |
| 82 | #address-cells = <1>; |
| 83 | #size-cells = <0>; |
| 84 | |
| 85 | ecc-engine = <&bch>; |
| 86 | |
| 87 | ingenic,nemc-tAS = <10>; |
| 88 | ingenic,nemc-tAH = <5>; |
| 89 | ingenic,nemc-tBP = <10>; |
| 90 | ingenic,nemc-tAW = <15>; |
| 91 | ingenic,nemc-tSTRV = <100>; |
| 92 | |
| 93 | pinctrl-names = "default"; |
| 94 | pinctrl-0 = <&pins_nemc>; |
| 95 | |
| 96 | nand@1 { |
| 97 | reg = <1>; |
| 98 | |
| 99 | nand-ecc-step-size = <1024>; |
| 100 | nand-ecc-strength = <24>; |
| 101 | nand-ecc-mode = "hw"; |
| 102 | nand-on-flash-bbt; |
| 103 | |
| 104 | pinctrl-names = "default"; |
| 105 | pinctrl-0 = <&pins_nemc_cs1>; |
| 106 | |
| 107 | partitions { |
| 108 | compatible = "fixed-partitions"; |
| 109 | #address-cells = <2>; |
| 110 | #size-cells = <2>; |
| 111 | |
| 112 | partition@0 { |
| 113 | label = "u-boot-spl"; |
| 114 | reg = <0x0 0x0 0x0 0x800000>; |
| 115 | }; |
| 116 | |
| 117 | partition@800000 { |
| 118 | label = "u-boot"; |
| 119 | reg = <0x0 0x800000 0x0 0x200000>; |
| 120 | }; |
| 121 | |
| 122 | partition@a00000 { |
| 123 | label = "u-boot-env"; |
| 124 | reg = <0x0 0xa00000 0x0 0x200000>; |
| 125 | }; |
| 126 | |
| 127 | partition@c00000 { |
| 128 | label = "boot"; |
| 129 | reg = <0x0 0xc00000 0x0 0x4000000>; |
| 130 | }; |
| 131 | |
| 132 | partition@4c00000 { |
| 133 | label = "system"; |
| 134 | reg = <0x0 0x4c00000 0x1 0xfb400000>; |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | }; |
| 139 | }; |