blob: b8de69da06c59b6c3a05fe874586e286192a068e [file] [log] [blame]
Dave Gerlach3dc33f12021-04-23 11:27:42 -05001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Board specific initialization for AM642 EVM
4 *
Dave Gerlach10498d12022-03-17 12:03:44 -05005 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
Dave Gerlach3dc33f12021-04-23 11:27:42 -05006 * Keerthy <j-keerthy@ti.com>
7 *
8 */
9
Dave Gerlach3dc33f12021-04-23 11:27:42 -050010#include <asm/io.h>
Dave Gerlach10498d12022-03-17 12:03:44 -050011#include <dm/uclass.h>
12#include <k3-ddrss.h>
Dave Gerlach3dc33f12021-04-23 11:27:42 -050013#include <spl.h>
Aswath Govindrajue910fac2021-08-04 18:42:44 +053014#include <fdt_support.h>
Lokesh Vutla01032a42021-05-06 16:44:49 +053015#include <asm/arch/hardware.h>
Lokesh Vutla01032a42021-05-06 16:44:49 +053016#include <env.h>
17
18#include "../common/board_detect.h"
Nishanth Menon0822cd62024-02-12 13:47:20 -060019#include "../common/fdt_ops.h"
Lokesh Vutla01032a42021-05-06 16:44:49 +053020
Roger Quadros70b26c92023-08-05 11:14:37 +030021#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") || \
Roger Quadros81ed4c82024-01-08 15:16:50 +020022 board_ti_k3_is("AM64-EVM") || \
Roger Quadros70b26c92023-08-05 11:14:37 +030023 board_ti_k3_is("AM64-HSEVM"))
Judith Mendezde35c3a2023-04-06 11:49:01 +053024
25#define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") || \
26 board_ti_k3_is("AM64B-SKEVM"))
Dave Gerlach3dc33f12021-04-23 11:27:42 -050027
28DECLARE_GLOBAL_DATA_PTR;
29
30int board_init(void)
31{
32 return 0;
33}
34
35int dram_init(void)
36{
Dave Gerlach88107fe2022-03-17 12:03:40 -050037 s32 ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050038
Dave Gerlach88107fe2022-03-17 12:03:40 -050039 ret = fdtdec_setup_mem_size_base();
40 if (ret)
41 printf("Error setting up mem size and base. %d\n", ret);
42
43 return ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050044}
45
46int dram_init_banksize(void)
47{
Dave Gerlach88107fe2022-03-17 12:03:40 -050048 s32 ret;
49
50 ret = fdtdec_setup_memory_banksize();
51 if (ret)
52 printf("Error setting up memory banksize. %d\n", ret);
Dave Gerlach3dc33f12021-04-23 11:27:42 -050053
Dave Gerlach88107fe2022-03-17 12:03:40 -050054 return ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050055}
56
57#if defined(CONFIG_SPL_LOAD_FIT)
58int board_fit_config_name_match(const char *name)
59{
Lokesh Vutla8af2b692021-05-06 16:44:51 +053060 bool eeprom_read = board_ti_was_eeprom_read();
61
62 if (!eeprom_read || board_is_am64x_gpevm()) {
63 if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
64 return 0;
65 } else if (board_is_am64x_skevm()) {
66 if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
67 return 0;
68 }
Dave Gerlach3dc33f12021-04-23 11:27:42 -050069
70 return -1;
71}
72#endif
Lokesh Vutla01032a42021-05-06 16:44:49 +053073
Dave Gerlach10498d12022-03-17 12:03:44 -050074#if defined(CONFIG_SPL_BUILD)
75#if CONFIG_IS_ENABLED(USB_STORAGE)
Aswath Govindrajue910fac2021-08-04 18:42:44 +053076static int fixup_usb_boot(const void *fdt_blob)
77{
78 int ret = 0;
79
80 switch (spl_boot_device()) {
81 case BOOT_DEVICE_USB:
82 /*
83 * If the boot mode is host, fixup the dr_mode to host
84 * before cdns3 bind takes place
85 */
86 ret = fdt_find_and_setprop((void *)fdt_blob,
87 "/bus@f4000/cdns-usb@f900000/usb@f400000",
88 "dr_mode", "host", 5, 0);
89 if (ret)
90 printf("%s: fdt_find_and_setprop() failed:%d\n",
91 __func__, ret);
92 fallthrough;
93 default:
94 break;
95 }
96
97 return ret;
98}
Dave Gerlach10498d12022-03-17 12:03:44 -050099#endif
100
101#if defined(CONFIG_K3_AM64_DDRSS)
102static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
103{
104 struct udevice *dev;
105 int ret;
106
107 dram_init_banksize();
108
109 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
110 if (ret)
111 panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
112
113 ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
114 if (ret)
115 printf("Error fixing up ddr node for ECC use! %d\n", ret);
116}
117#else
118static void fixup_memory_node(struct spl_image_info *spl_image)
119{
120 u64 start[CONFIG_NR_DRAM_BANKS];
121 u64 size[CONFIG_NR_DRAM_BANKS];
122 int bank;
123 int ret;
124
125 dram_init();
126 dram_init_banksize();
127
128 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
129 start[bank] = gd->bd->bi_dram[bank].start;
130 size[bank] = gd->bd->bi_dram[bank].size;
131 }
132
133 /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
134 ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
135 if (ret)
136 printf("Error fixing up memory node! %d\n", ret);
137}
138#endif
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530139
140void spl_perform_fixups(struct spl_image_info *spl_image)
141{
Dave Gerlach10498d12022-03-17 12:03:44 -0500142#if defined(CONFIG_K3_AM64_DDRSS)
143 fixup_ddr_driver_for_ecc(spl_image);
144#else
145 fixup_memory_node(spl_image);
146#endif
147
148#if CONFIG_IS_ENABLED(USB_STORAGE)
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530149 fixup_usb_boot(spl_image->fdt_addr);
Dave Gerlach10498d12022-03-17 12:03:44 -0500150#endif
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530151}
152#endif
153
Lokesh Vutla01032a42021-05-06 16:44:49 +0530154#ifdef CONFIG_TI_I2C_BOARD_DETECT
155int do_board_detect(void)
156{
157 int ret;
158
159 ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
160 CONFIG_EEPROM_CHIP_ADDRESS);
161 if (ret) {
162 printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
163 CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
164 ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
165 CONFIG_EEPROM_CHIP_ADDRESS + 1);
166 if (ret)
167 pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
168 CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
169 }
170
171 return ret;
172}
173
174int checkboard(void)
175{
176 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
177
178 if (!do_board_detect())
179 printf("Board: %s rev %s\n", ep->name, ep->version);
180
181 return 0;
182}
183
184#ifdef CONFIG_BOARD_LATE_INIT
Nishanth Menon0822cd62024-02-12 13:47:20 -0600185static struct ti_fdt_map ti_am64_evm_fdt_map[] = {
186 {"am64x_gpevm", "k3-am642-evm.dtb"},
187 {"am64x_skevm", "k3-am642-sk.dtb"},
188 { /* Sentinel. */ }
189};
190
Lokesh Vutla01032a42021-05-06 16:44:49 +0530191static void setup_board_eeprom_env(void)
192{
193 char *name = "am64x_gpevm";
194
195 if (do_board_detect())
196 goto invalid_eeprom;
197
198 if (board_is_am64x_gpevm())
199 name = "am64x_gpevm";
200 else if (board_is_am64x_skevm())
201 name = "am64x_skevm";
202 else
203 printf("Unidentified board claims %s in eeprom header\n",
204 board_ti_get_name());
205
206invalid_eeprom:
207 set_board_info_env_am6(name);
Nishanth Menon0822cd62024-02-12 13:47:20 -0600208 ti_set_fdt_env(name, ti_am64_evm_fdt_map);
Lokesh Vutla01032a42021-05-06 16:44:49 +0530209}
210
211static void setup_serial(void)
212{
213 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
214 unsigned long board_serial;
215 char *endp;
216 char serial_string[17] = { 0 };
217
218 if (env_get("serial#"))
219 return;
220
Simon Glass3ff49ec2021-07-24 09:03:29 -0600221 board_serial = hextoul(ep->serial, &endp);
Lokesh Vutla01032a42021-05-06 16:44:49 +0530222 if (*endp != '\0') {
223 pr_err("Error: Can't set serial# to %s\n", ep->serial);
224 return;
225 }
226
227 snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
228 env_set("serial#", serial_string);
229}
230#endif
231#endif
232
233#ifdef CONFIG_BOARD_LATE_INIT
234int board_late_init(void)
235{
236 if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
Vignesh Raghavendra3349e212021-05-10 23:44:22 +0530237 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
238
Lokesh Vutla01032a42021-05-06 16:44:49 +0530239 setup_board_eeprom_env();
240 setup_serial();
Vignesh Raghavendra3349e212021-05-10 23:44:22 +0530241 /*
242 * The first MAC address for ethernet a.k.a. ethernet0 comes from
243 * efuse populated via the am654 gigabit eth switch subsystem driver.
244 * All the other ones are populated via EEPROM, hence continue with
245 * an index of 1.
246 */
247 board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
Lokesh Vutla01032a42021-05-06 16:44:49 +0530248 }
249
250 return 0;
251}
252#endif
Aswath Govindrajucb962f92021-06-04 22:00:34 +0530253
254#define CTRLMMR_USB0_PHY_CTRL 0x43004008
255#define CORE_VOLTAGE 0x80000000
256
257#ifdef CONFIG_SPL_BOARD_INIT
258void spl_board_init(void)
259{
260 u32 val;
261 /* Set USB PHY core voltage to 0.85V */
262 val = readl(CTRLMMR_USB0_PHY_CTRL);
263 val &= ~(CORE_VOLTAGE);
264 writel(val, CTRLMMR_USB0_PHY_CTRL);
Vignesh Raghavendradfcda512021-12-24 12:55:31 +0530265
266 /* Init DRAM size for R5/A53 SPL */
267 dram_init_banksize();
Aswath Govindrajucb962f92021-06-04 22:00:34 +0530268}
269#endif