Andy Fleming | 71706df | 2007-04-23 02:54:25 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007 Freescale Semiconductor. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | #include "bcsr.h" |
| 25 | |
| 26 | void enable_8568mds_duart() |
| 27 | { |
| 28 | volatile uint* duart_mux = (uint *)(CFG_CCSRBAR + 0xe0060); |
| 29 | volatile uint* devices = (uint *)(CFG_CCSRBAR + 0xe0070); |
| 30 | volatile u8 *bcsr = (u8 *)(CFG_BCSR); |
| 31 | |
| 32 | *duart_mux = 0x80000000; /* Set the mux to Duart on PMUXCR */ |
| 33 | *devices = 0; /* Enable all peripheral devices */ |
| 34 | bcsr[5] |= 0x01; /* Enable Duart in BCSR*/ |
| 35 | } |
| 36 | |
| 37 | void enable_8568mds_flash_write() |
| 38 | { |
| 39 | volatile u8 *bcsr = (u8 *)(CFG_BCSR); |
| 40 | |
| 41 | bcsr[9] |= 0x01; |
| 42 | } |
| 43 | |
| 44 | void disable_8568mds_flash_write() |
| 45 | { |
| 46 | volatile u8 *bcsr = (u8 *)(CFG_BCSR); |
| 47 | |
| 48 | bcsr[9] &= ~(0x01); |
| 49 | } |
Andy Fleming | ee0e917 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 50 | |
| 51 | void enable_8568mds_qe_mdio() |
| 52 | { |
| 53 | u8 *bcsr = (u8 *)(CFG_BCSR); |
| 54 | |
| 55 | bcsr[7] |= 0x01; |
| 56 | } |