Horatiu Vultur | 5037502 | 2019-01-23 16:39:41 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | /* |
| 3 | * Microsemi SoCs pinctrl driver |
| 4 | * |
| 5 | * Author: <horatiu.vultur@microchip.com> |
| 6 | * Copyright (c) 2019 Microsemi Corporation |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <config.h> |
| 11 | #include <dm.h> |
| 12 | #include <dm/device-internal.h> |
| 13 | #include <dm/lists.h> |
| 14 | #include <dm/pinctrl.h> |
| 15 | #include <dm/root.h> |
| 16 | #include <errno.h> |
| 17 | #include <fdtdec.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <asm/gpio.h> |
| 20 | #include <asm/system.h> |
| 21 | #include "mscc-common.h" |
| 22 | |
| 23 | enum { |
| 24 | FUNC_NONE, |
| 25 | FUNC_GPIO, |
| 26 | FUNC_IRQ0, |
| 27 | FUNC_IRQ1, |
| 28 | FUNC_MIIM1, |
| 29 | FUNC_PCI_WAKE, |
| 30 | FUNC_PTP0, |
| 31 | FUNC_PTP1, |
| 32 | FUNC_PTP2, |
| 33 | FUNC_PTP3, |
| 34 | FUNC_PWM, |
| 35 | FUNC_RECO_CLK0, |
| 36 | FUNC_RECO_CLK1, |
| 37 | FUNC_SFP0, |
| 38 | FUNC_SFP1, |
| 39 | FUNC_SFP2, |
| 40 | FUNC_SFP3, |
| 41 | FUNC_SFP4, |
| 42 | FUNC_SFP5, |
| 43 | FUNC_SFP6, |
| 44 | FUNC_SFP7, |
| 45 | FUNC_SFP8, |
| 46 | FUNC_SFP9, |
| 47 | FUNC_SFP10, |
| 48 | FUNC_SIO, |
| 49 | FUNC_SI, |
| 50 | FUNC_TACHO, |
| 51 | FUNC_TWI, |
| 52 | FUNC_TWI_SCL_M, |
| 53 | FUNC_UART, |
| 54 | FUNC_UART2, |
| 55 | FUNC_MD, |
| 56 | FUNC_PTP1588, |
| 57 | FUNC_MAX |
| 58 | }; |
| 59 | |
| 60 | static char * const serval_function_names[] = { |
| 61 | [FUNC_NONE] = "none", |
| 62 | [FUNC_GPIO] = "gpio", |
| 63 | [FUNC_IRQ0] = "irq0", |
| 64 | [FUNC_IRQ1] = "irq1", |
| 65 | [FUNC_MIIM1] = "miim1", |
| 66 | [FUNC_PCI_WAKE] = "pci_wake", |
| 67 | [FUNC_PTP0] = "ptp0", |
| 68 | [FUNC_PTP1] = "ptp1", |
| 69 | [FUNC_PTP2] = "ptp2", |
| 70 | [FUNC_PTP3] = "ptp3", |
| 71 | [FUNC_PWM] = "pwm", |
| 72 | [FUNC_RECO_CLK0] = "reco_clk0", |
| 73 | [FUNC_RECO_CLK1] = "reco_clk1", |
| 74 | [FUNC_SFP0] = "sfp0", |
| 75 | [FUNC_SFP1] = "sfp1", |
| 76 | [FUNC_SFP2] = "sfp2", |
| 77 | [FUNC_SFP3] = "sfp3", |
| 78 | [FUNC_SFP4] = "sfp4", |
| 79 | [FUNC_SFP5] = "sfp5", |
| 80 | [FUNC_SFP6] = "sfp6", |
| 81 | [FUNC_SFP7] = "sfp7", |
| 82 | [FUNC_SFP8] = "sfp8", |
| 83 | [FUNC_SFP9] = "sfp9", |
| 84 | [FUNC_SFP10] = "sfp10", |
| 85 | [FUNC_SIO] = "sio", |
| 86 | [FUNC_SI] = "si", |
| 87 | [FUNC_TACHO] = "tacho", |
| 88 | [FUNC_TWI] = "twi", |
| 89 | [FUNC_TWI_SCL_M] = "twi_scl_m", |
| 90 | [FUNC_UART] = "uart", |
| 91 | [FUNC_UART2] = "uart2", |
| 92 | [FUNC_MD] = "md", |
| 93 | [FUNC_PTP1588] = "1588", |
| 94 | }; |
| 95 | |
| 96 | MSCC_P(0, SIO, NONE, NONE); |
| 97 | MSCC_P(1, SIO, NONE, NONE); |
| 98 | MSCC_P(2, SIO, NONE, NONE); |
| 99 | MSCC_P(3, SIO, NONE, NONE); |
| 100 | MSCC_P(4, TACHO, NONE, NONE); |
| 101 | MSCC_P(5, PWM, NONE, NONE); |
| 102 | MSCC_P(6, TWI, NONE, NONE); |
| 103 | MSCC_P(7, TWI, NONE, NONE); |
| 104 | MSCC_P(8, SI, NONE, NONE); |
| 105 | MSCC_P(9, SI, MD, NONE); |
| 106 | MSCC_P(10, SI, MD, NONE); |
| 107 | MSCC_P(11, SFP0, MD, TWI_SCL_M); |
| 108 | MSCC_P(12, SFP1, MD, TWI_SCL_M); |
| 109 | MSCC_P(13, SFP2, UART2, TWI_SCL_M); |
| 110 | MSCC_P(14, SFP3, UART2, TWI_SCL_M); |
| 111 | MSCC_P(15, SFP4, PTP1588, TWI_SCL_M); |
| 112 | MSCC_P(16, SFP5, PTP1588, TWI_SCL_M); |
| 113 | MSCC_P(17, SFP6, PCI_WAKE, TWI_SCL_M); |
| 114 | MSCC_P(18, SFP7, NONE, TWI_SCL_M); |
| 115 | MSCC_P(19, SFP8, NONE, TWI_SCL_M); |
| 116 | MSCC_P(20, SFP9, NONE, TWI_SCL_M); |
| 117 | MSCC_P(21, SFP10, NONE, TWI_SCL_M); |
| 118 | MSCC_P(22, NONE, NONE, NONE); |
| 119 | MSCC_P(23, NONE, NONE, NONE); |
| 120 | MSCC_P(24, NONE, NONE, NONE); |
| 121 | MSCC_P(25, NONE, NONE, NONE); |
| 122 | MSCC_P(26, UART, NONE, NONE); |
| 123 | MSCC_P(27, UART, NONE, NONE); |
| 124 | MSCC_P(28, IRQ0, NONE, NONE); |
| 125 | MSCC_P(29, IRQ1, NONE, NONE); |
| 126 | MSCC_P(30, PTP1588, NONE, NONE); |
| 127 | MSCC_P(31, PTP1588, NONE, NONE); |
| 128 | |
| 129 | #define SERVAL_PIN(n) { \ |
| 130 | .name = "GPIO_"#n, \ |
| 131 | .drv_data = &mscc_pin_##n \ |
| 132 | } |
| 133 | |
| 134 | static const struct mscc_pin_data serval_pins[] = { |
| 135 | SERVAL_PIN(0), |
| 136 | SERVAL_PIN(1), |
| 137 | SERVAL_PIN(2), |
| 138 | SERVAL_PIN(3), |
| 139 | SERVAL_PIN(4), |
| 140 | SERVAL_PIN(5), |
| 141 | SERVAL_PIN(6), |
| 142 | SERVAL_PIN(7), |
| 143 | SERVAL_PIN(8), |
| 144 | SERVAL_PIN(9), |
| 145 | SERVAL_PIN(10), |
| 146 | SERVAL_PIN(11), |
| 147 | SERVAL_PIN(12), |
| 148 | SERVAL_PIN(13), |
| 149 | SERVAL_PIN(14), |
| 150 | SERVAL_PIN(15), |
| 151 | SERVAL_PIN(16), |
| 152 | SERVAL_PIN(17), |
| 153 | SERVAL_PIN(18), |
| 154 | SERVAL_PIN(19), |
| 155 | SERVAL_PIN(20), |
| 156 | SERVAL_PIN(21), |
| 157 | SERVAL_PIN(22), |
| 158 | SERVAL_PIN(23), |
| 159 | SERVAL_PIN(24), |
| 160 | SERVAL_PIN(25), |
| 161 | SERVAL_PIN(26), |
| 162 | SERVAL_PIN(27), |
| 163 | SERVAL_PIN(28), |
| 164 | SERVAL_PIN(29), |
| 165 | SERVAL_PIN(30), |
| 166 | SERVAL_PIN(31), |
| 167 | }; |
| 168 | |
| 169 | static const unsigned long serval_gpios[] = { |
| 170 | [MSCC_GPIO_OUT_SET] = 0x00, |
| 171 | [MSCC_GPIO_OUT_CLR] = 0x04, |
| 172 | [MSCC_GPIO_OUT] = 0x08, |
| 173 | [MSCC_GPIO_IN] = 0x0c, |
| 174 | [MSCC_GPIO_OE] = 0x10, |
| 175 | [MSCC_GPIO_INTR] = 0x14, |
| 176 | [MSCC_GPIO_INTR_ENA] = 0x18, |
| 177 | [MSCC_GPIO_INTR_IDENT] = 0x1c, |
| 178 | [MSCC_GPIO_ALT0] = 0x20, |
| 179 | [MSCC_GPIO_ALT1] = 0x24, |
| 180 | }; |
| 181 | |
| 182 | static int serval_gpio_probe(struct udevice *dev) |
| 183 | { |
| 184 | struct gpio_dev_priv *uc_priv; |
| 185 | |
| 186 | uc_priv = dev_get_uclass_priv(dev); |
| 187 | uc_priv->bank_name = "serval-gpio"; |
| 188 | uc_priv->gpio_count = ARRAY_SIZE(serval_pins); |
| 189 | |
| 190 | return 0; |
| 191 | } |
| 192 | |
| 193 | static struct driver serval_gpio_driver = { |
| 194 | .name = "serval-gpio", |
| 195 | .id = UCLASS_GPIO, |
| 196 | .probe = serval_gpio_probe, |
| 197 | .ops = &mscc_gpio_ops, |
| 198 | }; |
| 199 | |
| 200 | static int serval_pinctrl_probe(struct udevice *dev) |
| 201 | { |
| 202 | int ret; |
| 203 | |
| 204 | ret = mscc_pinctrl_probe(dev, FUNC_MAX, serval_pins, |
| 205 | ARRAY_SIZE(serval_pins), |
| 206 | serval_function_names, |
| 207 | serval_gpios); |
| 208 | |
| 209 | if (ret) |
| 210 | return ret; |
| 211 | |
| 212 | ret = device_bind(dev, &serval_gpio_driver, "serval-gpio", NULL, |
| 213 | dev_of_offset(dev), NULL); |
| 214 | |
| 215 | if (ret) |
| 216 | return ret; |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | static const struct udevice_id serval_pinctrl_of_match[] = { |
| 222 | { .compatible = "mscc,serval-pinctrl" }, |
| 223 | {}, |
| 224 | }; |
| 225 | |
| 226 | U_BOOT_DRIVER(serval_pinctrl) = { |
| 227 | .name = "serval-pinctrl", |
| 228 | .id = UCLASS_PINCTRL, |
| 229 | .of_match = of_match_ptr(serval_pinctrl_of_match), |
| 230 | .probe = serval_pinctrl_probe, |
| 231 | .priv_auto_alloc_size = sizeof(struct mscc_pinctrl), |
| 232 | .ops = &mscc_pinctrl_ops, |
| 233 | }; |