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git01.mediatek.com / filogic / uboot / 5dcc00e948846b099a8c530c10c3f509262892e9 / . / configs / phycore-rk3288_defconfig
blob: d33f079dac288864ff75b8932972f93517e6da8d [file] [log] [blame]
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00000000
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]4CONFIG_ROCKCHIP_RK3288=y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200[diff] [blame]5CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]6CONFIG_TARGET_PHYCORE_RK3288=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]7CONFIG_SPL_STACK_R_ADDR=0x80000
Tom Rinifdc7e362019-11-11 20:04:24 -0500[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_DEBUG_UART_BASE=0xff690000
10CONFIG_DEBUG_UART_CLOCK=24000000
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]11CONFIG_DEBUG_UART=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0xff704000
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]13# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]14CONFIG_USE_PREBOOT=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]15CONFIG_SILENT_CONSOLE=y
16CONFIG_CONSOLE_MUX=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]17CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]18# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]19CONFIG_DISPLAY_BOARDINFO_LATE=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]20CONFIG_SPL_STACK_R=y
21CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
22CONFIG_SPL_I2C_SUPPORT=y
23CONFIG_SPL_POWER_SUPPORT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]24CONFIG_CMD_GPIO=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]25CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]26CONFIG_CMD_I2C=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]27CONFIG_CMD_MMC=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]28CONFIG_CMD_SPI=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]29CONFIG_CMD_USB=y
Urja Rannikko17dd9d32019-05-13 13:51:04 +0000[diff] [blame]30CONFIG_CMD_USB_MASS_STORAGE=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]31# CONFIG_CMD_SETEXPR is not set
32CONFIG_CMD_CACHE=y
33CONFIG_CMD_TIME=y
34CONFIG_CMD_PMIC=y
35CONFIG_CMD_REGULATOR=y
36# CONFIG_SPL_DOS_PARTITION is not set
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]37# CONFIG_SPL_EFI_PARTITION is not set
38CONFIG_SPL_PARTITION_UUIDS=y
39CONFIG_SPL_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]40CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]41CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]42CONFIG_ENV_IS_IN_MMC=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]43CONFIG_REGMAP=y
44CONFIG_SPL_REGMAP=y
45CONFIG_SYSCON=y
46CONFIG_SPL_SYSCON=y
47# CONFIG_SPL_SIMPLE_BUS is not set
48CONFIG_CLK=y
49CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]50CONFIG_FASTBOOT_FLASH=y
51CONFIG_FASTBOOT_FLASH_MMC_DEV=0
52CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]53CONFIG_ROCKCHIP_GPIO=y
54CONFIG_SYS_I2C_ROCKCHIP=y
Wadim Egorovdec8af42017-08-21 10:59:00 +0200[diff] [blame]55CONFIG_MISC=y
56CONFIG_I2C_EEPROM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]57CONFIG_MMC_DW=y
58CONFIG_MMC_DW_ROCKCHIP=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]59CONFIG_SF_DEFAULT_SPEED=20000000
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]60CONFIG_DM_ETH=y
61CONFIG_ETH_DESIGNWARE=y
62CONFIG_GMAC_ROCKCHIP=y
63CONFIG_PINCTRL=y
64CONFIG_SPL_PINCTRL=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]65CONFIG_DM_PMIC=y
66CONFIG_PMIC_RK8XX=y
67CONFIG_DM_REGULATOR_FIXED=y
68CONFIG_REGULATOR_RK8XX=y
69CONFIG_PWM_ROCKCHIP=y
70CONFIG_RAM=y
71CONFIG_SPL_RAM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]72CONFIG_DEBUG_UART_SHIFT=2
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]73CONFIG_SYSRESET=y
74CONFIG_USB=y
Eddie Caib3501fe2017-12-15 08:17:13 +0800[diff] [blame]75CONFIG_USB_DWC2=y
Tom Rini6c3798f2018-02-10 20:27:45 -0500[diff] [blame]76CONFIG_ROCKCHIP_USB2_PHY=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]77CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]78CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
79CONFIG_USB_GADGET_VENDOR_NUM=0x2207
80CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]81CONFIG_USB_GADGET_DWC2_OTG=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]82CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]83CONFIG_USB_ETHER_ASIX=y
84CONFIG_USB_ETHER_SMSC95XX=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]85CONFIG_CMD_DHRYSTONE=y
86CONFIG_ERRNO_STR=y