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Akash Gajjara01866a2023-02-14 20:48:40 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2023 Akash Gajjar <gajjar04akash@gmail.com>
5 */
6
7#include "rk356x-u-boot.dtsi"
8
Jonas Karlman1e1bc892023-07-22 13:30:23 +00009&pcie3x2 {
Jonas Karlmandd7ee8a2023-07-31 04:28:34 +000010 pinctrl-0 = <&pcie3x2_reset_h>;
Jonas Karlman1e1bc892023-07-22 13:30:23 +000011};
12
Jonas Karlmanac46dc72023-05-17 18:26:34 +000013&pinctrl {
Jonas Karlman1e1bc892023-07-22 13:30:23 +000014 pcie {
15 pcie3x2_reset_h: pcie3x2-reset-h {
16 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
17 };
18 };
Jonas Karlmanac46dc72023-05-17 18:26:34 +000019};
20
Jonas Karlman2cc03212023-04-18 16:46:38 +000021&sdhci {
22 cap-mmc-highspeed;
Jonas Karlman2cc03212023-04-18 16:46:38 +000023 mmc-hs200-1_8v;
24 mmc-hs400-1_8v;
25 mmc-hs400-enhanced-strobe;
26};
27
Jonas Karlmana9d8d532023-05-17 18:26:35 +000028&sfc {
29 bootph-pre-ram;
30 u-boot,spl-sfc-no-dma;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 status = "okay";
34
35 flash@0 {
36 bootph-pre-ram;
37 compatible = "jedec,spi-nor";
38 reg = <0>;
39 spi-max-frequency = <24000000>;
40 spi-rx-bus-width = <4>;
41 spi-tx-bus-width = <1>;
42 };
43};