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git01.mediatek.com / filogic / uboot / 5da7f2f362387f9598f8e57f507a16b50afdbdc0 / . / examples / Makefile
blob: 945b74570040ce0b95872db48fa9edc03b30fbd8 [file] [log] [blame]
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]1#
2# (C) Copyright 2000
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
5# See file CREDITS for list of people who contributed to this
6# project.
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public License as
10# published by the Free Software Foundation; either version 2 of
11# the License, or (at your option) any later version.
12#
13# This program is distributed in the hope that it will be useful,
14# but WITHOUT ANY WARRANTY; without even the implied warranty of
15# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16# GNU General Public License for more details.
17#
18# You should have received a copy of the GNU General Public License
19# along with this program; if not, write to the Free Software
20# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21# MA 02111-1307 USA
22#
23
wdenk874ac262003-07-24 23:38:38 +0000[diff] [blame]24ifeq ($(ARCH),ppc)
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]25LOAD_ADDR = 0x40000
wdenk874ac262003-07-24 23:38:38 +0000[diff] [blame]26endif
27
28ifeq ($(ARCH),i386)
29LOAD_ADDR = 0x40000
30endif
31
32ifeq ($(ARCH),arm)
33LOAD_ADDR = 0xc100000
34endif
35
36ifeq ($(ARCH),mips)
37LOAD_ADDR = 0x80200000 -T mips.lds
38endif
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]39
wdenk60164a82003-10-08 23:26:14 +0000[diff] [blame]40ifeq ($(ARCH),nios)
41LOAD_ADDR = 0x01000000 -L $(gcclibdir)/m32 -T nios.lds
42endif
43
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]44include $(TOPDIR)/config.mk
45
46SREC = hello_world.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]47BIN = hello_world.bin hello_world
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]48
wdenkabda5ca2003-05-31 18:35:21 +0000[diff] [blame]49ifeq ($(ARCH),i386)
50SREC += 82559_eeprom.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]51BIN += 82559_eeprom.bin 82559_eeprom
wdenkabda5ca2003-05-31 18:35:21 +0000[diff] [blame]52endif
53
wdenk8dba0502003-03-31 16:34:49 +0000[diff] [blame]54ifeq ($(ARCH),ppc)
55SREC += sched.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]56BIN += sched.bin sched
wdenk8dba0502003-03-31 16:34:49 +0000[diff] [blame]57endif
58
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]59ifeq ($(ARCH),m68k)
60SREC =
61BIN =
62endif
63
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]64# The following example is pretty 8xx specific...
65ifeq ($(CPU),mpc8xx)
66SREC += timer.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]67BIN += timer.bin timer
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]68endif
69
wdenkb02744a2003-04-05 00:53:31 +0000[diff] [blame]70# The following example is 8260 specific...
71ifeq ($(CPU),mpc8260)
72SREC += mem_to_mem_idma2intr.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]73BIN += mem_to_mem_idma2intr.bin mem_to_mem_idma2intr
wdenkb02744a2003-04-05 00:53:31 +0000[diff] [blame]74endif
75
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]76# Utility for resetting i82559 EEPROM
77ifeq ($(BOARD),oxc)
78SREC += eepro100_eeprom.srec
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]79BIN += eepro100_eeprom.bin eepro100_eeprom
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]80endif
81
wdenkbd1575f2003-10-14 19:43:55 +0000[diff] [blame]82ifeq ($(BIG_ENDIAN),y)
83EX_LDFLAGS += -EB
84endif
85
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]86OBJS = $(SREC:.srec=.o)
87
wdenk874ac262003-07-24 23:38:38 +0000[diff] [blame]88LIB = libstubs.a
89LIBAOBJS=
wdenk8dba0502003-03-31 16:34:49 +0000[diff] [blame]90ifeq ($(ARCH),ppc)
91LIBAOBJS+= $(ARCH)_longjmp.o $(ARCH)_setjmp.o
92endif
wdenk874ac262003-07-24 23:38:38 +0000[diff] [blame]93LIBCOBJS= stubs.o
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]94LIBOBJS = $(LIBAOBJS) $(LIBCOBJS)
95
wdenk710e3502003-08-29 20:57:53 +0000[diff] [blame]96gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
97
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]98CPPFLAGS += -I..
99
wdenkc8434db2003-03-26 06:55:25 +0000[diff] [blame]100all: .depend $(LIB) $(SREC) $(BIN)
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]101
102#########################################################################
103$(LIB): .depend $(LIBOBJS)
104 $(AR) crv $@ $(LIBOBJS)
105
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]106%: %.o $(LIB)
wdenkbd1575f2003-10-14 19:43:55 +0000[diff] [blame]107 $(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]108 -o $@ -e $(<:.o=) $< $(LIB) \
wdenk710e3502003-08-29 20:57:53 +0000[diff] [blame]109 -L$(gcclibdir) -lgcc
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]110%.srec: %
111 $(OBJCOPY) -O srec $< $@ 2>/dev/null
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]112
wdenk5da7f2f2004-01-03 00:43:19 +0000[diff] [blame^]113%.bin: %
114 $(OBJCOPY) -O binary $< $@ 2>/dev/null
wdenkc8434db2003-03-26 06:55:25 +0000[diff] [blame]115
wdenk717b5aa2002-04-27 11:09:31 +0000[diff] [blame]116#########################################################################
117
118.depend: Makefile $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S)
119 $(CC) -M $(CFLAGS) $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S) > $@
120
121sinclude .depend
122
123#########################################################################