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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
wdenke6466f62003-06-05 19:27:42 +000024/* #define DEBUG */
25
wdenkc6097192002-11-03 00:24:07 +000026#include <common.h>
27#include <mpc8xx.h>
wdenk7a428cc2003-06-15 22:40:42 +000028#include <environment.h>
wdenkc6097192002-11-03 00:24:07 +000029
30#ifndef CFG_ENV_ADDR
31#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
32#endif
33
34flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
35
36/*-----------------------------------------------------------------------
37 * Functions
38 */
39static ulong flash_get_size (vu_long *addr, flash_info_t *info);
40static int write_word (flash_info_t *info, ulong dest, ulong data);
41
42/*-----------------------------------------------------------------------
43 */
44
45unsigned long flash_init (void)
46{
47 volatile immap_t *immap = (immap_t *)CFG_IMMR;
48 volatile memctl8xx_t *memctl = &immap->im_memctl;
49 unsigned long size_b0, size_b1;
50 int i;
51
52 /* Init: no FLASHes known */
53 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
54 flash_info[i].flash_id = FLASH_UNKNOWN;
55 }
56
57 /* Static FLASH Bank configuration here - FIXME XXX */
58
wdenke6466f62003-06-05 19:27:42 +000059 debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
60
wdenkc6097192002-11-03 00:24:07 +000061 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
62
wdenke6466f62003-06-05 19:27:42 +000063 debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
64
wdenkc6097192002-11-03 00:24:07 +000065 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
66 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
67 size_b0, size_b0<<20);
68 }
69
70 size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
71
wdenke6466f62003-06-05 19:27:42 +000072 debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
73
wdenkc6097192002-11-03 00:24:07 +000074 if (size_b1 > size_b0) {
75 printf ("## ERROR: "
76 "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
77 size_b1, size_b1<<20,
78 size_b0, size_b0<<20
79 );
80 flash_info[0].flash_id = FLASH_UNKNOWN;
81 flash_info[1].flash_id = FLASH_UNKNOWN;
82 flash_info[0].sector_count = -1;
83 flash_info[1].sector_count = -1;
84 flash_info[0].size = 0;
85 flash_info[1].size = 0;
86 return (0);
87 }
88
wdenke6466f62003-06-05 19:27:42 +000089 debug ("## Before remap: "
90 "BR0: 0x%08x OR0: 0x%08x "
91 "BR1: 0x%08x OR1: 0x%08x\n",
92 memctl->memc_br0, memctl->memc_or0,
93 memctl->memc_br1, memctl->memc_or1);
94
wdenkc6097192002-11-03 00:24:07 +000095 /* Remap FLASH according to real size */
96 memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
97 memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
98
wdenke6466f62003-06-05 19:27:42 +000099 debug ("## BR0: 0x%08x OR0: 0x%08x\n",
100 memctl->memc_br0, memctl->memc_or0);
101
wdenkc6097192002-11-03 00:24:07 +0000102 /* Re-do sizing to get full correct info */
103 size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
104
105#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
106 /* monitor protection ON by default */
wdenk7a428cc2003-06-15 22:40:42 +0000107 debug ("Protect monitor: %08lx ... %08lx\n",
108 (ulong)CFG_MONITOR_BASE,
109 (ulong)CFG_MONITOR_BASE + monitor_flash_len - 1);
110
wdenkc6097192002-11-03 00:24:07 +0000111 flash_protect(FLAG_PROTECT_SET,
112 CFG_MONITOR_BASE,
wdenk7a428cc2003-06-15 22:40:42 +0000113 CFG_MONITOR_BASE + monitor_flash_len - 1,
wdenkc6097192002-11-03 00:24:07 +0000114 &flash_info[0]);
115#endif
116
117#ifdef CFG_ENV_IS_IN_FLASH
118 /* ENV protection ON by default */
wdenk7a428cc2003-06-15 22:40:42 +0000119# ifdef CFG_ENV_ADDR_REDUND
wdenk5d841732003-08-17 18:55:18 +0000120 debug ("Protect primary environment: %08lx ... %08lx\n",
121 (ulong)CFG_ENV_ADDR,
122 (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
wdenk7a428cc2003-06-15 22:40:42 +0000123# else
wdenk5d841732003-08-17 18:55:18 +0000124 debug ("Protect environment: %08lx ... %08lx\n",
wdenk7a428cc2003-06-15 22:40:42 +0000125 (ulong)CFG_ENV_ADDR,
126 (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
wdenk5d841732003-08-17 18:55:18 +0000127# endif
wdenk7a428cc2003-06-15 22:40:42 +0000128
wdenkc6097192002-11-03 00:24:07 +0000129 flash_protect(FLAG_PROTECT_SET,
130 CFG_ENV_ADDR,
wdenk7a428cc2003-06-15 22:40:42 +0000131 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
132 &flash_info[0]);
133#endif
134
135#ifdef CFG_ENV_ADDR_REDUND
136 debug ("Protect redundand environment: %08lx ... %08lx\n",
137 (ulong)CFG_ENV_ADDR_REDUND,
138 (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1);
139
140 flash_protect(FLAG_PROTECT_SET,
141 CFG_ENV_ADDR_REDUND,
142 CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
wdenkc6097192002-11-03 00:24:07 +0000143 &flash_info[0]);
144#endif
145
146 if (size_b1) {
147 memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
148 memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
149 BR_MS_GPCM | BR_V;
150
wdenke6466f62003-06-05 19:27:42 +0000151 debug ("## BR1: 0x%08x OR1: 0x%08x\n",
152 memctl->memc_br1, memctl->memc_or1);
153
wdenkc6097192002-11-03 00:24:07 +0000154 /* Re-do sizing to get full correct info */
155 size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
156 &flash_info[1]);
157
158#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
159 /* monitor protection ON by default */
160 flash_protect(FLAG_PROTECT_SET,
161 CFG_MONITOR_BASE,
wdenkb9a83a92003-05-30 12:48:29 +0000162 CFG_MONITOR_BASE+monitor_flash_len-1,
wdenkc6097192002-11-03 00:24:07 +0000163 &flash_info[1]);
164#endif
165
166#ifdef CFG_ENV_IS_IN_FLASH
167 /* ENV protection ON by default */
168 flash_protect(FLAG_PROTECT_SET,
169 CFG_ENV_ADDR,
170 CFG_ENV_ADDR+CFG_ENV_SIZE-1,
171 &flash_info[1]);
172#endif
173 } else {
174 memctl->memc_br1 = 0; /* invalidate bank */
175
176 flash_info[1].flash_id = FLASH_UNKNOWN;
177 flash_info[1].sector_count = -1;
wdenke6466f62003-06-05 19:27:42 +0000178 flash_info[1].size = 0;
179
180 debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
181 memctl->memc_br1, memctl->memc_or1);
wdenkc6097192002-11-03 00:24:07 +0000182 }
183
wdenke6466f62003-06-05 19:27:42 +0000184 debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
185
wdenkc6097192002-11-03 00:24:07 +0000186 flash_info[0].size = size_b0;
187 flash_info[1].size = size_b1;
188
189 return (size_b0 + size_b1);
190}
191
192/*-----------------------------------------------------------------------
193 */
194void flash_print_info (flash_info_t *info)
195{
196 int i;
197
198 if (info->flash_id == FLASH_UNKNOWN) {
199 printf ("missing or unknown FLASH type\n");
200 return;
201 }
202
203 switch (info->flash_id & FLASH_VENDMASK) {
204 case FLASH_MAN_AMD: printf ("AMD "); break;
205 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
206 default: printf ("Unknown Vendor "); break;
207 }
208
209 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk7a428cc2003-06-15 22:40:42 +0000210#ifdef CONFIG_TQM8xxM /* mirror bit flash */
211 case FLASH_AMLV128U: printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
212 break;
wdenk69141282003-07-07 20:07:54 +0000213 case FLASH_AMLV320U: printf ("AM29LV320ML (32Mbit, uniform sector size)\n");
214 break;
215 case FLASH_AMLV640U: printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
216 break;
wdenk7a428cc2003-06-15 22:40:42 +0000217# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000218 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
219 break;
220 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
221 break;
222 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
223 break;
224 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
225 break;
wdenkc6097192002-11-03 00:24:07 +0000226 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
227 break;
228 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
229 break;
wdenk7a428cc2003-06-15 22:40:42 +0000230#endif /* TQM8xxM */
wdenk69141282003-07-07 20:07:54 +0000231 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
232 break;
233 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
234 break;
wdenkc6097192002-11-03 00:24:07 +0000235 default: printf ("Unknown Chip Type\n");
236 break;
237 }
238
239 printf (" Size: %ld MB in %d Sectors\n",
240 info->size >> 20, info->sector_count);
241
242 printf (" Sector Start Addresses:");
243 for (i=0; i<info->sector_count; ++i) {
244 if ((i % 5) == 0)
245 printf ("\n ");
246 printf (" %08lX%s",
247 info->start[i],
248 info->protect[i] ? " (RO)" : " "
249 );
250 }
251 printf ("\n");
252 return;
253}
254
255/*-----------------------------------------------------------------------
256 */
257
258
259/*-----------------------------------------------------------------------
260 */
261
262/*
263 * The following code cannot be run from FLASH!
264 */
265
266static ulong flash_get_size (vu_long *addr, flash_info_t *info)
267{
268 short i;
269 ulong value;
270 ulong base = (ulong)addr;
271
272 /* Write auto select command: read Manufacturer ID */
273 addr[0x0555] = 0x00AA00AA;
274 addr[0x02AA] = 0x00550055;
275 addr[0x0555] = 0x00900090;
276
277 value = addr[0];
278
wdenke6466f62003-06-05 19:27:42 +0000279 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
280
wdenkc6097192002-11-03 00:24:07 +0000281 switch (value) {
282 case AMD_MANUFACT:
283 info->flash_id = FLASH_MAN_AMD;
284 break;
285 case FUJ_MANUFACT:
286 info->flash_id = FLASH_MAN_FUJ;
287 break;
288 default:
289 info->flash_id = FLASH_UNKNOWN;
290 info->sector_count = 0;
291 info->size = 0;
292 return (0); /* no or unknown flash */
293 }
294
295 value = addr[1]; /* device ID */
296
wdenke6466f62003-06-05 19:27:42 +0000297 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
298
wdenkc6097192002-11-03 00:24:07 +0000299 switch (value) {
wdenk7a428cc2003-06-15 22:40:42 +0000300#ifdef CONFIG_TQM8xxM /* mirror bit flash */
301 case AMD_ID_MIRROR:
wdenk69141282003-07-07 20:07:54 +0000302 /* Special case for AMLV320MH/L */
303 if ((addr[14] & 0x00ff00ff) == 0x001d001d &&
304 (addr[15] & 0x00ff00ff) == 0x00000000) {
305 info->flash_id += FLASH_AMLV320U;
306 info->sector_count = 64;
307 info->size = 0x00800000; /* => 8 MB */
308 break;
wdenk21136db2003-07-16 21:53:01 +0000309 }
wdenk7a428cc2003-06-15 22:40:42 +0000310 switch(addr[14]) {
311 case AMD_ID_LV128U_2:
312 if (addr[15] != AMD_ID_LV128U_3) {
313 info->flash_id = FLASH_UNKNOWN;
314 }
315 else {
316 info->flash_id += FLASH_AMLV128U;
317 info->sector_count = 256;
318 info->size = 0x02000000;
319 }
320 break; /* => 32 MB */
wdenk69141282003-07-07 20:07:54 +0000321 case AMD_ID_LV640U_2:
322 if (addr[15] != AMD_ID_LV640U_3) {
323 info->flash_id = FLASH_UNKNOWN;
324 }
325 else {
326 info->flash_id += FLASH_AMLV640U;
327 info->sector_count = 128;
328 info->size = 0x01000000;
329 }
330 break; /* => 16 MB */
wdenk7a428cc2003-06-15 22:40:42 +0000331 default:
332 info->flash_id = FLASH_UNKNOWN;
333 break;
334 }
335 break;
336# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000337 case AMD_ID_LV400T:
338 info->flash_id += FLASH_AM400T;
339 info->sector_count = 11;
340 info->size = 0x00100000;
341 break; /* => 1 MB */
342
343 case AMD_ID_LV400B:
344 info->flash_id += FLASH_AM400B;
345 info->sector_count = 11;
346 info->size = 0x00100000;
347 break; /* => 1 MB */
348
349 case AMD_ID_LV800T:
350 info->flash_id += FLASH_AM800T;
351 info->sector_count = 19;
352 info->size = 0x00200000;
353 break; /* => 2 MB */
354
355 case AMD_ID_LV800B:
356 info->flash_id += FLASH_AM800B;
357 info->sector_count = 19;
358 info->size = 0x00200000;
359 break; /* => 2 MB */
360
wdenkc6097192002-11-03 00:24:07 +0000361 case AMD_ID_LV320T:
362 info->flash_id += FLASH_AM320T;
363 info->sector_count = 71;
364 info->size = 0x00800000;
365 break; /* => 8 MB */
366
367 case AMD_ID_LV320B:
368 info->flash_id += FLASH_AM320B;
369 info->sector_count = 71;
370 info->size = 0x00800000;
371 break; /* => 8 MB */
wdenk7a428cc2003-06-15 22:40:42 +0000372#endif /* TQM8xxM */
wdenk69141282003-07-07 20:07:54 +0000373
374 case AMD_ID_LV160T:
375 info->flash_id += FLASH_AM160T;
376 info->sector_count = 35;
377 info->size = 0x00400000;
378 break; /* => 4 MB */
379
380 case AMD_ID_LV160B:
381 info->flash_id += FLASH_AM160B;
382 info->sector_count = 35;
383 info->size = 0x00400000;
384 break; /* => 4 MB */
385
wdenkc6097192002-11-03 00:24:07 +0000386 default:
387 info->flash_id = FLASH_UNKNOWN;
388 return (0); /* => no or unknown flash */
389 }
390
391 /* set up sector start address table */
392 switch (value) {
wdenk7a428cc2003-06-15 22:40:42 +0000393#ifdef CONFIG_TQM8xxM /* mirror bit flash */
394 case AMD_ID_MIRROR:
395 switch (info->flash_id & FLASH_TYPEMASK) {
396 /* only known types here - no default */
397 case FLASH_AMLV128U:
wdenk69141282003-07-07 20:07:54 +0000398 case FLASH_AMLV640U:
399 case FLASH_AMLV320U:
wdenk7a428cc2003-06-15 22:40:42 +0000400 for (i = 0; i < info->sector_count; i++) {
401 info->start[i] = base;
402 base += 0x20000;
403 }
404 break;
405 }
406 break;
407# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000408 case AMD_ID_LV400B:
409 case AMD_ID_LV800B:
wdenkc6097192002-11-03 00:24:07 +0000410 /* set sector offsets for bottom boot block type */
411 info->start[0] = base + 0x00000000;
412 info->start[1] = base + 0x00008000;
413 info->start[2] = base + 0x0000C000;
414 info->start[3] = base + 0x00010000;
415 for (i = 4; i < info->sector_count; i++) {
416 info->start[i] = base + (i * 0x00020000) - 0x00060000;
417 }
418 break;
419 case AMD_ID_LV400T:
420 case AMD_ID_LV800T:
wdenkc6097192002-11-03 00:24:07 +0000421 /* set sector offsets for top boot block type */
422 i = info->sector_count - 1;
423 info->start[i--] = base + info->size - 0x00008000;
424 info->start[i--] = base + info->size - 0x0000C000;
425 info->start[i--] = base + info->size - 0x00010000;
426 for (; i >= 0; i--) {
427 info->start[i] = base + i * 0x00020000;
428 }
429 break;
430 case AMD_ID_LV320B:
431 for (i = 0; i < info->sector_count; i++) {
432 info->start[i] = base;
433 /*
434 * The first 8 sectors are 8 kB,
435 * all the other ones are 64 kB
436 */
437 base += (i < 8)
438 ? 2 * ( 8 << 10)
439 : 2 * (64 << 10);
440 }
441 break;
442 case AMD_ID_LV320T:
443 for (i = 0; i < info->sector_count; i++) {
444 info->start[i] = base;
445 /*
446 * The last 8 sectors are 8 kB,
447 * all the other ones are 64 kB
448 */
449 base += (i < (info->sector_count - 8))
450 ? 2 * (64 << 10)
451 : 2 * ( 8 << 10);
452 }
453 break;
wdenk7a428cc2003-06-15 22:40:42 +0000454#endif /* TQM8xxM */
wdenk69141282003-07-07 20:07:54 +0000455 case AMD_ID_LV160B:
456 /* set sector offsets for bottom boot block type */
457 info->start[0] = base + 0x00000000;
458 info->start[1] = base + 0x00008000;
459 info->start[2] = base + 0x0000C000;
460 info->start[3] = base + 0x00010000;
461 for (i = 4; i < info->sector_count; i++) {
462 info->start[i] = base + (i * 0x00020000) - 0x00060000;
463 }
464 break;
465 case AMD_ID_LV160T:
466 /* set sector offsets for top boot block type */
467 i = info->sector_count - 1;
468 info->start[i--] = base + info->size - 0x00008000;
469 info->start[i--] = base + info->size - 0x0000C000;
470 info->start[i--] = base + info->size - 0x00010000;
471 for (; i >= 0; i--) {
472 info->start[i] = base + i * 0x00020000;
473 }
474 break;
wdenkc6097192002-11-03 00:24:07 +0000475 default:
476 return (0);
477 break;
478 }
479
480 /* check for protected sectors */
481 for (i = 0; i < info->sector_count; i++) {
482 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
483 /* D0 = 1 if protected */
484 addr = (volatile unsigned long *)(info->start[i]);
485 info->protect[i] = addr[2] & 1;
486 }
487
488 /*
489 * Prevent writes to uninitialized FLASH.
490 */
491 if (info->flash_id != FLASH_UNKNOWN) {
492 addr = (volatile unsigned long *)info->start[0];
493
494 *addr = 0x00F000F0; /* reset bank */
495 }
496
497 return (info->size);
498}
499
500
501/*-----------------------------------------------------------------------
502 */
503
504int flash_erase (flash_info_t *info, int s_first, int s_last)
505{
506 vu_long *addr = (vu_long*)(info->start[0]);
507 int flag, prot, sect, l_sect;
508 ulong start, now, last;
509
wdenke6466f62003-06-05 19:27:42 +0000510 debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
511
wdenkc6097192002-11-03 00:24:07 +0000512 if ((s_first < 0) || (s_first > s_last)) {
513 if (info->flash_id == FLASH_UNKNOWN) {
514 printf ("- missing\n");
515 } else {
516 printf ("- no sectors to erase\n");
517 }
518 return 1;
519 }
520
521 if ((info->flash_id == FLASH_UNKNOWN) ||
522 (info->flash_id > FLASH_AMD_COMP)) {
523 printf ("Can't erase unknown flash type %08lx - aborted\n",
524 info->flash_id);
525 return 1;
526 }
527
528 prot = 0;
529 for (sect=s_first; sect<=s_last; ++sect) {
530 if (info->protect[sect]) {
531 prot++;
532 }
533 }
534
535 if (prot) {
536 printf ("- Warning: %d protected sectors will not be erased!\n",
537 prot);
538 } else {
539 printf ("\n");
540 }
541
542 l_sect = -1;
543
544 /* Disable interrupts which might cause a timeout here */
545 flag = disable_interrupts();
546
547 addr[0x0555] = 0x00AA00AA;
548 addr[0x02AA] = 0x00550055;
549 addr[0x0555] = 0x00800080;
550 addr[0x0555] = 0x00AA00AA;
551 addr[0x02AA] = 0x00550055;
552
553 /* Start erase on unprotected sectors */
554 for (sect = s_first; sect<=s_last; sect++) {
555 if (info->protect[sect] == 0) { /* not protected */
556 addr = (vu_long*)(info->start[sect]);
557 addr[0] = 0x00300030;
558 l_sect = sect;
559 }
560 }
561
562 /* re-enable interrupts if necessary */
563 if (flag)
564 enable_interrupts();
565
566 /* wait at least 80us - let's wait 1 ms */
567 udelay (1000);
568
569 /*
570 * We wait for the last triggered sector
571 */
572 if (l_sect < 0)
573 goto DONE;
574
575 start = get_timer (0);
576 last = start;
577 addr = (vu_long*)(info->start[l_sect]);
578 while ((addr[0] & 0x00800080) != 0x00800080) {
579 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
580 printf ("Timeout\n");
581 return 1;
582 }
583 /* show that we're waiting */
584 if ((now - last) > 1000) { /* every second */
585 putc ('.');
586 last = now;
587 }
588 }
589
590DONE:
591 /* reset to read mode */
592 addr = (volatile unsigned long *)info->start[0];
593 addr[0] = 0x00F000F0; /* reset bank */
594
595 printf (" done\n");
596 return 0;
597}
598
599/*-----------------------------------------------------------------------
600 * Copy memory to flash, returns:
601 * 0 - OK
602 * 1 - write timeout
603 * 2 - Flash not erased
604 */
605
606int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
607{
608 ulong cp, wp, data;
609 int i, l, rc;
610
611 wp = (addr & ~3); /* get lower word aligned address */
612
613 /*
614 * handle unaligned start bytes
615 */
616 if ((l = addr - wp) != 0) {
617 data = 0;
618 for (i=0, cp=wp; i<l; ++i, ++cp) {
619 data = (data << 8) | (*(uchar *)cp);
620 }
621 for (; i<4 && cnt>0; ++i) {
622 data = (data << 8) | *src++;
623 --cnt;
624 ++cp;
625 }
626 for (; cnt==0 && i<4; ++i, ++cp) {
627 data = (data << 8) | (*(uchar *)cp);
628 }
629
630 if ((rc = write_word(info, wp, data)) != 0) {
631 return (rc);
632 }
633 wp += 4;
634 }
635
636 /*
637 * handle word aligned part
638 */
639 while (cnt >= 4) {
640 data = 0;
641 for (i=0; i<4; ++i) {
642 data = (data << 8) | *src++;
643 }
644 if ((rc = write_word(info, wp, data)) != 0) {
645 return (rc);
646 }
647 wp += 4;
648 cnt -= 4;
649 }
650
651 if (cnt == 0) {
652 return (0);
653 }
654
655 /*
656 * handle unaligned tail bytes
657 */
658 data = 0;
659 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
660 data = (data << 8) | *src++;
661 --cnt;
662 }
663 for (; i<4; ++i, ++cp) {
664 data = (data << 8) | (*(uchar *)cp);
665 }
666
667 return (write_word(info, wp, data));
668}
669
670/*-----------------------------------------------------------------------
671 * Write a word to Flash, returns:
672 * 0 - OK
673 * 1 - write timeout
674 * 2 - Flash not erased
675 */
676static int write_word (flash_info_t *info, ulong dest, ulong data)
677{
678 vu_long *addr = (vu_long*)(info->start[0]);
679 ulong start;
680 int flag;
681
682 /* Check if Flash is (sufficiently) erased */
683 if ((*((vu_long *)dest) & data) != data) {
684 return (2);
685 }
686 /* Disable interrupts which might cause a timeout here */
687 flag = disable_interrupts();
688
689 addr[0x0555] = 0x00AA00AA;
690 addr[0x02AA] = 0x00550055;
691 addr[0x0555] = 0x00A000A0;
692
693 *((vu_long *)dest) = data;
694
695 /* re-enable interrupts if necessary */
696 if (flag)
697 enable_interrupts();
698
699 /* data polling for D7 */
700 start = get_timer (0);
701 while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
702 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
703 return (1);
704 }
705 }
706 return (0);
707}
708
709/*-----------------------------------------------------------------------
710 */