Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | /* |
| 3 | * Copyright (C) 2023 MediaTek Inc. |
| 4 | */ |
| 5 | /dts-v1/; |
| 6 | #include "mt8188.dtsi" |
| 7 | #include "mt6359.dtsi" |
| 8 | |
| 9 | / { |
| 10 | model = "MediaTek MT8188 evaluation board"; |
| 11 | compatible = "mediatek,mt8188-evb", "mediatek,mt8188"; |
| 12 | |
| 13 | aliases { |
| 14 | serial0 = &uart0; |
| 15 | i2c0 = &i2c0; |
| 16 | i2c1 = &i2c1; |
| 17 | i2c2 = &i2c2; |
| 18 | i2c3 = &i2c3; |
| 19 | i2c4 = &i2c4; |
| 20 | i2c5 = &i2c5; |
| 21 | i2c6 = &i2c6; |
| 22 | mmc0 = &mmc0; |
| 23 | }; |
| 24 | |
| 25 | chosen: chosen { |
| 26 | stdout-path = "serial0:115200n8"; |
| 27 | }; |
| 28 | |
| 29 | memory@40000000 { |
| 30 | device_type = "memory"; |
| 31 | reg = <0 0x40000000 0 0x80000000>; |
| 32 | }; |
| 33 | |
| 34 | reserved_memory: reserved-memory { |
| 35 | #address-cells = <2>; |
| 36 | #size-cells = <2>; |
| 37 | ranges; |
| 38 | |
| 39 | scp_mem_reserved: memory@50000000 { |
| 40 | compatible = "shared-dma-pool"; |
| 41 | reg = <0 0x50000000 0 0x2900000>; |
| 42 | no-map; |
| 43 | }; |
| 44 | }; |
| 45 | }; |
| 46 | |
| 47 | &auxadc { |
| 48 | status = "okay"; |
| 49 | }; |
| 50 | |
| 51 | &i2c0 { |
| 52 | pinctrl-names = "default"; |
| 53 | pinctrl-0 = <&i2c0_pins>; |
| 54 | clock-frequency = <400000>; |
| 55 | status = "okay"; |
| 56 | }; |
| 57 | |
| 58 | &i2c1 { |
| 59 | pinctrl-names = "default"; |
| 60 | pinctrl-0 = <&i2c1_pins>; |
| 61 | clock-frequency = <400000>; |
| 62 | status = "okay"; |
| 63 | }; |
| 64 | |
| 65 | &i2c2 { |
| 66 | pinctrl-names = "default"; |
| 67 | pinctrl-0 = <&i2c2_pins>; |
| 68 | clock-frequency = <400000>; |
| 69 | status = "okay"; |
| 70 | }; |
| 71 | |
| 72 | &i2c3 { |
| 73 | pinctrl-names = "default"; |
| 74 | pinctrl-0 = <&i2c3_pins>; |
| 75 | clock-frequency = <400000>; |
| 76 | status = "okay"; |
| 77 | }; |
| 78 | |
| 79 | &i2c4 { |
| 80 | pinctrl-names = "default"; |
| 81 | pinctrl-0 = <&i2c4_pins>; |
| 82 | clock-frequency = <400000>; |
| 83 | status = "okay"; |
| 84 | }; |
| 85 | |
| 86 | &i2c5 { |
| 87 | pinctrl-names = "default"; |
| 88 | pinctrl-0 = <&i2c5_pins>; |
| 89 | clock-frequency = <400000>; |
| 90 | status = "okay"; |
| 91 | }; |
| 92 | |
| 93 | &i2c6 { |
| 94 | pinctrl-names = "default"; |
| 95 | pinctrl-0 = <&i2c6_pins>; |
| 96 | clock-frequency = <400000>; |
| 97 | status = "okay"; |
| 98 | }; |
| 99 | |
| 100 | &mmc0 { |
| 101 | bus-width = <8>; |
| 102 | hs400-ds-delay = <0x1481b>; |
| 103 | max-frequency = <200000000>; |
| 104 | |
| 105 | cap-mmc-highspeed; |
| 106 | mmc-hs200-1_8v; |
| 107 | mmc-hs400-1_8v; |
| 108 | supports-cqe; |
| 109 | cap-mmc-hw-reset; |
| 110 | no-sdio; |
| 111 | no-sd; |
| 112 | non-removable; |
| 113 | |
| 114 | vmmc-supply = <&mt6359_vemc_1_ldo_reg>; |
| 115 | vqmmc-supply = <&mt6359_vufs_ldo_reg>; |
| 116 | |
| 117 | pinctrl-names = "default", "state_uhs"; |
| 118 | pinctrl-0 = <&mmc0_default_pins>; |
| 119 | pinctrl-1 = <&mmc0_uhs_pins>; |
| 120 | |
| 121 | status = "okay"; |
| 122 | }; |
| 123 | |
| 124 | &mt6359_vcore_buck_reg { |
| 125 | regulator-always-on; |
| 126 | }; |
| 127 | |
| 128 | &mt6359_vgpu11_buck_reg { |
| 129 | regulator-always-on; |
| 130 | }; |
| 131 | |
| 132 | &mt6359_vpu_buck_reg { |
| 133 | regulator-always-on; |
| 134 | }; |
| 135 | |
| 136 | &mt6359_vrf12_ldo_reg { |
| 137 | regulator-always-on; |
| 138 | }; |
| 139 | |
| 140 | &nor_flash { |
| 141 | pinctrl-names = "default"; |
| 142 | pinctrl-0 = <&nor_pins_default>; |
| 143 | #address-cells = <1>; |
| 144 | #size-cells = <0>; |
| 145 | status = "okay"; |
| 146 | |
| 147 | flash@0 { |
| 148 | compatible = "jedec,spi-nor"; |
| 149 | reg = <0>; |
| 150 | spi-max-frequency = <52000000>; |
| 151 | }; |
| 152 | }; |
| 153 | |
| 154 | &pio { |
| 155 | adsp_uart_pins: adsp-uart-pins { |
| 156 | pins-tx-rx { |
| 157 | pinmux = <PINMUX_GPIO35__FUNC_O_ADSP_UTXD0>, |
| 158 | <PINMUX_GPIO36__FUNC_I1_ADSP_URXD0>; |
| 159 | }; |
| 160 | }; |
| 161 | |
| 162 | i2c0_pins: i2c0-pins { |
| 163 | pins-bus { |
| 164 | pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>, |
| 165 | <PINMUX_GPIO55__FUNC_B1_SCL0>; |
| 166 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 167 | }; |
| 168 | }; |
| 169 | |
| 170 | i2c1_pins: i2c1-pins { |
| 171 | pins-bus { |
| 172 | pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>, |
| 173 | <PINMUX_GPIO57__FUNC_B1_SCL1>; |
| 174 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 175 | }; |
| 176 | }; |
| 177 | |
| 178 | i2c2_pins: i2c2-pins { |
| 179 | pins-bus { |
| 180 | pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>, |
| 181 | <PINMUX_GPIO59__FUNC_B1_SCL2>; |
| 182 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 183 | }; |
| 184 | }; |
| 185 | |
| 186 | i2c3_pins: i2c3-pins { |
| 187 | pins-bus { |
| 188 | pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>, |
| 189 | <PINMUX_GPIO61__FUNC_B1_SCL3>; |
| 190 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 191 | }; |
| 192 | }; |
| 193 | |
| 194 | i2c4_pins: i2c4-pins { |
| 195 | pins-bus { |
| 196 | pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>, |
| 197 | <PINMUX_GPIO63__FUNC_B1_SCL4>; |
| 198 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 199 | }; |
| 200 | }; |
| 201 | |
| 202 | i2c5_pins: i2c5-pins { |
| 203 | pins-bus { |
| 204 | pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>, |
| 205 | <PINMUX_GPIO65__FUNC_B1_SCL5>; |
| 206 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 207 | }; |
| 208 | }; |
| 209 | |
| 210 | i2c6_pins: i2c6-pins { |
| 211 | pins-bus { |
| 212 | pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>, |
| 213 | <PINMUX_GPIO67__FUNC_B1_SCL6>; |
| 214 | bias-pull-up = <MTK_PULL_SET_RSEL_011>; |
| 215 | }; |
| 216 | }; |
| 217 | |
| 218 | mmc0_default_pins: mmc0-default-pins { |
| 219 | pins-cmd-dat { |
| 220 | pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, |
| 221 | <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, |
| 222 | <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, |
| 223 | <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, |
| 224 | <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, |
| 225 | <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, |
| 226 | <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, |
| 227 | <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, |
| 228 | <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; |
| 229 | input-enable; |
| 230 | drive-strength = <6>; |
| 231 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 232 | }; |
| 233 | |
| 234 | pins-clk { |
| 235 | pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; |
| 236 | drive-strength = <6>; |
| 237 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| 238 | }; |
| 239 | |
| 240 | pins-rst { |
| 241 | pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; |
| 242 | drive-strength = <6>; |
| 243 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 244 | }; |
| 245 | }; |
| 246 | |
| 247 | mmc0_uhs_pins: mmc0-uhs-pins { |
| 248 | pins-cmd-dat { |
| 249 | pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, |
| 250 | <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, |
| 251 | <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, |
| 252 | <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, |
| 253 | <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, |
| 254 | <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, |
| 255 | <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, |
| 256 | <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, |
| 257 | <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; |
| 258 | input-enable; |
| 259 | drive-strength = <8>; |
| 260 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 261 | }; |
| 262 | |
| 263 | pins-clk-ds { |
| 264 | pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>, |
| 265 | <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>; |
| 266 | drive-strength = <8>; |
| 267 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| 268 | }; |
| 269 | |
| 270 | pins-rst { |
| 271 | pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; |
| 272 | drive-strength = <8>; |
| 273 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 274 | }; |
| 275 | }; |
| 276 | |
| 277 | nor_pins_default: nor-pins { |
| 278 | pins-io-ck { |
| 279 | pinmux = <PINMUX_GPIO127__FUNC_B0_SPINOR_IO0>, |
| 280 | <PINMUX_GPIO125__FUNC_O_SPINOR_CK>, |
| 281 | <PINMUX_GPIO128__FUNC_B0_SPINOR_IO1>; |
| 282 | bias-pull-down; |
| 283 | }; |
| 284 | |
| 285 | pins-io-cs { |
| 286 | pinmux = <PINMUX_GPIO126__FUNC_O_SPINOR_CS>, |
| 287 | <PINMUX_GPIO129__FUNC_B0_SPINOR_IO2>, |
| 288 | <PINMUX_GPIO130__FUNC_B0_SPINOR_IO3>; |
| 289 | bias-pull-up; |
| 290 | }; |
| 291 | }; |
| 292 | |
| 293 | spi0_pins: spi0-pins { |
| 294 | pins-spi { |
| 295 | pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>, |
| 296 | <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>, |
| 297 | <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>, |
| 298 | <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>; |
| 299 | bias-disable; |
| 300 | }; |
| 301 | }; |
| 302 | |
| 303 | spi1_pins: spi1-pins { |
| 304 | pins-spi { |
| 305 | pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, |
| 306 | <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, |
| 307 | <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>, |
| 308 | <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; |
| 309 | bias-disable; |
| 310 | }; |
| 311 | }; |
| 312 | |
| 313 | spi2_pins: spi2-pins { |
| 314 | pins-spi { |
| 315 | pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>, |
| 316 | <PINMUX_GPIO80__FUNC_O_SPIM2_CLK>, |
| 317 | <PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>, |
| 318 | <PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>; |
| 319 | bias-disable; |
| 320 | }; |
| 321 | }; |
| 322 | |
| 323 | uart0_pins: uart0-pins { |
| 324 | pins-rx-tx { |
| 325 | pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>, |
| 326 | <PINMUX_GPIO32__FUNC_I1_URXD0>; |
| 327 | bias-pull-up; |
| 328 | }; |
| 329 | }; |
| 330 | }; |
| 331 | |
| 332 | &pmic { |
| 333 | interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; |
| 334 | }; |
| 335 | |
| 336 | &scp { |
| 337 | memory-region = <&scp_mem_reserved>; |
| 338 | status = "okay"; |
| 339 | }; |
| 340 | |
| 341 | &spi0 { |
| 342 | pinctrl-names = "default"; |
| 343 | pinctrl-0 = <&spi0_pins>; |
| 344 | status = "okay"; |
| 345 | }; |
| 346 | |
| 347 | &spi1 { |
| 348 | pinctrl-names = "default"; |
| 349 | pinctrl-0 = <&spi1_pins>; |
| 350 | status = "okay"; |
| 351 | }; |
| 352 | |
| 353 | &spi2 { |
| 354 | pinctrl-names = "default"; |
| 355 | pinctrl-0 = <&spi2_pins>; |
| 356 | status = "okay"; |
| 357 | }; |
| 358 | |
| 359 | &u3phy0 { |
| 360 | status = "okay"; |
| 361 | }; |
| 362 | |
| 363 | &u3phy1 { |
| 364 | status = "okay"; |
| 365 | }; |
| 366 | |
| 367 | &u3phy2 { |
| 368 | status = "okay"; |
| 369 | }; |
| 370 | |
| 371 | &uart0 { |
| 372 | pinctrl-names = "default"; |
| 373 | pinctrl-0 = <&uart0_pins>; |
| 374 | status = "okay"; |
| 375 | }; |
| 376 | |
| 377 | &xhci0 { |
| 378 | status = "okay"; |
| 379 | }; |
| 380 | |
| 381 | &xhci1 { |
| 382 | status = "okay"; |
| 383 | }; |
| 384 | |
| 385 | &xhci2 { |
| 386 | status = "okay"; |
| 387 | }; |