blob: 72474fa73f61f811c8b5563c6dff5a665489e0fe [file] [log] [blame]
Patrick Delaunaya6f03912019-07-05 17:20:14 +02001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
Etienne Carrieree6341132020-06-05 09:24:29 +02003 * Copyright (C) 2019-2020, STMicroelectronics - All Rights Reserved
Patrick Delaunaya6f03912019-07-05 17:20:14 +02004 */
5
Patrick Delaunayba779402020-11-06 19:01:29 +01006#define LOG_CATEGORY LOGC_ARCH
7
Simon Glass3ba929a2020-10-30 21:38:53 -06008#include <fdtdec.h>
Patrick Delaunaya6f03912019-07-05 17:20:14 +02009#include <fdt_support.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Patrick Delaunay472407a2020-03-18 09:22:49 +010011#include <tee.h>
Tom Rinidec7ea02024-05-20 13:35:03 -060012#include <mach/stm32.h>
Patrick Delaunaya6f03912019-07-05 17:20:14 +020013#include <asm/arch/sys_proto.h>
14#include <dt-bindings/pinctrl/stm32-pinfunc.h>
Patrick Delaunay43f214c2019-07-05 17:20:15 +020015#include <linux/io.h>
16
Patrick Delaunaycf471952022-05-09 17:13:22 +020017#define STM32MP13_FDCAN_BASE 0x4400F000
18#define STM32MP13_ADC1_BASE 0x48003000
19#define STM32MP13_TSC_BASE 0x5000B000
20#define STM32MP13_CRYP_BASE 0x54002000
21#define STM32MP13_ETH2_BASE 0x5800E000
22#define STM32MP13_DCMIPP_BASE 0x5A000000
23#define STM32MP13_LTDC_BASE 0x5A010000
24
Patrick Delaunaye65e80e2022-05-09 17:13:21 +020025#define STM32MP15_FDCAN_BASE 0x4400e000
26#define STM32MP15_CRYP2_BASE 0x4c005000
27#define STM32MP15_CRYP1_BASE 0x54001000
28#define STM32MP15_GPU_BASE 0x59000000
29#define STM32MP15_DSI_BASE 0x5a000000
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010030
Patrick Delaunay43f214c2019-07-05 17:20:15 +020031/* fdt helper */
32static bool fdt_disable_subnode_by_address(void *fdt, int offset, u32 addr)
33{
34 int node;
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010035 fdt_addr_t regs;
Patrick Delaunay43f214c2019-07-05 17:20:15 +020036
37 for (node = fdt_first_subnode(fdt, offset);
38 node >= 0;
39 node = fdt_next_subnode(fdt, node)) {
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010040 regs = fdtdec_get_addr(fdt, node, "reg");
41 if (addr == regs) {
Patrick Delaunay43f214c2019-07-05 17:20:15 +020042 if (fdtdec_get_is_enabled(fdt, node)) {
43 fdt_status_disabled(fdt, node);
44
45 return true;
46 }
47 return false;
48 }
49 }
50
51 return false;
52}
53
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010054/* deactivate all the cpu except core 0 */
55static void stm32_fdt_fixup_cpu(void *blob, char *name)
56{
57 int off;
58 u32 reg;
59
60 off = fdt_path_offset(blob, "/cpus");
61 if (off < 0) {
Patrick Delaunayba779402020-11-06 19:01:29 +010062 log_warning("%s: couldn't find /cpus node\n", __func__);
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010063 return;
64 }
65
66 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
67 while (off != -FDT_ERR_NOTFOUND) {
68 reg = fdtdec_get_addr(blob, off, "reg");
69 if (reg != 0) {
70 fdt_del_node(blob, off);
Patrick Delaunayba779402020-11-06 19:01:29 +010071 log_notice("FDT: cpu %d node remove for %s\n",
72 reg, name);
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010073 /* after delete we can't trust the offsets anymore */
74 off = -1;
75 }
76 off = fdt_node_offset_by_prop_value(blob, off,
77 "device_type", "cpu", 4);
78 }
79}
80
81static void stm32_fdt_disable(void *fdt, int offset, u32 addr,
82 const char *string, const char *name)
83{
84 if (fdt_disable_subnode_by_address(fdt, offset, addr))
Patrick Delaunayba779402020-11-06 19:01:29 +010085 log_notice("FDT: %s@%08x node disabled for %s\n",
86 string, addr, name);
Patrick Delaunayfac5ba82020-02-12 19:37:44 +010087}
88
Patrick Delaunayd1633b32020-03-18 09:22:48 +010089static void stm32_fdt_disable_optee(void *blob)
90{
91 int off, node;
92
Etienne Carrieree6341132020-06-05 09:24:29 +020093 /* Delete "optee" firmware node */
Patrick Delaunayd1633b32020-03-18 09:22:48 +010094 off = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
95 if (off >= 0 && fdtdec_get_is_enabled(blob, off))
Etienne Carrieree6341132020-06-05 09:24:29 +020096 fdt_del_node(blob, off);
Patrick Delaunayd1633b32020-03-18 09:22:48 +010097
Etienne Carrieree6341132020-06-05 09:24:29 +020098 /* Delete "optee@..." reserved-memory node */
Patrick Delaunayd1633b32020-03-18 09:22:48 +010099 off = fdt_path_offset(blob, "/reserved-memory/");
100 if (off < 0)
101 return;
102 for (node = fdt_first_subnode(blob, off);
103 node >= 0;
104 node = fdt_next_subnode(blob, node)) {
Etienne Carrieree6341132020-06-05 09:24:29 +0200105 if (strncmp(fdt_get_name(blob, node, NULL), "optee@", 6))
106 continue;
107
108 if (fdt_del_node(blob, node))
109 printf("Failed to remove optee reserved-memory node\n");
Patrick Delaunayd1633b32020-03-18 09:22:48 +0100110 }
111}
112
Patrick Delaunaycf471952022-05-09 17:13:22 +0200113static void stm32mp13_fdt_fixup(void *blob, int soc, u32 cpu, char *name)
114{
115 switch (cpu) {
116 case CPU_STM32MP131Fxx:
117 case CPU_STM32MP131Dxx:
118 case CPU_STM32MP131Cxx:
119 case CPU_STM32MP131Axx:
120 stm32_fdt_disable(blob, soc, STM32MP13_FDCAN_BASE, "can", name);
121 stm32_fdt_disable(blob, soc, STM32MP13_ADC1_BASE, "adc", name);
122 fallthrough;
123 case CPU_STM32MP133Fxx:
124 case CPU_STM32MP133Dxx:
125 case CPU_STM32MP133Cxx:
126 case CPU_STM32MP133Axx:
127 stm32_fdt_disable(blob, soc, STM32MP13_LTDC_BASE, "ltdc", name);
128 stm32_fdt_disable(blob, soc, STM32MP13_DCMIPP_BASE, "dcmipp",
129 name);
130 stm32_fdt_disable(blob, soc, STM32MP13_TSC_BASE, "tsc", name);
131 break;
132 default:
133 break;
134 }
135
136 switch (cpu) {
137 case CPU_STM32MP135Dxx:
138 case CPU_STM32MP135Axx:
139 case CPU_STM32MP133Dxx:
140 case CPU_STM32MP133Axx:
141 case CPU_STM32MP131Dxx:
142 case CPU_STM32MP131Axx:
143 stm32_fdt_disable(blob, soc, STM32MP13_CRYP_BASE, "cryp", name);
144 break;
145 default:
146 break;
147 }
148}
149
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200150static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name)
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200151{
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200152 u32 pkg;
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100153
154 switch (cpu) {
Patrick Delaunaydb33b0e2020-02-26 11:26:43 +0100155 case CPU_STM32MP151Fxx:
156 case CPU_STM32MP151Dxx:
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100157 case CPU_STM32MP151Cxx:
158 case CPU_STM32MP151Axx:
159 stm32_fdt_fixup_cpu(blob, name);
160 /* after cpu delete we can't trust the soc offsets anymore */
161 soc = fdt_path_offset(blob, "/soc");
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200162 stm32_fdt_disable(blob, soc, STM32MP15_FDCAN_BASE, "can", name);
163 fallthrough;
Patrick Delaunaydb33b0e2020-02-26 11:26:43 +0100164 case CPU_STM32MP153Fxx:
165 case CPU_STM32MP153Dxx:
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100166 case CPU_STM32MP153Cxx:
167 case CPU_STM32MP153Axx:
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200168 stm32_fdt_disable(blob, soc, STM32MP15_GPU_BASE, "gpu", name);
169 stm32_fdt_disable(blob, soc, STM32MP15_DSI_BASE, "dsi", name);
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100170 break;
171 default:
172 break;
173 }
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100174 switch (cpu) {
Patrick Delaunaydb33b0e2020-02-26 11:26:43 +0100175 case CPU_STM32MP157Dxx:
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100176 case CPU_STM32MP157Axx:
Patrick Delaunaydb33b0e2020-02-26 11:26:43 +0100177 case CPU_STM32MP153Dxx:
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100178 case CPU_STM32MP153Axx:
Patrick Delaunaydb33b0e2020-02-26 11:26:43 +0100179 case CPU_STM32MP151Dxx:
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100180 case CPU_STM32MP151Axx:
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200181 stm32_fdt_disable(blob, soc, STM32MP15_CRYP1_BASE, "cryp",
182 name);
183 stm32_fdt_disable(blob, soc, STM32MP15_CRYP2_BASE, "cryp",
184 name);
Patrick Delaunayfac5ba82020-02-12 19:37:44 +0100185 break;
186 default:
187 break;
188 }
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200189 switch (get_cpu_package()) {
Patrick Delaunaye4bdd542022-05-20 18:24:42 +0200190 case STM32MP15_PKG_AA_LBGA448:
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200191 pkg = STM32MP_PKG_AA;
192 break;
Patrick Delaunaye4bdd542022-05-20 18:24:42 +0200193 case STM32MP15_PKG_AB_LBGA354:
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200194 pkg = STM32MP_PKG_AB;
195 break;
Patrick Delaunaye4bdd542022-05-20 18:24:42 +0200196 case STM32MP15_PKG_AC_TFBGA361:
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200197 pkg = STM32MP_PKG_AC;
198 break;
Patrick Delaunaye4bdd542022-05-20 18:24:42 +0200199 case STM32MP15_PKG_AD_TFBGA257:
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200200 pkg = STM32MP_PKG_AD;
201 break;
202 default:
203 pkg = 0;
204 break;
205 }
206 if (pkg) {
207 do_fixup_by_compat_u32(blob, "st,stm32mp157-pinctrl",
208 "st,package", pkg, false);
209 do_fixup_by_compat_u32(blob, "st,stm32mp157-z-pinctrl",
210 "st,package", pkg, false);
211 }
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200212}
213
214/*
215 * This function is called right before the kernel is booted. "blob" is the
216 * device tree that will be passed to the kernel.
217 */
218int ft_system_setup(void *blob, struct bd_info *bd)
219{
220 int ret = 0;
221 int soc;
222 u32 cpu;
223 char name[SOC_NAME_SIZE];
224
225 soc = fdt_path_offset(blob, "/soc");
226 /* when absent, nothing to do */
227 if (soc == -FDT_ERR_NOTFOUND)
228 return 0;
229 if (soc < 0)
230 return soc;
231
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200232 /* MPUs Part Numbers and name*/
233 cpu = get_cpu_type();
234 get_soc_name(name);
235
Patrick Delaunay990e0572024-01-15 15:05:56 +0100236 if (IS_ENABLED(CONFIG_STM32MP13X))
Patrick Delaunaycf471952022-05-09 17:13:22 +0200237 stm32mp13_fdt_fixup(blob, soc, cpu, name);
238
Patrick Delaunay4c6fcbc2024-01-15 15:05:57 +0100239 if (IS_ENABLED(CONFIG_STM32MP15X)) {
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200240 stm32mp15_fdt_fixup(blob, soc, cpu, name);
241
242 /*
243 * TEMP: remove OP-TEE nodes in kernel device tree
244 * copied from U-Boot device tree by optee_copy_fdt_nodes
245 * when OP-TEE is not detected (probe failed)
246 * these OP-TEE nodes are present in <board>-u-boot.dtsi
247 * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
248 * when FIP is not used by TF-A
249 */
Patrick Delaunay4c6fcbc2024-01-15 15:05:57 +0100250 if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) &&
Patrick Delaunaye65e80e2022-05-09 17:13:21 +0200251 !tee_find_device(NULL, NULL, NULL, NULL))
252 stm32_fdt_disable_optee(blob);
253 }
Patrick Delaunayd1633b32020-03-18 09:22:48 +0100254
Patrick Delaunaya6f03912019-07-05 17:20:14 +0200255 return ret;
256}