Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 5d5930d0c5ec8abb1cc4d0d63dfa284bab31cfb2 / . / include / configs / mx53evk.h
blob: 19f8408e452703be0be54075725be38aa5892286 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]2/*
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the MX53-EVK Freescale board.
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Fabio Estevam17978382011-09-22 08:07:22 +0000[diff] [blame]11#define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
12
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]13#include <asm/arch/imx-regs.h>
14
Fabio Estevamb1574ff2011-10-27 01:32:43 +0000[diff] [blame]15#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevamb1574ff2011-10-27 01:32:43 +0000[diff] [blame]16#define CONFIG_SETUP_MEMORY_TAGS
17#define CONFIG_INITRD_TAG
Fabio Estevam5db5f412013-04-24 14:44:26 +0000[diff] [blame]18#define CONFIG_REVISION_TAG
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]19
Gong Qianyu52de2e52015-10-26 19:47:42 +0800[diff] [blame]20#define CONFIG_SYS_FSL_CLK
Fabio Estevam31ab5852014-04-22 15:34:58 -0300[diff] [blame]21
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]22/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
24
Stefano Babic1ca47d92011-11-22 15:22:39 +0100[diff] [blame]25#define CONFIG_MXC_UART_BASE UART1_BASE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]26
27/* I2C Configs */
trem03997412013-09-21 18:13:36 +0200[diff] [blame]28#define CONFIG_SYS_I2C
29#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +0200[diff] [blame]30#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
31#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -0700[diff] [blame]32#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]33
34/* PMIC Configs */
Łukasz Majewski1b6d9ed2012-11-13 03:22:14 +0000[diff] [blame]35#define CONFIG_POWER
36#define CONFIG_POWER_I2C
37#define CONFIG_POWER_FSL
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]38#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
Simon Glass02229812014-05-20 06:01:34 -0600[diff] [blame]39#define CONFIG_POWER_FSL_MC13892
Fabio Estevamaf98ea02011-10-25 01:44:19 +0000[diff] [blame]40#define CONFIG_RTC_MC13XXX
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]41
42/* MMC Configs */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]43#define CONFIG_SYS_FSL_ESDHC_ADDR 0
44#define CONFIG_SYS_FSL_ESDHC_NUM 2
45
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]46/* Eth Configs */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]47
48#define CONFIG_FEC_MXC
49#define IMX_FEC_BASE FEC_BASE_ADDR
50#define CONFIG_FEC_MXC_PHYADDR 0x1F
51
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]52/* allow to overwrite serial and ethaddr */
53#define CONFIG_ENV_OVERWRITE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]54
55/* Command definition */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]56
Wolfgang Grandegger96529e22011-10-17 08:21:56 +0000[diff] [blame]57#define CONFIG_ETHPRIME "FEC0"
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]58
59#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]60
61#define CONFIG_EXTRA_ENV_SETTINGS \
62 "script=boot.scr\0" \
63 "uimage=uImage\0" \
64 "mmcdev=0\0" \
65 "mmcpart=2\0" \
66 "mmcroot=/dev/mmcblk0p3 rw\0" \
67 "mmcrootfstype=ext3 rootwait\0" \
68 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
69 "root=${mmcroot} " \
70 "rootfstype=${mmcrootfstype}\0" \
71 "loadbootscript=" \
72 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
73 "bootscript=echo Running bootscript from mmc ...; " \
74 "source\0" \
75 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
76 "mmcboot=echo Booting from mmc ...; " \
77 "run mmcargs; " \
78 "bootm\0" \
79 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
80 "root=/dev/nfs " \
81 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
82 "netboot=echo Booting from net ...; " \
83 "run netargs; " \
84 "dhcp ${uimage}; bootm\0" \
85
86#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000[diff] [blame]87 "mmc dev ${mmcdev}; if mmc rescan; then " \
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]88 "if run loadbootscript; then " \
89 "run bootscript; " \
90 "else " \
91 "if run loaduimage; then " \
92 "run mmcboot; " \
93 "else run netboot; " \
94 "fi; " \
95 "fi; " \
96 "else run netboot; fi"
97
98#define CONFIG_ARP_TIMEOUT 200UL
99
100/* Miscellaneous configurable options */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]101
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]102#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
103
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]104/* Physical Memory Map */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]105#define PHYS_SDRAM_1 CSD0_BASE_ADDR
106#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
107
108#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
109#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
110#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
111
112#define CONFIG_SYS_INIT_SP_OFFSET \
113 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
114#define CONFIG_SYS_INIT_SP_ADDR \
115 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
116
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]117/* environment organization */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]118#define CONFIG_SYS_MMC_ENV_DEV 0
119
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000[diff] [blame]120#endif /* __CONFIG_H */