Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 2 | /* |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 3 | * Copyright 2017, 2020 NXP |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __LS1088A_RDB_H |
| 7 | #define __LS1088A_RDB_H |
| 8 | |
| 9 | #include "ls1088a_common.h" |
| 10 | |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 11 | #ifdef CONFIG_TFABOOT |
| 12 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 13 | #else |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 14 | #if defined(CONFIG_QSPI_BOOT) |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 15 | #elif defined(CONFIG_SD_BOOT) |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 16 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 17 | #else |
| 18 | #define CONFIG_ENV_IS_IN_FLASH |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 19 | #endif |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 20 | #endif /* CONFIG_TFABOOT */ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 21 | |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 22 | #if defined(CONFIG_TFABOOT) || \ |
| 23 | defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 24 | #ifndef CONFIG_SPL_BUILD |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 25 | #define CONFIG_QIXIS_I2C_ACCESS |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 26 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 27 | #define SYS_NO_FLASH |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 28 | #undef CONFIG_CMD_IMLS |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 29 | #endif |
| 30 | |
| 31 | #define CONFIG_SYS_CLK_FREQ 100000000 |
| 32 | #define CONFIG_DDR_CLK_FREQ 100000000 |
| 33 | #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ |
| 34 | #define COUNTER_FREQUENCY 25000000 /* 25MHz */ |
| 35 | |
| 36 | #define CONFIG_DDR_SPD |
| 37 | #ifdef CONFIG_EMU |
| 38 | #define CONFIG_SYS_FSL_DDR_EMU |
| 39 | #define CONFIG_SYS_MXC_I2C1_SPEED 40000000 |
| 40 | #define CONFIG_SYS_MXC_I2C2_SPEED 40000000 |
| 41 | #else |
| 42 | #define CONFIG_DDR_ECC |
| 43 | #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER |
| 44 | #define CONFIG_MEM_INIT_VALUE 0xdeadbeef |
| 45 | #endif |
| 46 | #define SPD_EEPROM_ADDRESS 0x51 |
| 47 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ |
| 48 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
| 49 | |
| 50 | |
| 51 | #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) |
| 52 | #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) |
| 53 | #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128 * 1024 * 1024) |
| 54 | #define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64 * 1024 * 1024) |
| 55 | |
| 56 | #define CONFIG_SYS_NOR0_CSPR \ |
| 57 | (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ |
| 58 | CSPR_PORT_SIZE_16 | \ |
| 59 | CSPR_MSEL_NOR | \ |
| 60 | CSPR_V) |
| 61 | #define CONFIG_SYS_NOR0_CSPR_EARLY \ |
| 62 | (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \ |
| 63 | CSPR_PORT_SIZE_16 | \ |
| 64 | CSPR_MSEL_NOR | \ |
| 65 | CSPR_V) |
| 66 | #define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(6) |
| 67 | #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x1) | \ |
| 68 | FTIM0_NOR_TEADC(0x1) | \ |
| 69 | FTIM0_NOR_TEAHC(0x1)) |
| 70 | #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x1) | \ |
| 71 | FTIM1_NOR_TRAD_NOR(0x1)) |
| 72 | #define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x0) | \ |
| 73 | FTIM2_NOR_TCH(0x0) | \ |
| 74 | FTIM2_NOR_TWP(0x1)) |
| 75 | #define CONFIG_SYS_NOR_FTIM3 0x04000000 |
| 76 | #define CONFIG_SYS_IFC_CCR 0x01000000 |
| 77 | |
| 78 | #ifndef SYS_NO_FLASH |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 79 | #define CONFIG_SYS_FLASH_QUIET_TEST |
| 80 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ |
| 81 | |
| 82 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ |
| 83 | #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ |
| 84 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 85 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
| 86 | |
| 87 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| 88 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
| 89 | #endif |
| 90 | #endif |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 91 | |
| 92 | #ifndef SPL_NO_IFC |
Ashish Kumar | 624787d | 2017-11-28 10:52:17 +0530 | [diff] [blame] | 93 | #define CONFIG_NAND_FSL_IFC |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 94 | #endif |
| 95 | |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 96 | #define CONFIG_SYS_NAND_MAX_ECCPOS 256 |
| 97 | #define CONFIG_SYS_NAND_MAX_OOBFREE 2 |
| 98 | |
| 99 | #define CONFIG_SYS_NAND_CSPR_EXT (0x0) |
| 100 | #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ |
| 101 | | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ |
| 102 | | CSPR_MSEL_NAND /* MSEL = NAND */ \ |
| 103 | | CSPR_V) |
| 104 | #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) |
| 105 | |
| 106 | #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ |
| 107 | | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ |
| 108 | | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ |
| 109 | | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ |
| 110 | | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ |
| 111 | | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ |
| 112 | | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ |
| 113 | |
| 114 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 115 | |
| 116 | /* ONFI NAND Flash mode0 Timing Params */ |
| 117 | #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ |
| 118 | FTIM0_NAND_TWP(0x18) | \ |
| 119 | FTIM0_NAND_TWCHT(0x07) | \ |
| 120 | FTIM0_NAND_TWH(0x0a)) |
| 121 | #define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ |
| 122 | FTIM1_NAND_TWBE(0x39) | \ |
| 123 | FTIM1_NAND_TRR(0x0e) | \ |
| 124 | FTIM1_NAND_TRP(0x18)) |
| 125 | #define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ |
| 126 | FTIM2_NAND_TREH(0x0a) | \ |
| 127 | FTIM2_NAND_TWHRE(0x1e)) |
| 128 | #define CONFIG_SYS_NAND_FTIM3 0x0 |
| 129 | |
| 130 | #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } |
| 131 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 132 | #define CONFIG_MTD_NAND_VERIFY_WRITE |
Ashish Kumar | 624787d | 2017-11-28 10:52:17 +0530 | [diff] [blame] | 133 | #define CONFIG_CMD_NAND |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 134 | |
| 135 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
| 136 | |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 137 | #ifndef SPL_NO_QIXIS |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 138 | #define CONFIG_FSL_QIXIS |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 139 | #endif |
| 140 | |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 141 | #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 |
Rajesh Bhagat | a421625 | 2018-01-17 16:13:09 +0530 | [diff] [blame] | 142 | #define QIXIS_BRDCFG4_OFFSET 0x54 |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 143 | #define QIXIS_LBMAP_SWITCH 2 |
| 144 | #define QIXIS_QMAP_MASK 0xe0 |
| 145 | #define QIXIS_QMAP_SHIFT 5 |
| 146 | #define QIXIS_LBMAP_MASK 0x1f |
| 147 | #define QIXIS_LBMAP_SHIFT 5 |
| 148 | #define QIXIS_LBMAP_DFLTBANK 0x00 |
| 149 | #define QIXIS_LBMAP_ALTBANK 0x20 |
| 150 | #define QIXIS_LBMAP_SD 0x00 |
Ashish Kumar | 55769ca | 2018-01-17 12:16:37 +0530 | [diff] [blame] | 151 | #define QIXIS_LBMAP_EMMC 0x00 |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 152 | #define QIXIS_LBMAP_SD_QSPI 0x00 |
| 153 | #define QIXIS_LBMAP_QSPI 0x00 |
| 154 | #define QIXIS_RCW_SRC_SD 0x40 |
Ashish Kumar | 55769ca | 2018-01-17 12:16:37 +0530 | [diff] [blame] | 155 | #define QIXIS_RCW_SRC_EMMC 0x41 |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 156 | #define QIXIS_RCW_SRC_QSPI 0x62 |
| 157 | #define QIXIS_RST_CTL_RESET 0x31 |
| 158 | #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 |
| 159 | #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 |
| 160 | #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 |
| 161 | #define QIXIS_RST_FORCE_MEM 0x01 |
| 162 | |
| 163 | #define CONFIG_SYS_FPGA_CSPR_EXT (0x0) |
| 164 | #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ |
| 165 | | CSPR_PORT_SIZE_8 \ |
| 166 | | CSPR_MSEL_GPCM \ |
| 167 | | CSPR_V) |
| 168 | #define SYS_FPGA_CSPR_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ |
| 169 | | CSPR_PORT_SIZE_8 \ |
| 170 | | CSPR_MSEL_GPCM \ |
| 171 | | CSPR_V) |
| 172 | |
| 173 | #define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64*1024) |
| 174 | #define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) |
| 175 | /* QIXIS Timing parameters*/ |
| 176 | #define SYS_FPGA_CS_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ |
| 177 | FTIM0_GPCM_TEADC(0x0e) | \ |
| 178 | FTIM0_GPCM_TEAHC(0x0e)) |
| 179 | #define SYS_FPGA_CS_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ |
| 180 | FTIM1_GPCM_TRAD(0x3f)) |
| 181 | #define SYS_FPGA_CS_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ |
| 182 | FTIM2_GPCM_TCH(0xf) | \ |
| 183 | FTIM2_GPCM_TWP(0x3E)) |
| 184 | #define SYS_FPGA_CS_FTIM3 0x0 |
| 185 | |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 186 | #if defined(CONFIG_TFABOOT) || \ |
| 187 | defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 188 | #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT |
| 189 | #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR |
| 190 | #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK |
| 191 | #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR |
| 192 | #define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 |
| 193 | #define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 |
| 194 | #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 |
| 195 | #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 |
| 196 | #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT |
| 197 | #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR |
| 198 | #define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL |
| 199 | #define CONFIG_SYS_AMASK2 CONFIG_SYS_FPGA_AMASK |
| 200 | #define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR |
| 201 | #define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 |
| 202 | #define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 |
| 203 | #define CONFIG_SYS_CS2_FTIM2 SYS_FPGA_CS_FTIM2 |
| 204 | #define CONFIG_SYS_CS2_FTIM3 SYS_FPGA_CS_FTIM3 |
| 205 | #else |
| 206 | #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT |
| 207 | #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY |
| 208 | #define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR |
| 209 | #define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK |
| 210 | #define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR |
| 211 | #define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 |
| 212 | #define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 |
| 213 | #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 |
| 214 | #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 |
| 215 | #endif |
| 216 | |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 217 | #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 |
| 218 | |
Rajesh Bhagat | 170eecf | 2018-01-17 16:13:05 +0530 | [diff] [blame] | 219 | #define I2C_MUX_CH_VOL_MONITOR 0xA |
| 220 | /* Voltage monitor on channel 2*/ |
| 221 | #define I2C_VOL_MONITOR_ADDR 0x63 |
| 222 | #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 |
| 223 | #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 |
| 224 | #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 |
Rajesh Bhagat | a421625 | 2018-01-17 16:13:09 +0530 | [diff] [blame] | 225 | #define I2C_SVDD_MONITOR_ADDR 0x4F |
| 226 | |
| 227 | #define CONFIG_VID_FLS_ENV "ls1088ardb_vdd_mv" |
| 228 | #define CONFIG_VID |
| 229 | |
| 230 | /* The lowest and highest voltage allowed for LS1088ARDB */ |
| 231 | #define VDD_MV_MIN 819 |
| 232 | #define VDD_MV_MAX 1212 |
| 233 | |
| 234 | #define CONFIG_VOL_MONITOR_LTC3882_SET |
| 235 | #define CONFIG_VOL_MONITOR_LTC3882_READ |
Rajesh Bhagat | 170eecf | 2018-01-17 16:13:05 +0530 | [diff] [blame] | 236 | |
| 237 | /* PM Bus commands code for LTC3882*/ |
| 238 | #define PMBUS_CMD_PAGE 0x0 |
| 239 | #define PMBUS_CMD_READ_VOUT 0x8B |
| 240 | #define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 |
| 241 | #define PMBUS_CMD_VOUT_COMMAND 0x21 |
| 242 | |
| 243 | #define PWM_CHANNEL0 0x0 |
| 244 | |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 245 | /* |
| 246 | * I2C bus multiplexer |
| 247 | */ |
| 248 | #define I2C_MUX_PCA_ADDR_PRI 0x77 |
| 249 | #define I2C_MUX_PCA_ADDR_SEC 0x76 /* Secondary multiplexer */ |
| 250 | #define I2C_RETIMER_ADDR 0x18 |
| 251 | #define I2C_MUX_CH_DEFAULT 0x8 |
| 252 | #define I2C_MUX_CH5 0xD |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 253 | |
| 254 | #ifndef SPL_NO_RTC |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 255 | /* |
| 256 | * RTC configuration |
| 257 | */ |
| 258 | #define RTC |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 259 | #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 260 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 261 | |
| 262 | /* EEPROM */ |
| 263 | #define CONFIG_ID_EEPROM |
| 264 | #define CONFIG_SYS_I2C_EEPROM_NXID |
| 265 | #define CONFIG_SYS_EEPROM_BUS_NUM 0 |
| 266 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 |
| 267 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 268 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 |
| 269 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
| 270 | |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 271 | #ifndef SPL_NO_QSPI |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 272 | /* QSPI device */ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 273 | #if defined(CONFIG_TFABOOT) || \ |
| 274 | defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 275 | #define FSL_QSPI_FLASH_SIZE (1 << 26) |
| 276 | #define FSL_QSPI_FLASH_NUM 2 |
| 277 | #endif |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 278 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 279 | |
| 280 | #define CONFIG_CMD_MEMINFO |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 281 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| 282 | #define CONFIG_SYS_MEMTEST_END 0x9fffffff |
| 283 | |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 284 | #ifdef CONFIG_SPL_BUILD |
| 285 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE |
| 286 | #else |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 287 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 288 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 289 | |
| 290 | #define CONFIG_FSL_MEMAC |
| 291 | |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 292 | #ifndef SPL_NO_ENV |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 293 | /* Initial environment variables */ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 294 | #ifdef CONFIG_TFABOOT |
| 295 | #define QSPI_MC_INIT_CMD \ |
| 296 | "sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ |
| 297 | "sf read 0x80100000 0xE00000 0x100000;" \ |
| 298 | "env exists secureboot && " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 299 | "sf read 0x80640000 0x640000 0x40000 && " \ |
| 300 | "sf read 0x80680000 0x680000 0x40000 && " \ |
| 301 | "esbc_validate 0x80640000 && " \ |
| 302 | "esbc_validate 0x80680000 ;" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 303 | "fsl_mc start mc 0x80000000 0x80100000\0" |
| 304 | #define SD_MC_INIT_CMD \ |
| 305 | "mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ |
| 306 | "mmc read 0x80100000 0x7000 0x800;" \ |
| 307 | "env exists secureboot && " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 308 | "mmc read 0x80640000 0x3200 0x20 && " \ |
| 309 | "mmc read 0x80680000 0x3400 0x20 && " \ |
| 310 | "esbc_validate 0x80640000 && " \ |
| 311 | "esbc_validate 0x80680000 ;" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 312 | "fsl_mc start mc 0x80000000 0x80100000\0" |
| 313 | #else |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 314 | #if defined(CONFIG_QSPI_BOOT) |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 315 | #define MC_INIT_CMD \ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 316 | "mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 317 | "sf read 0x80100000 0xE00000 0x100000;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 318 | "env exists secureboot && " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 319 | "sf read 0x80640000 0x640000 0x40000 && " \ |
| 320 | "sf read 0x80680000 0x680000 0x40000 && " \ |
| 321 | "esbc_validate 0x80640000 && " \ |
| 322 | "esbc_validate 0x80680000 ;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 323 | "fsl_mc start mc 0x80000000 0x80100000\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 324 | "mcmemsize=0x70000000\0" |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 325 | #elif defined(CONFIG_SD_BOOT) |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 326 | #define MC_INIT_CMD \ |
| 327 | "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ |
| 328 | "mmc read 0x80100000 0x7000 0x800;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 329 | "env exists secureboot && " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 330 | "mmc read 0x80640000 0x3200 0x20 && " \ |
| 331 | "mmc read 0x80680000 0x3400 0x20 && " \ |
| 332 | "esbc_validate 0x80640000 && " \ |
| 333 | "esbc_validate 0x80680000 ;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 334 | "fsl_mc start mc 0x80000000 0x80100000\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 335 | "mcmemsize=0x70000000\0" |
| 336 | #endif |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 337 | #endif /* CONFIG_TFABOOT */ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 338 | |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 339 | #undef CONFIG_EXTRA_ENV_SETTINGS |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 340 | #ifdef CONFIG_TFABOOT |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 341 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 342 | "BOARD=ls1088ardb\0" \ |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 343 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ |
Ashish Kumar | 5676ceb | 2017-11-06 13:18:43 +0530 | [diff] [blame] | 344 | "ramdisk_addr=0x800000\0" \ |
| 345 | "ramdisk_size=0x2000000\0" \ |
| 346 | "fdt_high=0xa0000000\0" \ |
| 347 | "initrd_high=0xffffffffffffffff\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 348 | "fdt_addr=0x64f00000\0" \ |
| 349 | "kernel_addr=0x1000000\0" \ |
| 350 | "kernel_addr_sd=0x8000\0" \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 351 | "kernelhdr_addr_sd=0x3000\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 352 | "kernel_start=0x580100000\0" \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 353 | "kernelheader_start=0x580600000\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 354 | "scriptaddr=0x80000000\0" \ |
| 355 | "scripthdraddr=0x80080000\0" \ |
| 356 | "fdtheader_addr_r=0x80100000\0" \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 357 | "kernelheader_addr=0x600000\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 358 | "kernelheader_addr_r=0x80200000\0" \ |
| 359 | "kernel_addr_r=0x81000000\0" \ |
| 360 | "kernelheader_size=0x40000\0" \ |
| 361 | "fdt_addr_r=0x90000000\0" \ |
| 362 | "load_addr=0xa0000000\0" \ |
| 363 | "kernel_size=0x2800000\0" \ |
| 364 | "kernel_size_sd=0x14000\0" \ |
Udit Agarwal | 11e1a57 | 2019-11-20 08:49:06 +0000 | [diff] [blame] | 365 | "kernelhdr_size_sd=0x20\0" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 366 | QSPI_MC_INIT_CMD \ |
| 367 | "mcmemsize=0x70000000\0" \ |
| 368 | BOOTENV \ |
| 369 | "boot_scripts=ls1088ardb_boot.scr\0" \ |
| 370 | "boot_script_hdr=hdr_ls1088ardb_bs.out\0" \ |
| 371 | "scan_dev_for_boot_part=" \ |
| 372 | "part list ${devtype} ${devnum} devplist; " \ |
| 373 | "env exists devplist || setenv devplist 1; " \ |
| 374 | "for distro_bootpart in ${devplist}; do " \ |
| 375 | "if fstype ${devtype} " \ |
| 376 | "${devnum}:${distro_bootpart} " \ |
| 377 | "bootfstype; then " \ |
| 378 | "run scan_dev_for_boot; " \ |
| 379 | "fi; " \ |
| 380 | "done\0" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 381 | "boot_a_script=" \ |
| 382 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 383 | "${scriptaddr} ${prefix}${script}; " \ |
| 384 | "env exists secureboot && load ${devtype} " \ |
| 385 | "${devnum}:${distro_bootpart} " \ |
Vinitha V Pillai | 25355ec | 2019-04-23 05:52:17 +0000 | [diff] [blame] | 386 | "${scripthdraddr} ${prefix}${boot_script_hdr}; "\ |
| 387 | "env exists secureboot " \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 388 | "&& esbc_validate ${scripthdraddr};" \ |
| 389 | "source ${scriptaddr}\0" \ |
| 390 | "installer=load mmc 0:2 $load_addr " \ |
| 391 | "/flex_installer_arm64.itb; " \ |
| 392 | "env exists mcinitcmd && run mcinitcmd && " \ |
| 393 | "mmc read 0x80001000 0x6800 0x800;" \ |
| 394 | "fsl_mc lazyapply dpl 0x80001000;" \ |
| 395 | "bootm $load_addr#ls1088ardb\0" \ |
| 396 | "qspi_bootcmd=echo Trying load from qspi..;" \ |
| 397 | "sf probe && sf read $load_addr " \ |
| 398 | "$kernel_addr $kernel_size ; env exists secureboot " \ |
| 399 | "&& sf read $kernelheader_addr_r $kernelheader_addr " \ |
| 400 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ |
| 401 | "bootm $load_addr#$BOARD\0" \ |
| 402 | "sd_bootcmd=echo Trying load from sd card..;" \ |
| 403 | "mmcinfo; mmc read $load_addr " \ |
| 404 | "$kernel_addr_sd $kernel_size_sd ;" \ |
| 405 | "env exists secureboot && mmc read $kernelheader_addr_r "\ |
| 406 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ |
| 407 | " && esbc_validate ${kernelheader_addr_r};" \ |
| 408 | "bootm $load_addr#$BOARD\0" |
| 409 | #else |
| 410 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 411 | "BOARD=ls1088ardb\0" \ |
| 412 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ |
| 413 | "ramdisk_addr=0x800000\0" \ |
| 414 | "ramdisk_size=0x2000000\0" \ |
| 415 | "fdt_high=0xa0000000\0" \ |
| 416 | "initrd_high=0xffffffffffffffff\0" \ |
| 417 | "fdt_addr=0x64f00000\0" \ |
| 418 | "kernel_addr=0x1000000\0" \ |
| 419 | "kernel_addr_sd=0x8000\0" \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 420 | "kernelhdr_addr_sd=0x3000\0" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 421 | "kernel_start=0x580100000\0" \ |
| 422 | "kernelheader_start=0x580800000\0" \ |
| 423 | "scriptaddr=0x80000000\0" \ |
| 424 | "scripthdraddr=0x80080000\0" \ |
| 425 | "fdtheader_addr_r=0x80100000\0" \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 426 | "kernelheader_addr=0x600000\0" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 427 | "kernelheader_addr_r=0x80200000\0" \ |
| 428 | "kernel_addr_r=0x81000000\0" \ |
| 429 | "kernelheader_size=0x40000\0" \ |
| 430 | "fdt_addr_r=0x90000000\0" \ |
| 431 | "load_addr=0xa0000000\0" \ |
| 432 | "kernel_size=0x2800000\0" \ |
| 433 | "kernel_size_sd=0x14000\0" \ |
Udit Agarwal | 11e1a57 | 2019-11-20 08:49:06 +0000 | [diff] [blame] | 434 | "kernelhdr_size_sd=0x20\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 435 | MC_INIT_CMD \ |
| 436 | BOOTENV \ |
| 437 | "boot_scripts=ls1088ardb_boot.scr\0" \ |
| 438 | "boot_script_hdr=hdr_ls1088ardb_bs.out\0" \ |
| 439 | "scan_dev_for_boot_part=" \ |
| 440 | "part list ${devtype} ${devnum} devplist; " \ |
| 441 | "env exists devplist || setenv devplist 1; " \ |
| 442 | "for distro_bootpart in ${devplist}; do " \ |
| 443 | "if fstype ${devtype} " \ |
| 444 | "${devnum}:${distro_bootpart} " \ |
| 445 | "bootfstype; then " \ |
| 446 | "run scan_dev_for_boot; " \ |
| 447 | "fi; " \ |
| 448 | "done\0" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 449 | "boot_a_script=" \ |
| 450 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 451 | "${scriptaddr} ${prefix}${script}; " \ |
| 452 | "env exists secureboot && load ${devtype} " \ |
| 453 | "${devnum}:${distro_bootpart} " \ |
| 454 | "${scripthdraddr} ${prefix}${boot_script_hdr} " \ |
| 455 | "&& esbc_validate ${scripthdraddr};" \ |
| 456 | "source ${scriptaddr}\0" \ |
| 457 | "installer=load mmc 0:2 $load_addr " \ |
| 458 | "/flex_installer_arm64.itb; " \ |
| 459 | "env exists mcinitcmd && run mcinitcmd && " \ |
Jagdish Gediya | 40febde | 2018-06-05 09:04:05 +0530 | [diff] [blame] | 460 | "mmc read 0x80001000 0x6800 0x800;" \ |
| 461 | "fsl_mc lazyapply dpl 0x80001000;" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 462 | "bootm $load_addr#ls1088ardb\0" \ |
| 463 | "qspi_bootcmd=echo Trying load from qspi..;" \ |
| 464 | "sf probe && sf read $load_addr " \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 465 | "$kernel_addr $kernel_size ; env exists secureboot " \ |
| 466 | "&& sf read $kernelheader_addr_r $kernelheader_addr " \ |
| 467 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 468 | "bootm $load_addr#$BOARD\0" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 469 | "sd_bootcmd=echo Trying load from sd card..;" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 470 | "mmcinfo; mmc read $load_addr " \ |
| 471 | "$kernel_addr_sd $kernel_size_sd ;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 472 | "env exists secureboot && mmc read $kernelheader_addr_r "\ |
| 473 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ |
| 474 | " && esbc_validate ${kernelheader_addr_r};" \ |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 475 | "bootm $load_addr#$BOARD\0" |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 476 | #endif /* CONFIG_TFABOOT */ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 477 | |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 478 | #undef CONFIG_BOOTCOMMAND |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 479 | #ifdef CONFIG_TFABOOT |
| 480 | #define QSPI_NOR_BOOTCOMMAND \ |
Udit Agarwal | 11e1a57 | 2019-11-20 08:49:06 +0000 | [diff] [blame] | 481 | "sf read 0x80001000 0xd00000 0x100000;" \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 482 | "env exists mcinitcmd && env exists secureboot " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 483 | " && sf read 0x806C0000 0x6C0000 0x100000 " \ |
| 484 | "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 485 | "&& fsl_mc lazyapply dpl 0x80001000;" \ |
| 486 | "run distro_bootcmd;run qspi_bootcmd;" \ |
| 487 | "env exists secureboot && esbc_halt;" |
| 488 | #define SD_BOOTCOMMAND \ |
| 489 | "env exists mcinitcmd && mmcinfo; " \ |
| 490 | "mmc read 0x80001000 0x6800 0x800; " \ |
| 491 | "env exists mcinitcmd && env exists secureboot " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 492 | " && mmc read 0x806C0000 0x3600 0x20 " \ |
| 493 | "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 494 | "&& fsl_mc lazyapply dpl 0x80001000;" \ |
| 495 | "run distro_bootcmd;run sd_bootcmd;" \ |
| 496 | "env exists secureboot && esbc_halt;" |
| 497 | #else |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 498 | #if defined(CONFIG_QSPI_BOOT) |
| 499 | /* Try to boot an on-QSPI kernel first, then do normal distro boot */ |
| 500 | #define CONFIG_BOOTCOMMAND \ |
Jagdish Gediya | 40febde | 2018-06-05 09:04:05 +0530 | [diff] [blame] | 501 | "sf read 0x80001000 0xd00000 0x100000;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 502 | "env exists mcinitcmd && env exists secureboot " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 503 | " && sf read 0x806C0000 0x6C0000 0x100000 " \ |
| 504 | "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ |
Jagdish Gediya | 40febde | 2018-06-05 09:04:05 +0530 | [diff] [blame] | 505 | "&& fsl_mc lazyapply dpl 0x80001000;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 506 | "run distro_bootcmd;run qspi_bootcmd;" \ |
| 507 | "env exists secureboot && esbc_halt;" |
| 508 | |
Ashish Kumar | 2e1fcf3 | 2017-11-06 13:19:28 +0530 | [diff] [blame] | 509 | /* Try to boot an on-SD kernel first, then do normal distro boot */ |
| 510 | #elif defined(CONFIG_SD_BOOT) |
| 511 | #define CONFIG_BOOTCOMMAND \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 512 | "env exists mcinitcmd && mmcinfo; " \ |
Jagdish Gediya | 40febde | 2018-06-05 09:04:05 +0530 | [diff] [blame] | 513 | "mmc read 0x80001000 0x6800 0x800; " \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 514 | "env exists mcinitcmd && env exists secureboot " \ |
Priyanka Singh | f745ae9 | 2020-01-22 10:32:34 +0000 | [diff] [blame] | 515 | " && mmc read 0x806C0000 0x3600 0x20 " \ |
| 516 | "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ |
Jagdish Gediya | 40febde | 2018-06-05 09:04:05 +0530 | [diff] [blame] | 517 | "&& fsl_mc lazyapply dpl 0x80001000;" \ |
Udit Agarwal | 09fd579 | 2017-11-22 09:01:26 +0530 | [diff] [blame] | 518 | "run distro_bootcmd;run sd_bootcmd;" \ |
| 519 | "env exists secureboot && esbc_halt;" |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 520 | #endif |
Pankit Garg | f5c2a83 | 2018-12-27 04:37:55 +0000 | [diff] [blame] | 521 | #endif /* CONFIG_TFABOOT */ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 522 | |
| 523 | /* MAC/PHY configuration */ |
| 524 | #ifdef CONFIG_FSL_MC_ENET |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 525 | #define AQ_PHY_ADDR1 0x00 |
| 526 | #define AQR105_IRQ_MASK 0x00000004 |
| 527 | |
| 528 | #define QSGMII1_PORT1_PHY_ADDR 0x0c |
| 529 | #define QSGMII1_PORT2_PHY_ADDR 0x0d |
| 530 | #define QSGMII1_PORT3_PHY_ADDR 0x0e |
| 531 | #define QSGMII1_PORT4_PHY_ADDR 0x0f |
| 532 | #define QSGMII2_PORT1_PHY_ADDR 0x1c |
| 533 | #define QSGMII2_PORT2_PHY_ADDR 0x1d |
| 534 | #define QSGMII2_PORT3_PHY_ADDR 0x1e |
| 535 | #define QSGMII2_PORT4_PHY_ADDR 0x1f |
| 536 | |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 537 | #define CONFIG_ETHPRIME "DPMAC1@xgmii" |
| 538 | #define CONFIG_PHY_GIGE |
| 539 | #endif |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 540 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 541 | |
| 542 | /* MMC */ |
| 543 | #ifdef CONFIG_MMC |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 544 | #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 |
| 545 | #endif |
| 546 | |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 547 | #ifndef SPL_NO_ENV |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 548 | |
| 549 | #define BOOT_TARGET_DEVICES(func) \ |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 550 | func(MMC, mmc, 0) \ |
Mian Yousaf Kaukab | 30a7a63 | 2019-01-29 16:38:32 +0100 | [diff] [blame] | 551 | func(SCSI, scsi, 0) \ |
| 552 | func(DHCP, dhcp, na) |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 553 | #include <config_distro_bootcmd.h> |
Sumit Garg | 08da8b2 | 2018-01-06 09:04:24 +0530 | [diff] [blame] | 554 | #endif |
Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame] | 555 | |
| 556 | #include <asm/fsl_secure_boot.h> |
| 557 | |
| 558 | #endif /* __LS1088A_RDB_H */ |