blob: 28c9efa3a2e0714e7df9d04ef44a3dad9f303bb8 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simek952d5142007-03-11 13:42:58 +01002/*
Michal Simek4e39ea82018-07-13 08:26:28 +02003 * (C) Copyright 2007-2018 Michal Simek
Michal Simek952d5142007-03-11 13:42:58 +01004 *
Michal Simek4e39ea82018-07-13 08:26:28 +02005 * Michal SIMEK <monstr@monstr.eu>
Michal Simek952d5142007-03-11 13:42:58 +01006 */
7
Shreenidhi Shediffced402018-07-15 02:34:35 +05308/*
9 * This is a board specific file. It's OK to include board specific
10 * header files
11 */
Michal Simek952d5142007-03-11 13:42:58 +010012
13#include <common.h>
Michal Simekdda9bd82007-03-30 22:52:09 +020014#include <config.h>
Michal Simek4e39ea82018-07-13 08:26:28 +020015#include <dm.h>
16#include <dm/lists.h>
Michal Simek65e915c2014-05-08 16:08:44 +020017#include <fdtdec.h>
Michal Simek9cabb362012-07-04 13:12:37 +020018#include <asm/processor.h>
Michal Simek9c817f82007-05-07 19:33:51 +020019#include <asm/microblaze_intc.h>
20#include <asm/asm.h>
Michal Simek23ccda02013-04-24 10:01:20 +020021#include <asm/gpio.h>
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053022#include <dm/uclass.h>
23#include <wdt.h>
Michal Simek23ccda02013-04-24 10:01:20 +020024
Michal Simek65e915c2014-05-08 16:08:44 +020025DECLARE_GLOBAL_DATA_PTR;
26
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053027#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
Stefan Roesef3170d12019-04-03 09:12:48 +020028static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053029#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
30
Michal Simek65e915c2014-05-08 16:08:44 +020031ulong ram_base;
32
Simon Glass2f949c32017-03-31 08:40:32 -060033int dram_init_banksize(void)
Michal Simek65e915c2014-05-08 16:08:44 +020034{
Michal Simekfdf3d802018-11-22 12:39:18 +010035 return fdtdec_setup_memory_banksize();
Michal Simek65e915c2014-05-08 16:08:44 +020036}
37
38int dram_init(void)
39{
Michal Simekfdf3d802018-11-22 12:39:18 +010040 if (fdtdec_setup_mem_size_base() != 0)
41 return -EINVAL;
Michal Simek65e915c2014-05-08 16:08:44 +020042
43 return 0;
44};
Michal Simek65e915c2014-05-08 16:08:44 +020045
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053046#ifdef CONFIG_WDT
47/* Called by macro WATCHDOG_RESET */
48void watchdog_reset(void)
49{
50#if !defined(CONFIG_SPL_BUILD)
51 ulong now;
52 static ulong next_reset;
53
54 if (!watchdog_dev)
55 return;
56
57 now = timer_get_us();
58
59 /* Do not reset the watchdog too often */
60 if (now > next_reset) {
61 wdt_reset(watchdog_dev);
62 next_reset = now + 1000;
63 }
64#endif /* !CONFIG_SPL_BUILD */
65}
66#endif /* CONFIG_WDT */
Michal Simek9c817f82007-05-07 19:33:51 +020067
Michal Simek01525242015-12-11 15:01:28 +010068int board_late_init(void)
Michal Simek9cabb362012-07-04 13:12:37 +020069{
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053070#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
71 watchdog_dev = NULL;
72
73 if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
74 debug("Watchdog: Not found by seq!\n");
75 if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
76 puts("Watchdog: Not found!\n");
77 return 0;
78 }
79 }
80
81 wdt_start(watchdog_dev, 0, 0);
82 puts("Watchdog: Started\n");
83#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
Michal Simek4e39ea82018-07-13 08:26:28 +020084#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE)
85 int ret;
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053086
Michal Simek4e39ea82018-07-13 08:26:28 +020087 ret = device_bind_driver(gd->dm_root, "mb_soft_reset",
88 "reset_soft", NULL);
89 if (ret)
90 printf("Warning: No reset driver: ret=%d\n", ret);
91#endif
Michal Simek01525242015-12-11 15:01:28 +010092 return 0;
Michal Simek9cabb362012-07-04 13:12:37 +020093}