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git01.mediatek.com / filogic / uboot / 5cc21189c829d93242f14518b83f2e890b27d12b / . / arch / arm / dts / tegra210-p2571.dts
blob: 16370c596e07e5316789afa3bda06e6750e17322 [file] [log] [blame]
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]1/dts-v1/;
2
3#include "tegra210.dtsi"
4
5/ {
6 model = "NVIDIA P2571";
7 compatible = "nvidia,p2571", "nvidia,tegra210";
8
9 chosen {
10 stdout-path = &uarta;
11 };
12
13 aliases {
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
17 i2c3 = "/i2c@7000c500";
18 i2c4 = "/i2c@7000c700";
19 i2c5 = "/i2c@7000d100";
20 mmc0 = "/sdhci@700b0600";
21 mmc1 = "/sdhci@700b0000";
22 spi0 = "/spi@7000d400";
23 spi1 = "/spi@7000da00";
24 spi2 = "/spi@70410000";
25 usb0 = "/usb@7d000000";
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]26 };
27
28 memory {
29 reg = <0x0 0x80000000 0x0 0xc0000000>;
30 };
31
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]32 i2c@7000c000 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]33 status = "okay";
34 clock-frequency = <100000>;
35 };
36
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]37 i2c@7000c400 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]38 status = "okay";
39 clock-frequency = <100000>;
40 };
41
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]42 i2c@7000c500 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]43 status = "okay";
44 clock-frequency = <100000>;
45 };
46
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]47 i2c@7000c700 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]48 status = "okay";
49 clock-frequency = <100000>;
50 };
51
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]52 i2c@7000d000 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]53 status = "okay";
54 clock-frequency = <400000>;
55 };
56
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]57 i2c@7000d100 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]58 status = "okay";
59 clock-frequency = <400000>;
60 };
61
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]62 spi@7000d400 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]63 status = "okay";
64 spi-max-frequency = <25000000>;
65 };
66
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]67 spi@7000da00 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]68 status = "okay";
69 spi-max-frequency = <25000000>;
70 };
71
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]72 spi@70410000 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]73 status = "okay";
74 spi-max-frequency = <24000000>;
75 };
76
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]77 sdhci@700b0000 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]78 status = "okay";
79 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
80 power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
81 bus-width = <4>;
82 };
83
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]84 sdhci@700b0600 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]85 status = "okay";
86 bus-width = <8>;
Tom Warren1c77f022016-09-13 10:45:42 -0600[diff] [blame]87 non-removable;
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]88 };
89
Stephen Warren68555202016-09-13 10:45:49 -0600[diff] [blame]90 usb@7d000000 {
Tom Warren2955ece2015-02-13 14:39:53 -0700[diff] [blame]91 status = "okay";
92 dr_mode = "otg";
93 };
94
95 clocks {
96 compatible = "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 clk32k_in: clock@0 {
101 compatible = "fixed-clock";
102 reg = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <32768>;
105 };
106 };
107};
Simon Glass2a00cc92017-06-12 06:22:01 -0600[diff] [blame]108
109&uarta {
110 status = "okay";
111};