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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ben Whitten7b8f9af2017-11-23 13:47:47 +00002/*
3 * Configuation settings for the WB45N CPU Module.
Ben Whitten7b8f9af2017-11-23 13:47:47 +00004 */
5
6#ifndef __CONFIG_H__
7#define __CONFIG_H__
8
9#include <asm/hardware.h>
Simon Glassfb64e362020-05-10 11:40:09 -060010#include <linux/stringify.h>
Ben Whitten7b8f9af2017-11-23 13:47:47 +000011
Ben Whitten7b8f9af2017-11-23 13:47:47 +000012/* ARM asynchronous clock */
13#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
14#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
15
16#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17#define CONFIG_SETUP_MEMORY_TAGS
18#define CONFIG_INITRD_TAG
19#define CONFIG_SKIP_LOWLEVEL_INIT
20
21/* general purpose I/O */
22#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000023
24/* serial console */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000025#define CONFIG_USART_BASE ATMEL_BASE_DBGU
26#define CONFIG_USART_ID ATMEL_ID_SYS
27
28/*
29 * BOOTP options
30 */
31#define CONFIG_BOOTP_BOOTFILESIZE
Ben Whitten7b8f9af2017-11-23 13:47:47 +000032
33/* SDRAM */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000034#define CONFIG_SYS_SDRAM_BASE 0x20000000
35#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
36
37#define CONFIG_SYS_INIT_SP_ADDR \
38 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
39
40/* NAND flash */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000041#define CONFIG_SYS_MAX_NAND_DEVICE 1
42#define CONFIG_SYS_NAND_BASE 0x40000000
43/* our ALE is AD21 */
44#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
45/* our CLE is AD22 */
46#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
47#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
48#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
49
Ben Whitten7b8f9af2017-11-23 13:47:47 +000050#define CONFIG_RBTREE
Ben Whitten7b8f9af2017-11-23 13:47:47 +000051
52/* Ethernet */
53#define CONFIG_MACB
54#define CONFIG_RMII
55#define CONFIG_NET_RETRY_COUNT 20
56#define CONFIG_MACB_SEARCH_PHY
57#define CONFIG_ETHADDR C0:EE:40:00:00:00
58#define CONFIG_ENV_OVERWRITE 1
59
60/* System */
61#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000062
63#ifdef CONFIG_SYS_USE_NANDFLASH
64/* bootstrap + u-boot + env + linux in nandflash */
Ben Whitten7b8f9af2017-11-23 13:47:47 +000065
66#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
67 "run _mtd; bootm"
68
69#define MTDIDS_DEFAULT "nand0=atmel_nand"
70#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
71 "128K(at91bs)," \
72 "512K(u-boot)," \
73 "128K(u-boot-env)," \
74 "128K(redund-env)," \
75 "2560K(kernel-a)," \
76 "2560K(kernel-b)," \
77 "38912K(rootfs-a)," \
78 "38912K(rootfs-b)," \
79 "46208K(user)," \
80 "512K(logs)"
81
82#else
83#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
84#endif
85
Ben Whitten7b8f9af2017-11-23 13:47:47 +000086#define CONFIG_EXTRA_ENV_SETTINGS \
87 "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
88 "autoload=no\0" \
89 "autostart=no\0" \
90 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
91 "\0"
92
93#define CONFIG_SYS_CBSIZE 256
94#define CONFIG_SYS_MAXARGS 16
Ben Whitten7b8f9af2017-11-23 13:47:47 +000095
96/*
97 * Size of malloc() pool
98 */
99#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
100
101/* SPL */
Ben Whitten7b8f9af2017-11-23 13:47:47 +0000102#define CONFIG_SPL_MAX_SIZE 0x6000
103#define CONFIG_SPL_STACK 0x308000
104
105#define CONFIG_SPL_BSS_START_ADDR 0x20000000
106#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
107#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
108#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
109
110#define CONFIG_SYS_MONITOR_LEN (512 << 10)
111
112#define CONFIG_SYS_MASTER_CLOCK 132096000
113#define CONFIG_SYS_AT91_PLLA 0x20c73f03
114#define CONFIG_SYS_MCKR 0x1301
115#define CONFIG_SYS_MCKR_CSS 0x1302
116
117#define CONFIG_SPL_NAND_DRIVERS
118#define CONFIG_SPL_NAND_BASE
119#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
120#define CONFIG_SYS_NAND_5_ADDR_CYCLE
121#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
122#define CONFIG_SYS_NAND_PAGE_COUNT 64
123#define CONFIG_SYS_NAND_OOBSIZE 64
124#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
125#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
Ben Whitten7b8f9af2017-11-23 13:47:47 +0000126
127#endif /* __CONFIG_H__ */