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wdenk214ec6b2001-10-08 19:18:17 +00001/*----------------------------------------------------------------------------+
2|
wdenk5256def2003-09-18 10:45:21 +00003| This source code has been made available to you by IBM on an AS-IS
4| basis. Anyone receiving this source is licensed under IBM
5| copyrights to use it in any way he or she deems fit, including
6| copying it, modifying it, compiling it, and redistributing it either
7| with or without modifications. No license under IBM patents or
8| patent applications is to be implied by the copyright license.
wdenk214ec6b2001-10-08 19:18:17 +00009|
wdenk5256def2003-09-18 10:45:21 +000010| Any user of this software should understand that IBM cannot provide
11| technical support for this software and will not be responsible for
12| any consequences resulting from the use of this software.
wdenk214ec6b2001-10-08 19:18:17 +000013|
wdenk5256def2003-09-18 10:45:21 +000014| Any person who transfers this source code or any derivative work
15| must include the IBM copyright notice, this paragraph, and the
16| preceding two paragraphs in the transferred software.
wdenk214ec6b2001-10-08 19:18:17 +000017|
wdenk5256def2003-09-18 10:45:21 +000018| COPYRIGHT I B M CORPORATION 1999
19| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
wdenk214ec6b2001-10-08 19:18:17 +000020+----------------------------------------------------------------------------*/
21/*----------------------------------------------------------------------------+
22|
wdenk5256def2003-09-18 10:45:21 +000023| File Name: miiphy.h
wdenk214ec6b2001-10-08 19:18:17 +000024|
wdenk5256def2003-09-18 10:45:21 +000025| Function: Include file defining PHY registers.
wdenk214ec6b2001-10-08 19:18:17 +000026|
wdenk5256def2003-09-18 10:45:21 +000027| Author: Mark Wisner
wdenk214ec6b2001-10-08 19:18:17 +000028|
wdenk214ec6b2001-10-08 19:18:17 +000029+----------------------------------------------------------------------------*/
30#ifndef _miiphy_h_
31#define _miiphy_h_
32
Marian Balakowiczaab8c492005-10-28 22:30:33 +020033#include <net.h>
wdenk214ec6b2001-10-08 19:18:17 +000034
Larry Johnson81b974b2007-10-31 11:21:29 -050035int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
36 unsigned short *value);
37int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
38 unsigned short value);
39int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
40 unsigned char *model, unsigned char *rev);
41int miiphy_reset (char *devname, unsigned char addr);
42int miiphy_speed (char *devname, unsigned char addr);
43int miiphy_duplex (char *devname, unsigned char addr);
Larry Johnson966a80b2007-11-01 08:46:50 -050044int miiphy_is_1000base_x (char *devname, unsigned char addr);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Larry Johnson81b974b2007-10-31 11:21:29 -050046int miiphy_link (char *devname, unsigned char addr);
wdenk49c3f672003-10-08 22:33:00 +000047#endif
wdenk214ec6b2001-10-08 19:18:17 +000048
Larry Johnson81b974b2007-10-31 11:21:29 -050049void miiphy_init (void);
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010050
Larry Johnson81b974b2007-10-31 11:21:29 -050051void miiphy_register (char *devname,
52 int (*read) (char *devname, unsigned char addr,
53 unsigned char reg, unsigned short *value),
54 int (*write) (char *devname, unsigned char addr,
55 unsigned char reg, unsigned short value));
Marian Balakowiczaab8c492005-10-28 22:30:33 +020056
Larry Johnson81b974b2007-10-31 11:21:29 -050057int miiphy_set_current_dev (char *devname);
58char *miiphy_get_current_dev (void);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020059
Larry Johnson81b974b2007-10-31 11:21:29 -050060void miiphy_listdev (void);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020061
62#define BB_MII_DEVNAME "bbmii"
63
64int bb_miiphy_read (char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050065 unsigned char reg, unsigned short *value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020066int bb_miiphy_write (char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050067 unsigned char reg, unsigned short value);
wdenk214ec6b2001-10-08 19:18:17 +000068
69/* phy seed setup */
wdenk5256def2003-09-18 10:45:21 +000070#define AUTO 99
Larry Johnson81b974b2007-10-31 11:21:29 -050071#define _1000BASET 1000
wdenk5256def2003-09-18 10:45:21 +000072#define _100BASET 100
73#define _10BASET 10
74#define HALF 22
75#define FULL 44
wdenk214ec6b2001-10-08 19:18:17 +000076
77/* phy register offsets */
wdenk5256def2003-09-18 10:45:21 +000078#define PHY_BMCR 0x00
wdenk214ec6b2001-10-08 19:18:17 +000079#define PHY_BMSR 0x01
wdenk5256def2003-09-18 10:45:21 +000080#define PHY_PHYIDR1 0x02
81#define PHY_PHYIDR2 0x03
wdenk214ec6b2001-10-08 19:18:17 +000082#define PHY_ANAR 0x04
wdenk5256def2003-09-18 10:45:21 +000083#define PHY_ANLPAR 0x05
wdenk214ec6b2001-10-08 19:18:17 +000084#define PHY_ANER 0x06
wdenk5256def2003-09-18 10:45:21 +000085#define PHY_ANNPTR 0x07
Larry Johnson81b974b2007-10-31 11:21:29 -050086#define PHY_ANLPNP 0x08
87#define PHY_1000BTCR 0x09
88#define PHY_1000BTSR 0x0A
Larry Johnson966a80b2007-11-01 08:46:50 -050089#define PHY_EXSR 0x0F
wdenk5256def2003-09-18 10:45:21 +000090#define PHY_PHYSTS 0x10
91#define PHY_MIPSCR 0x11
92#define PHY_MIPGSR 0x12
93#define PHY_DCR 0x13
wdenk214ec6b2001-10-08 19:18:17 +000094#define PHY_FCSCR 0x14
95#define PHY_RECR 0x15
96#define PHY_PCSR 0x16
wdenk5256def2003-09-18 10:45:21 +000097#define PHY_LBR 0x17
98#define PHY_10BTSCR 0x18
99#define PHY_PHYCTRL 0x19
wdenk214ec6b2001-10-08 19:18:17 +0000100
101/* PHY BMCR */
wdenk5256def2003-09-18 10:45:21 +0000102#define PHY_BMCR_RESET 0x8000
103#define PHY_BMCR_LOOP 0x4000
wdenk214ec6b2001-10-08 19:18:17 +0000104#define PHY_BMCR_100MB 0x2000
105#define PHY_BMCR_AUTON 0x1000
106#define PHY_BMCR_POWD 0x0800
107#define PHY_BMCR_ISO 0x0400
108#define PHY_BMCR_RST_NEG 0x0200
109#define PHY_BMCR_DPLX 0x0100
110#define PHY_BMCR_COL_TST 0x0080
111
Larry Johnson81b974b2007-10-31 11:21:29 -0500112#define PHY_BMCR_SPEED_MASK 0x2040
113#define PHY_BMCR_1000_MBPS 0x0040
114#define PHY_BMCR_100_MBPS 0x2000
115#define PHY_BMCR_10_MBPS 0x0000
wdenk656140b2004-04-25 13:18:40 +0000116
wdenk214ec6b2001-10-08 19:18:17 +0000117/* phy BMSR */
118#define PHY_BMSR_100T4 0x8000
119#define PHY_BMSR_100TXF 0x4000
120#define PHY_BMSR_100TXH 0x2000
121#define PHY_BMSR_10TF 0x1000
122#define PHY_BMSR_10TH 0x0800
Larry Johnson966a80b2007-11-01 08:46:50 -0500123#define PHY_BMSR_EXT_STAT 0x0100
wdenk214ec6b2001-10-08 19:18:17 +0000124#define PHY_BMSR_PRE_SUP 0x0040
125#define PHY_BMSR_AUTN_COMP 0x0020
126#define PHY_BMSR_RF 0x0010
127#define PHY_BMSR_AUTN_ABLE 0x0008
128#define PHY_BMSR_LS 0x0004
129#define PHY_BMSR_JD 0x0002
130#define PHY_BMSR_EXT 0x0001
131
132/*phy ANLPAR */
133#define PHY_ANLPAR_NP 0x8000
134#define PHY_ANLPAR_ACK 0x4000
wdenk5256def2003-09-18 10:45:21 +0000135#define PHY_ANLPAR_RF 0x2000
Larry Johnson966a80b2007-11-01 08:46:50 -0500136#define PHY_ANLPAR_ASYMP 0x0800
137#define PHY_ANLPAR_PAUSE 0x0400
wdenk5256def2003-09-18 10:45:21 +0000138#define PHY_ANLPAR_T4 0x0200
139#define PHY_ANLPAR_TXFD 0x0100
140#define PHY_ANLPAR_TX 0x0080
wdenk214ec6b2001-10-08 19:18:17 +0000141#define PHY_ANLPAR_10FD 0x0040
wdenk5256def2003-09-18 10:45:21 +0000142#define PHY_ANLPAR_10 0x0020
Larry Johnson81b974b2007-10-31 11:21:29 -0500143#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
Larry Johnson966a80b2007-11-01 08:46:50 -0500144/* phy ANLPAR 1000BASE-X */
145#define PHY_X_ANLPAR_NP 0x8000
146#define PHY_X_ANLPAR_ACK 0x4000
147#define PHY_X_ANLPAR_RF_MASK 0x3000
148#define PHY_X_ANLPAR_PAUSE_MASK 0x0180
149#define PHY_X_ANLPAR_HD 0x0040
150#define PHY_X_ANLPAR_FD 0x0020
wdenked2ac4b2004-03-14 18:23:55 +0000151
Larry Johnson81b974b2007-10-31 11:21:29 -0500152#define PHY_ANLPAR_PSB_MASK 0x001f
153#define PHY_ANLPAR_PSB_802_3 0x0001
154#define PHY_ANLPAR_PSB_802_9 0x0002
wdenk656140b2004-04-25 13:18:40 +0000155
Larry Johnson966a80b2007-11-01 08:46:50 -0500156/* phy 1000BTCR */
157#define PHY_1000BTCR_1000FD 0x0200
158#define PHY_1000BTCR_1000HD 0x0100
159
Larry Johnson81b974b2007-10-31 11:21:29 -0500160/* phy 1000BTSR */
161#define PHY_1000BTSR_MSCF 0x8000
162#define PHY_1000BTSR_MSCR 0x4000
163#define PHY_1000BTSR_LRS 0x2000
164#define PHY_1000BTSR_RRS 0x1000
165#define PHY_1000BTSR_1000FD 0x0800
166#define PHY_1000BTSR_1000HD 0x0400
wdenked2ac4b2004-03-14 18:23:55 +0000167
Larry Johnson966a80b2007-11-01 08:46:50 -0500168/* phy EXSR */
169#define PHY_EXSR_1000XF 0x8000
170#define PHY_EXSR_1000XH 0x4000
171#define PHY_EXSR_1000TF 0x2000
172#define PHY_EXSR_1000TH 0x1000
173
wdenk214ec6b2001-10-08 19:18:17 +0000174#endif