blob: c08969d8c971f6ad56844826ff8334347048c257 [file] [log] [blame]
Thomas Chou3a673f12010-04-30 11:34:16 +08001/*
2 * Altera SPI driver
3 *
4 * based on bfin_spi.c
5 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
7 *
Jagannadha Sutradharudu Tekid92799e2013-10-14 13:31:24 +05308 * SPDX-License-Identifier: GPL-2.0+
Thomas Chou3a673f12010-04-30 11:34:16 +08009 */
10#include <common.h>
11#include <asm/io.h>
12#include <malloc.h>
13#include <spi.h>
14
Marek Vasut42066022014-10-22 21:55:58 +020015struct altera_spi_regs {
16 u32 rxdata;
17 u32 txdata;
18 u32 status;
19 u32 control;
20 u32 _reserved;
21 u32 slave_sel;
22};
Thomas Chou3a673f12010-04-30 11:34:16 +080023
Marek Vasut470dc3d2014-10-22 21:55:59 +020024#define ALTERA_SPI_STATUS_ROE_MSK (1 << 3)
25#define ALTERA_SPI_STATUS_TOE_MSK (1 << 4)
26#define ALTERA_SPI_STATUS_TMT_MSK (1 << 5)
27#define ALTERA_SPI_STATUS_TRDY_MSK (1 << 6)
28#define ALTERA_SPI_STATUS_RRDY_MSK (1 << 7)
29#define ALTERA_SPI_STATUS_E_MSK (1 << 8)
Thomas Chou3a673f12010-04-30 11:34:16 +080030
Marek Vasut470dc3d2014-10-22 21:55:59 +020031#define ALTERA_SPI_CONTROL_IROE_MSK (1 << 3)
32#define ALTERA_SPI_CONTROL_ITOE_MSK (1 << 4)
33#define ALTERA_SPI_CONTROL_ITRDY_MSK (1 << 6)
34#define ALTERA_SPI_CONTROL_IRRDY_MSK (1 << 7)
35#define ALTERA_SPI_CONTROL_IE_MSK (1 << 8)
36#define ALTERA_SPI_CONTROL_SSO_MSK (1 << 10)
Thomas Chou3a673f12010-04-30 11:34:16 +080037
38#ifndef CONFIG_SYS_ALTERA_SPI_LIST
39#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
40#endif
41
42static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
43
44struct altera_spi_slave {
Marek Vasut42066022014-10-22 21:55:58 +020045 struct spi_slave slave;
46 struct altera_spi_regs *regs;
Thomas Chou3a673f12010-04-30 11:34:16 +080047};
48#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
49
Marek Vasuta49ffc32014-10-22 21:56:00 +020050__weak int spi_cs_is_valid(unsigned int bus, unsigned int cs)
Thomas Chou3a673f12010-04-30 11:34:16 +080051{
52 return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
53}
54
Marek Vasuta49ffc32014-10-22 21:56:00 +020055__weak void spi_cs_activate(struct spi_slave *slave)
Thomas Chou3a673f12010-04-30 11:34:16 +080056{
57 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
Marek Vasut42066022014-10-22 21:55:58 +020058 writel(1 << slave->cs, &altspi->regs->slave_sel);
59 writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control);
Thomas Chou3a673f12010-04-30 11:34:16 +080060}
61
Marek Vasuta49ffc32014-10-22 21:56:00 +020062__weak void spi_cs_deactivate(struct spi_slave *slave)
Thomas Chou3a673f12010-04-30 11:34:16 +080063{
64 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
Marek Vasut42066022014-10-22 21:55:58 +020065 writel(0, &altspi->regs->control);
66 writel(0, &altspi->regs->slave_sel);
Thomas Chou3a673f12010-04-30 11:34:16 +080067}
68
69void spi_init(void)
70{
71}
72
Thomas Chou55be2b52010-12-27 09:30:17 +080073void spi_set_speed(struct spi_slave *slave, uint hz)
74{
75 /* altera spi core does not support programmable speed */
76}
77
Thomas Chou3a673f12010-04-30 11:34:16 +080078struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
79 unsigned int max_hz, unsigned int mode)
80{
81 struct altera_spi_slave *altspi;
82
83 if (!spi_cs_is_valid(bus, cs))
84 return NULL;
85
Simon Glassd034a952013-03-18 19:23:40 +000086 altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs);
Thomas Chou3a673f12010-04-30 11:34:16 +080087 if (!altspi)
88 return NULL;
89
Marek Vasut42066022014-10-22 21:55:58 +020090 altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus];
Marek Vasuta49ffc32014-10-22 21:56:00 +020091 debug("%s: bus:%i cs:%i base:%p\n", __func__, bus, cs, altspi->regs);
Thomas Chou3a673f12010-04-30 11:34:16 +080092
93 return &altspi->slave;
94}
95
96void spi_free_slave(struct spi_slave *slave)
97{
98 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
99 free(altspi);
100}
101
102int spi_claim_bus(struct spi_slave *slave)
103{
104 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
105
106 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
Marek Vasut42066022014-10-22 21:55:58 +0200107 writel(0, &altspi->regs->control);
108 writel(0, &altspi->regs->slave_sel);
Thomas Chou3a673f12010-04-30 11:34:16 +0800109 return 0;
110}
111
112void spi_release_bus(struct spi_slave *slave)
113{
114 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
115
116 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
Marek Vasut42066022014-10-22 21:55:58 +0200117 writel(0, &altspi->regs->slave_sel);
Thomas Chou3a673f12010-04-30 11:34:16 +0800118}
119
120#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
121# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
122#endif
123
124int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
125 void *din, unsigned long flags)
126{
127 struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
128 /* assume spi core configured to do 8 bit transfers */
Marek Vasut5c97e302014-10-22 21:56:02 +0200129 unsigned int bytes = bitlen / 8;
130 const unsigned char *txp = dout;
131 unsigned char *rxp = din;
132 uint32_t reg, data, start;
Thomas Chou3a673f12010-04-30 11:34:16 +0800133
134 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
Marek Vasuta49ffc32014-10-22 21:56:00 +0200135 slave->bus, slave->cs, bitlen, bytes, flags);
136
Thomas Chou3a673f12010-04-30 11:34:16 +0800137 if (bitlen == 0)
138 goto done;
139
140 if (bitlen % 8) {
141 flags |= SPI_XFER_END;
142 goto done;
143 }
144
145 /* empty read buffer */
Marek Vasut42066022014-10-22 21:55:58 +0200146 if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
147 readl(&altspi->regs->rxdata);
Marek Vasuta49ffc32014-10-22 21:56:00 +0200148
Thomas Chou3a673f12010-04-30 11:34:16 +0800149 if (flags & SPI_XFER_BEGIN)
150 spi_cs_activate(slave);
151
152 while (bytes--) {
Marek Vasut5c97e302014-10-22 21:56:02 +0200153 if (txp)
154 data = *txp++;
155 else
156 data = CONFIG_ALTERA_SPI_IDLE_VAL;
Marek Vasuta49ffc32014-10-22 21:56:00 +0200157
Marek Vasut5c97e302014-10-22 21:56:02 +0200158 debug("%s: tx:%x ", __func__, data);
159 writel(data, &altspi->regs->txdata);
Marek Vasuta49ffc32014-10-22 21:56:00 +0200160
Marek Vasutec6938e2014-10-22 21:56:01 +0200161 start = get_timer(0);
162 while (1) {
163 reg = readl(&altspi->regs->status);
164 if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
165 break;
166 if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
167 printf("%s: Transmission timed out!\n", __func__);
168 goto done;
169 }
170 }
Marek Vasuta49ffc32014-10-22 21:56:00 +0200171
Marek Vasut5c97e302014-10-22 21:56:02 +0200172 data = readl(&altspi->regs->rxdata);
Thomas Chou3a673f12010-04-30 11:34:16 +0800173 if (rxp)
Marek Vasut5c97e302014-10-22 21:56:02 +0200174 *rxp++ = data & 0xff;
Marek Vasuta49ffc32014-10-22 21:56:00 +0200175
Marek Vasut5c97e302014-10-22 21:56:02 +0200176 debug("rx:%x\n", data);
Thomas Chou3a673f12010-04-30 11:34:16 +0800177 }
Marek Vasuta49ffc32014-10-22 21:56:00 +0200178
179done:
Thomas Chou3a673f12010-04-30 11:34:16 +0800180 if (flags & SPI_XFER_END)
181 spi_cs_deactivate(slave);
182
183 return 0;
184}