blob: 557e21f8199eb9e9f8d8180f51c0ac69de56f467 [file] [log] [blame]
Andy Yanb5e16302019-11-14 11:21:12 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
4 */
5
Andy Yanb5e16302019-11-14 11:21:12 +08006#include <dm.h>
7#include <syscon.h>
8#include <asm/arch-rockchip/clock.h>
Jonas Karlman0333e3b2024-04-08 18:14:11 +00009#include <asm/arch-rockchip/cru_rk3308.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070010#include <linux/err.h>
Andy Yanb5e16302019-11-14 11:21:12 +080011
12int rockchip_get_clk(struct udevice **devp)
13{
14 return uclass_get_device_by_driver(UCLASS_CLK,
Simon Glass65130cd2020-12-28 20:34:56 -070015 DM_DRIVER_GET(rockchip_rk3308_cru), devp);
Andy Yanb5e16302019-11-14 11:21:12 +080016}
17
18void *rockchip_get_cru(void)
19{
20 struct rk3308_clk_priv *priv;
21 struct udevice *dev;
22 int ret;
23
24 ret = rockchip_get_clk(&dev);
25 if (ret)
26 return ERR_PTR(ret);
27
28 priv = dev_get_priv(dev);
29
30 return priv->cru;
31}