| Marek Vasut | b4f34ae | 2024-09-29 01:52:35 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (C) 2023-2024 Marek Vasut <marex@denx.de> |
| 4 | * |
| 5 | * DHCOM iMX8MP variant: |
| 6 | * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E-SD-RTC-T-RGB-I-01D2 |
| 7 | * DHCOM PCB number: 660-200 or newer |
| 8 | * PicoITX PCB number: 487-600 or newer |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | #include <dt-bindings/leds/common.h> |
| 14 | #include "imx8mp-dhcom-som.dtsi" |
| 15 | |
| 16 | / { |
| 17 | model = "DH electronics i.MX8M Plus DHCOM PicoITX"; |
| 18 | compatible = "dh,imx8mp-dhcom-picoitx", "dh,imx8mp-dhcom-som", |
| 19 | "fsl,imx8mp"; |
| 20 | |
| 21 | chosen { |
| 22 | stdout-path = &uart1; |
| 23 | }; |
| 24 | |
| 25 | led { |
| 26 | compatible = "gpio-leds"; |
| 27 | |
| 28 | led-0 { |
| 29 | color = <LED_COLOR_ID_YELLOW>; |
| 30 | default-state = "off"; |
| 31 | function = LED_FUNCTION_INDICATOR; |
| 32 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */ |
| 33 | pinctrl-0 = <&pinctrl_dhcom_i>; |
| 34 | pinctrl-names = "default"; |
| 35 | }; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | &eqos { /* First ethernet */ |
| 40 | pinctrl-0 = <&pinctrl_eqos_rmii>; |
| 41 | phy-handle = <ðphy0f>; |
| 42 | phy-mode = "rmii"; |
| 43 | |
| 44 | assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, |
| 45 | <&clk IMX8MP_SYS_PLL2_100M>, |
| 46 | <&clk IMX8MP_SYS_PLL2_50M>; |
| 47 | assigned-clock-rates = <0>, <100000000>, <50000000>; |
| 48 | }; |
| 49 | |
| 50 | ðphy0g { /* Micrel KSZ9131RNXI */ |
| 51 | status = "disabled"; |
| 52 | }; |
| 53 | |
| 54 | ðphy0f { /* SMSC LAN8740Ai */ |
| 55 | status = "okay"; |
| 56 | }; |
| 57 | |
| 58 | &fec { |
| 59 | status = "disabled"; |
| 60 | }; |
| 61 | |
| 62 | &flexcan1 { |
| 63 | status = "okay"; |
| 64 | }; |
| 65 | |
| 66 | &gpio1 { |
| 67 | gpio-line-names = |
| 68 | "DHCOM-G", "", "", "", |
| 69 | "", "DHCOM-I", "PicoITX-HW0", "PicoITX-HW2", |
| 70 | "DHCOM-B", "DHCOM-A", "", "DHCOM-H", "", "", "", "", |
| 71 | "", "", "", "", "", "", "", "", |
| 72 | "", "", "", "", "", "", "", ""; |
| 73 | }; |
| 74 | |
| 75 | &gpio2 { |
| 76 | gpio-line-names = |
| 77 | "", "", "", "", "", "", "", "", |
| 78 | "", "", "", "PicoITX-HW1", "", "", "", "", |
| 79 | "", "", "", "", "DHCOM-INT", "", "", "", |
| 80 | "", "", "", "", "", "", "", ""; |
| 81 | }; |
| 82 | |
| 83 | &gpio4 { |
| 84 | gpio-line-names = |
| 85 | "", "", "", "", "", "", "", "", |
| 86 | "", "", "", "", "", "", "", "", |
| 87 | "", "", "", "SOM-HW1", "", "", "", "", |
| 88 | "", "", "", "PicoITX-Out2", "", "", "", ""; |
| 89 | }; |
| 90 | |
| 91 | &gpio5 { |
| 92 | gpio-line-names = |
| 93 | "", "", "PicoITX-In2", "", "", "", "", "", |
| 94 | "", "", "", "", "", "", "", "", |
| 95 | "", "", "", "", |
| 96 | "", "", "PicoITX-In1", "PicoITX-Out1", |
| 97 | "", "", "", "", "", "", "", ""; |
| 98 | }; |
| 99 | |
| 100 | /* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */ |
| 101 | &pcie_phy { |
| 102 | status = "disabled"; |
| 103 | }; |
| 104 | |
| 105 | &pcie { |
| 106 | status = "disabled"; |
| 107 | }; |
| 108 | |
| 109 | /* No WiFi/BT chipset on this SoM variant. */ |
| 110 | &uart2 { |
| 111 | bluetooth { |
| 112 | status = "disabled"; |
| 113 | }; |
| 114 | }; |
| 115 | |
| 116 | /* USB_OTG port is not routed out on PicoITX. */ |
| 117 | &usb3_0 { |
| 118 | status = "disabled"; |
| 119 | }; |
| 120 | |
| 121 | &usb_dwc3_0 { |
| 122 | status = "disabled"; |
| 123 | }; |
| 124 | |
| 125 | &usb3_1 { |
| 126 | fsl,over-current-active-low; |
| 127 | }; |
| 128 | |
| 129 | &usb_dwc3_1 { |
| 130 | dr_mode = "host"; |
| 131 | maximum-speed = "high-speed"; |
| 132 | }; |
| 133 | |
| 134 | /* No WiFi/BT chipset on this SoM variant. */ |
| 135 | &usdhc1 { |
| 136 | status = "disabled"; |
| 137 | }; |
| 138 | |
| 139 | &iomuxc { |
| 140 | /* |
| 141 | * The following DHCOM GPIOs are used on this board. |
| 142 | * Therefore, they have been removed from the list below. |
| 143 | * I: yellow led |
| 144 | */ |
| 145 | pinctrl-0 = <&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c |
| 146 | &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f |
| 147 | &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_j |
| 148 | &pinctrl_dhcom_k &pinctrl_dhcom_l &pinctrl_dhcom_m |
| 149 | &pinctrl_dhcom_n &pinctrl_dhcom_o &pinctrl_dhcom_p |
| 150 | &pinctrl_dhcom_q &pinctrl_dhcom_r &pinctrl_dhcom_s |
| 151 | &pinctrl_dhcom_int>; |
| 152 | }; |