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git01.mediatek.com / filogic / uboot / 5c6926c9d6d99dae20ce69d1aa4ab234b46fb8b9 / . / arch / arm / dts / imx6qdl-aristainetos2c-u-boot.dtsi
blob: 33c3467b6add73901ef5f3e6b8e7f1e62002179a [file] [log] [blame]
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ or X11
2/*
3 * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
4 */
5
6/ {
7 chosen {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]8 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]9 stdout-path = &uart2;
10 };
11
12 wdt-reboot {
13 compatible = "wdt-reboot";
14 wdt = <&wdog1>;
15 };
16};
17
18&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]19 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]20};
21
22&pinctrl_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]23 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]24};
25
26&pinctrl_uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]27 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]28};
29
30&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]31 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]32};
33
34&aips2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]35 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]36};
37
38&backlight {
39 pwms = <&pwm1 0 300000>;
40 default-brightness-level = <2>;
41};
42
43/*
44 * allow switching write protect / reset pin by gpio,
45 * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
46 */
47&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]48 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]49
50 wp_spi_nor {
51 gpio-hog;
52 output-high;
53 gpios = <15 GPIO_ACTIVE_HIGH>;
54 };
55
56 reset_spi_nor {
57 gpio-hog;
58 output-high;
59 gpios = <28 GPIO_ACTIVE_HIGH>;
60 };
61};
62
63&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]64 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]65};
66
67&ecspi1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]68 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]69};
70
71&flash {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]72 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]73};
74
75&pinctrl_ecspi1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]76 bootph-all;
Heiko Schocher74758a92019-12-01 11:23:32 +0100[diff] [blame]77};