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git01.mediatek.com / filogic / uboot / 5c458ea85f6046f404d28aa181b1e929c577d79e / . / dts / upstream / src / arm / nxp / imx / imx6qdl-udoo.dtsi
blob: 647ba5e623ddfa2aae04339576f2746e63993957 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11 aliases {
12 backlight = &backlight;
13 panelchan = &panelchan;
14 panel7 = &panel7;
15 touchscreenp7 = &touchscreenp7;
16 };
17
18 chosen {
19 stdout-path = &uart2;
20 };
21
22 backlight: backlight {
23 compatible = "gpio-backlight";
24 gpios = <&gpio1 4 0>;
25 default-on;
26 status = "disabled";
27 };
28
29 gpio-poweroff {
30 compatible = "gpio-poweroff";
31 gpios = <&gpio2 4 0>;
32 pinctrl-0 = <&pinctrl_power_off>;
33 pinctrl-names = "default";
34 };
35
36 memory@10000000 {
37 device_type = "memory";
38 reg = <0x10000000 0x40000000>;
39 };
40
41 panel7: panel7 {
42 /*
43 * in reality it is a -20t (parallel) model,
44 * but with LVDS bridge chip attached,
45 * so it is equivalent to -19t model in drive
46 * characteristics
47 */
48 compatible = "urt,umsh-8596md-19t";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_panel>;
51 power-supply = <&reg_panel>;
52 backlight = <&backlight>;
53 status = "disabled";
54
55 port {
56 panel_in: endpoint {
57 remote-endpoint = <&lvds0_out>;
58 };
59 };
60 };
61
62 reg_usb_h1_vbus: regulator-usb-h1-vbus {
63 compatible = "regulator-fixed";
64 regulator-name = "usb_h1_vbus";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 enable-active-high;
68 startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
69 gpio = <&gpio7 12 0>;
70 };
71
72 reg_panel: regulator-panel {
73 compatible = "regulator-fixed";
74 regulator-name = "lcd_panel";
75 enable-active-high;
76 gpio = <&gpio1 2 0>;
77 };
78
79 sound {
80 compatible = "fsl,imx6q-udoo-ac97",
81 "fsl,imx-audio-ac97";
82 model = "fsl,imx6q-udoo-ac97";
83 audio-cpu = <&ssi1>;
84 audio-routing =
85 "RX", "Mic Jack",
86 "Headphone Jack", "TX";
87 mux-int-port = <1>;
88 mux-ext-port = <6>;
89 };
90};
91
92&fec {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_enet>;
95 phy-mode = "rgmii-id";
96 status = "okay";
97};
98
99&hdmi {
100 ddc-i2c-bus = <&i2c2>;
101 status = "okay";
102};
103
104&i2c2 {
105 clock-frequency = <100000>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_i2c2>;
108 status = "okay";
109};
110
111&i2c3 {
112 clock-frequency = <100000>;
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_i2c3>;
115 status = "okay";
116
117 touchscreenp7: touchscreenp7@55 {
118 compatible = "sitronix,st1232";
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_touchscreenp7>;
121 reg = <0x55>;
122 interrupt-parent = <&gpio1>;
123 interrupts = <13 8>;
124 gpios = <&gpio1 15 0>;
125 status = "disabled";
126 };
127};
128
129&iomuxc {
130 imx6q-udoo {
131 pinctrl_enet: enetgrp {
132 fsl,pins = <
133 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
134 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
135 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
136 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
137 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
138 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
139 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
140 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
141 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
142 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
143 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
144 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
145 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
146 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
147 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
148 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
149 >;
150 };
151
152 pinctrl_i2c2: i2c2grp {
153 fsl,pins = <
154 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
155 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
156 >;
157 };
158
159 pinctrl_i2c3: i2c3grp {
160 fsl,pins = <
161 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1
162 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1
163 >;
164 };
165
166 pinctrl_panel: panelgrp {
167 fsl,pins = <
168 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x70
169 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70
170 >;
171 };
172
173 pinctrl_power_off: poweroffgrp {
174 fsl,pins = <
175 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30
176 >;
177 };
178
179 pinctrl_touchscreenp7: touchscreenp7grp {
180 fsl,pins = <
181 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
182 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
183 >;
184 };
185
186 pinctrl_uart2: uart2grp {
187 fsl,pins = <
188 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
189 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
190 >;
191 };
192
193 pinctrl_uart4: uart4grp {
194 fsl,pins = <
195 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
196 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
197 >;
198 };
199
200 pinctrl_usbh: usbhgrp {
201 fsl,pins = <
202 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
203 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
204 >;
205 };
206
207 pinctrl_usbotg: usbotg {
208 fsl,pins = <
209 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
210 MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059
211 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059
212 >;
213 };
214
215 pinctrl_usdhc3: usdhc3grp {
216 fsl,pins = <
217 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
218 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
219 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
220 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
221 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
222 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
223 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
224 >;
225 };
226
227 pinctrl_ac97_running: ac97running {
228 fsl,pins = <
229 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
230 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
231 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
232 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
233 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
234 >;
235 };
236
237 pinctrl_ac97_warm_reset: ac97warmreset {
238 fsl,pins = <
239 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
240 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
241 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
242 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
243 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
244 >;
245 };
246
247 pinctrl_ac97_reset: ac97reset {
248 fsl,pins = <
249 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
250 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
251 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
252 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
253 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
254 >;
255 };
256 };
257};
258
259&ldb {
260 status = "okay";
261
262 panelchan: lvds-channel@0 {
263 port@4 {
264 reg = <4>;
265
266 lvds0_out: endpoint {
267 remote-endpoint = <&panel_in>;
268 };
269 };
270 };
271};
272
273&uart2 {
274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_uart2>;
276 status = "okay";
277};
278
279&uart4 {
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_uart4>;
282 status = "okay";
283};
284
285&usbh1 {
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_usbh>;
288 vbus-supply = <&reg_usb_h1_vbus>;
289 clocks = <&clks IMX6QDL_CLK_CKO>;
290 status = "disabled";
291};
292
293&usbotg {
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_usbotg>;
296 status = "okay";
297};
298
299&usdhc3 {
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_usdhc3>;
302 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
303 status = "okay";
304};
305
306&audmux {
307 status = "okay";
308};
309
310&ssi1 {
311 cell-index = <0>;
312 fsl,mode = "ac97-slave";
313 pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
314 pinctrl-0 = <&pinctrl_ac97_running>;
315 pinctrl-1 = <&pinctrl_ac97_reset>;
316 pinctrl-2 = <&pinctrl_ac97_warm_reset>;
317 ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
318 status = "okay";
319};