Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 5c0c3809ccc7468c4ebe219465d8d5284cc8c3e8 / . / arch / arm / dts / dragonboard820c.dts
blob: 146a0af8aafe024fd80c936018b032da0e240788 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]2/*
3 * Qualcomm APQ8096 based Dragonboard 820C board device tree source
4 *
5 * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]6 */
7
8/dts-v1/;
9
10#include "skeleton64.dtsi"
11
12/ {
13 model = "Qualcomm Technologies, Inc. DB820c";
14 compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 aliases {
Ramon Fried095458f2019-01-12 11:47:28 +0200[diff] [blame]19 serial0 = &blsp2_uart2;
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0 0x80000000 0 0xc0000000>;
29 };
30
Ramon Friede2673c72018-07-02 02:57:58 +0300[diff] [blame]31 reserved-memory {
32 #address-cells = <2>;
33 #size-cells = <2>;
34 ranges;
35
36 smem_mem: smem_region@86300000 {
37 reg = <0x0 0x86300000 0x0 0x200000>;
38 no-map;
39 };
40 };
41
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]42 psci {
43 compatible = "arm,psci-1.0";
44 method = "smc";
45 };
46
Ramon Friede2673c72018-07-02 02:57:58 +0300[diff] [blame]47 smem {
48 compatible = "qcom,smem";
49 memory-region = <&smem_mem>;
50 };
51
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]52 soc: soc {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges = <0 0 0 0xffffffff>;
56 compatible = "simple-bus";
57
58 gcc: clock-controller@300000 {
59 compatible = "qcom,gcc-msm8996";
60 #clock-cells = <1>;
61 #reset-cells = <1>;
62 #power-domain-cells = <1>;
63 reg = <0x300000 0x90000>;
64 };
65
Sumit Gargb7572e52022-07-27 13:52:04 +0530[diff] [blame]66 pinctrl: pinctrl@1010000 {
67 compatible = "qcom,msm8996-pinctrl";
Ramon Fried095458f2019-01-12 11:47:28 +0200[diff] [blame]68 reg = <0x1010000 0x400000>;
69
70 blsp8_uart: uart {
71 function = "blsp_uart8";
72 pins = "GPIO_4", "GPIO_5";
Sumit Gargfd1ad932023-02-01 19:28:52 +0530[diff] [blame]73 drive-strength = <8>;
Ramon Fried095458f2019-01-12 11:47:28 +0200[diff] [blame]74 bias-disable;
75 };
76 };
77
78 blsp2_uart2: serial@75b0000 {
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]79 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
80 reg = <0x75b0000 0x1000>;
Ramon Fried4a9404e2018-05-29 00:30:45 +0300[diff] [blame]81 clock = <&gcc 4>;
Ramon Fried095458f2019-01-12 11:47:28 +0200[diff] [blame]82 pinctrl-names = "uart";
83 pinctrl-0 = <&blsp8_uart>;
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]84 };
85
86 sdhc2: sdhci@74a4900 {
Ramon Fried095458f2019-01-12 11:47:28 +0200[diff] [blame]87 compatible = "qcom,sdhci-msm-v4";
88 reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
89 index = <0x0>;
90 bus-width = <4>;
91 clock = <&gcc 0>;
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]92 clock-frequency = <200000000>;
93 };
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]94
Stephan Gerholdfd331f32022-07-13 21:17:11 +0200[diff] [blame]95 spmi_bus: spmi@400f000 {
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]96 compatible = "qcom,spmi-pmic-arb";
Stephan Gerholdfd331f32022-07-13 21:17:11 +0200[diff] [blame]97 reg = <0x0400f000 0x1000>,
98 <0x04400000 0x800000>,
99 <0x04c00000 0x800000>,
100 <0x05800000 0x200000>,
101 <0x0400a000 0x002100>;
102 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]103 #address-cells = <0x1>;
104 #size-cells = <0x1>;
105
106 pmic0: pm8994@0 {
107 compatible = "qcom,spmi-pmic";
108 reg = <0x0 0x1>;
109 #address-cells = <0x1>;
110 #size-cells = <0x1>;
111
Caleb Connolly89a90d02023-12-05 13:46:48 +0000[diff] [blame]112 pm8994_pon: pon@800 {
113 compatible = "qcom,pm8916-pon";
114 reg = <0x800 0x100>;
115 mode-bootloader = <0x2>;
116 mode-recovery = <0x1>;
117
118 pwrkey {
119 compatible = "qcom,pm8941-pwrkey";
120 debounce = <15625>;
121 bias-pull-up;
122 };
123
124 pm8994_resin: resin {
125 compatible = "qcom,pm8941-resin";
126 debounce = <15625>;
127 bias-pull-up;
128 };
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]129 };
130
131 pm8994_gpios: pm8994_gpios@c000 {
132 compatible = "qcom,pm8994-gpio";
133 reg = <0xc000 0x400>;
134 gpio-controller;
Caleb Connollya80d68e2023-12-05 13:46:51 +0000[diff] [blame]135 gpio-ranges = <&pm8994_gpios 0 0 22>;
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]136 #gpio-cells = <2>;
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]137 };
138 };
139
140 pmic1: pm8994@1 {
141 compatible = "qcom,spmi-pmic";
142 reg = <0x1 0x1>;
143 #address-cells = <0x1>;
144 #size-cells = <0x1>;
145 };
146 };
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]147 };
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]148
Jorge Ramirez-Ortiz9f2d1b22018-01-10 11:33:50 +0100[diff] [blame]149};
Jorge Ramirez-Ortiz35561612018-01-10 11:33:51 +0100[diff] [blame]150
151#include "dragonboard820c-uboot.dtsi"