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git01.mediatek.com / filogic / uboot / 5c02a1ffc4c783afcee6f6f340b1447139748d95 / . / arch / arc / lib / memcmp.S
blob: 87bccab51d74c92f0239237cfe12eefa2c6864c6 [file] [log] [blame]
Alexey Brodkinb628c012014-02-04 12:56:15 +0400[diff] [blame]1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifdef __LITTLE_ENDIAN__
8#define WORD2 r2
9#define SHIFT r3
10#else /* __BIG_ENDIAN__ */
11#define WORD2 r3
12#define SHIFT r2
13#endif /* _ENDIAN__ */
14
15.global memcmp
16.align 4
17memcmp:
18 or %r12, %r0, %r1
19 asl_s %r12, %r12, 30
20 sub %r3, %r2, 1
21 brls %r2, %r12, .Lbytewise
22 ld %r4, [%r0, 0]
23 ld %r5, [%r1, 0]
24 lsr.f %lp_count, %r3, 3
25 lpne .Loop_end
26 ld_s WORD2, [%r0, 4]
27 ld_s %r12, [%r1, 4]
28 brne %r4, %r5, .Leven
29 ld.a %r4, [%r0, 8]
30 ld.a %r5, [%r1, 8]
31 brne WORD2, %r12, .Lodd
Igor Guryanov4b988112015-02-03 13:58:09 +0300[diff] [blame]32 nop
Alexey Brodkinb628c012014-02-04 12:56:15 +0400[diff] [blame]33.Loop_end:
34 asl_s SHIFT, SHIFT, 3
35 bhs_s .Last_cmp
36 brne %r4, %r5, .Leven
37 ld %r4, [%r0, 4]
38 ld %r5, [%r1, 4]
39#ifdef __LITTLE_ENDIAN__
40 nop_s
41 /* one more load latency cycle */
42.Last_cmp:
43 xor %r0, %r4, %r5
44 bset %r0, %r0, SHIFT
45 sub_s %r1, %r0, 1
46 bic_s %r1, %r1, %r0
47 norm %r1, %r1
48 b.d .Leven_cmp
49 and %r1, %r1, 24
50.Leven:
51 xor %r0, %r4, %r5
52 sub_s %r1, %r0, 1
53 bic_s %r1, %r1, %r0
54 norm %r1, %r1
55 /* slow track insn */
56 and %r1, %r1, 24
57.Leven_cmp:
58 asl %r2, %r4, %r1
59 asl %r12, %r5, %r1
60 lsr_s %r2, %r2, 1
61 lsr_s %r12, %r12, 1
62 j_s.d [%blink]
63 sub %r0, %r2, %r12
64 .balign 4
65.Lodd:
66 xor %r0, WORD2, %r12
67 sub_s %r1, %r0, 1
68 bic_s %r1, %r1, %r0
69 norm %r1, %r1
70 /* slow track insn */
71 and %r1, %r1, 24
72 asl_s %r2, %r2, %r1
73 asl_s %r12, %r12, %r1
74 lsr_s %r2, %r2, 1
75 lsr_s %r12, %r12, 1
76 j_s.d [%blink]
77 sub %r0, %r2, %r12
78#else /* __BIG_ENDIAN__ */
79.Last_cmp:
80 neg_s SHIFT, SHIFT
81 lsr %r4, %r4, SHIFT
82 lsr %r5, %r5, SHIFT
83 /* slow track insn */
84.Leven:
85 sub.f %r0, %r4, %r5
86 mov.ne %r0, 1
87 j_s.d [%blink]
88 bset.cs %r0, %r0, 31
89.Lodd:
90 cmp_s WORD2, %r12
91
92 mov_s %r0, 1
93 j_s.d [%blink]
94 bset.cs %r0, %r0, 31
95#endif /* _ENDIAN__ */
96 .balign 4
97.Lbytewise:
98 breq %r2, 0, .Lnil
99 ldb %r4, [%r0, 0]
100 ldb %r5, [%r1, 0]
101 lsr.f %lp_count, %r3
102 lpne .Lbyte_end
103 ldb_s %r3, [%r0, 1]
104 ldb %r12, [%r1, 1]
105 brne %r4, %r5, .Lbyte_even
106 ldb.a %r4, [%r0, 2]
107 ldb.a %r5, [%r1, 2]
108 brne %r3, %r12, .Lbyte_odd
Igor Guryanov4b988112015-02-03 13:58:09 +0300[diff] [blame]109 nop
Alexey Brodkinb628c012014-02-04 12:56:15 +0400[diff] [blame]110.Lbyte_end:
111 bcc .Lbyte_even
112 brne %r4, %r5, .Lbyte_even
113 ldb_s %r3, [%r0, 1]
114 ldb_s %r12, [%r1, 1]
115.Lbyte_odd:
116 j_s.d [%blink]
117 sub %r0, %r3, %r12
118.Lbyte_even:
119 j_s.d [%blink]
120 sub %r0, %r4, %r5
121.Lnil:
122 j_s.d [%blink]
123 mov %r0, 0