| Marcel Ziswiler | 355134a | 2022-07-21 15:27:37 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | // | ||||
| 3 | // Copyright 2013 Freescale Semiconductor, Inc. | ||||
| 4 | |||||
| 5 | #include "vf500.dtsi" | ||||
| 6 | |||||
| 7 | &a5_cpu { | ||||
| 8 | next-level-cache = <&L2>; | ||||
| 9 | }; | ||||
| 10 | |||||
| 11 | &aips0 { | ||||
| 12 | L2: cache-controller@40006000 { | ||||
| 13 | compatible = "arm,pl310-cache"; | ||||
| 14 | reg = <0x40006000 0x1000>; | ||||
| 15 | cache-unified; | ||||
| 16 | cache-level = <2>; | ||||
| 17 | arm,data-latency = <3 3 3>; | ||||
| 18 | arm,tag-latency = <2 2 2>; | ||||
| 19 | }; | ||||
| 20 | }; | ||||