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Neil Armstronga7b09d52019-03-08 15:09:40 +01001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
4 */
5
Jerome Brunetd34d5ef2020-03-05 12:12:38 +01006#include "meson-g12.dtsi"
Neil Armstronga7b09d52019-03-08 15:09:40 +01007
8/ {
9 compatible = "amlogic,g12a";
10
Neil Armstronga7b09d52019-03-08 15:09:40 +010011 cpus {
12 #address-cells = <0x2>;
13 #size-cells = <0x0>;
14
15 cpu0: cpu@0 {
16 device_type = "cpu";
17 compatible = "arm,cortex-a53";
18 reg = <0x0 0x0>;
19 enable-method = "psci";
20 next-level-cache = <&l2>;
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010021 #cooling-cells = <2>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010022 };
23
24 cpu1: cpu@1 {
25 device_type = "cpu";
26 compatible = "arm,cortex-a53";
27 reg = <0x0 0x1>;
28 enable-method = "psci";
29 next-level-cache = <&l2>;
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010030 #cooling-cells = <2>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010031 };
32
33 cpu2: cpu@2 {
34 device_type = "cpu";
35 compatible = "arm,cortex-a53";
36 reg = <0x0 0x2>;
37 enable-method = "psci";
38 next-level-cache = <&l2>;
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010039 #cooling-cells = <2>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010040 };
41
42 cpu3: cpu@3 {
43 device_type = "cpu";
44 compatible = "arm,cortex-a53";
45 reg = <0x0 0x3>;
46 enable-method = "psci";
47 next-level-cache = <&l2>;
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010048 #cooling-cells = <2>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010049 };
50
51 l2: l2-cache0 {
52 compatible = "cache";
Neil Armstrongec6da9f2023-01-19 14:44:17 +010053 cache-level = <2>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010054 };
55 };
56
Andreas Färber5851dcb2019-10-09 16:03:54 +020057 cpu_opp_table: opp-table {
58 compatible = "operating-points-v2";
59 opp-shared;
Neil Armstrongdfbcea22019-05-28 10:50:36 +020060
Andreas Färber5851dcb2019-10-09 16:03:54 +020061 opp-100000000 {
62 opp-hz = /bits/ 64 <100000000>;
63 opp-microvolt = <731000>;
Neil Armstrongdfbcea22019-05-28 10:50:36 +020064 };
Neil Armstrong4612ae12019-07-22 10:06:11 +020065
Andreas Färber5851dcb2019-10-09 16:03:54 +020066 opp-250000000 {
67 opp-hz = /bits/ 64 <250000000>;
68 opp-microvolt = <731000>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010069 };
70
Andreas Färber5851dcb2019-10-09 16:03:54 +020071 opp-500000000 {
72 opp-hz = /bits/ 64 <500000000>;
73 opp-microvolt = <731000>;
Neil Armstrongdfbcea22019-05-28 10:50:36 +020074 };
75
Andreas Färber5851dcb2019-10-09 16:03:54 +020076 opp-667000000 {
77 opp-hz = /bits/ 64 <666666666>;
78 opp-microvolt = <731000>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010079 };
80
Andreas Färber5851dcb2019-10-09 16:03:54 +020081 opp-1000000000 {
82 opp-hz = /bits/ 64 <1000000000>;
83 opp-microvolt = <731000>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010084 };
85
Andreas Färber5851dcb2019-10-09 16:03:54 +020086 opp-1200000000 {
87 opp-hz = /bits/ 64 <1200000000>;
88 opp-microvolt = <731000>;
Neil Armstronga7b09d52019-03-08 15:09:40 +010089 };
Neil Armstrongdfbcea22019-05-28 10:50:36 +020090
Andreas Färber5851dcb2019-10-09 16:03:54 +020091 opp-1398000000 {
92 opp-hz = /bits/ 64 <1398000000>;
93 opp-microvolt = <761000>;
Neil Armstrong4612ae12019-07-22 10:06:11 +020094 };
95
Andreas Färber5851dcb2019-10-09 16:03:54 +020096 opp-1512000000 {
97 opp-hz = /bits/ 64 <1512000000>;
98 opp-microvolt = <791000>;
Neil Armstrong4612ae12019-07-22 10:06:11 +020099 };
100
Andreas Färber5851dcb2019-10-09 16:03:54 +0200101 opp-1608000000 {
102 opp-hz = /bits/ 64 <1608000000>;
103 opp-microvolt = <831000>;
Neil Armstrong4612ae12019-07-22 10:06:11 +0200104 };
105
Andreas Färber5851dcb2019-10-09 16:03:54 +0200106 opp-1704000000 {
107 opp-hz = /bits/ 64 <1704000000>;
108 opp-microvolt = <861000>;
Neil Armstrongdfbcea22019-05-28 10:50:36 +0200109 };
110
Andreas Färber5851dcb2019-10-09 16:03:54 +0200111 opp-1800000000 {
112 opp-hz = /bits/ 64 <1800000000>;
113 opp-microvolt = <981000>;
Neil Armstrongdfbcea22019-05-28 10:50:36 +0200114 };
Neil Armstronga7b09d52019-03-08 15:09:40 +0100115 };
Andreas Färber5851dcb2019-10-09 16:03:54 +0200116};
Neil Armstronga7b09d52019-03-08 15:09:40 +0100117
Jerome Brunetd34d5ef2020-03-05 12:12:38 +0100118&cpu_thermal {
119 cooling-maps {
120 map0 {
121 trip = <&cpu_passive>;
122 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
123 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
124 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
125 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
126 };
Neil Armstronga7b09d52019-03-08 15:09:40 +0100127
Jerome Brunetd34d5ef2020-03-05 12:12:38 +0100128 map1 {
129 trip = <&cpu_hot>;
130 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
131 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
132 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
133 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
134 };
135 };
Neil Armstronga7b09d52019-03-08 15:09:40 +0100136};
Neil Armstrongec6da9f2023-01-19 14:44:17 +0100137
138&pmu {
139 compatible = "amlogic,g12a-ddr-pmu";
140};