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git01.mediatek.com / filogic / uboot / 5ba115901775f2cdde9a4301f1ca55ae257ae4a1 / . / arch / arm / dts / imx8mp-rsb3720-a1-u-boot.dtsi
blob: f3fb44046d5ca9220954e65514965524a838fb62 [file] [log] [blame]
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 * Copyright 2022 Linaro
5 */
6
7#include "imx8mp-u-boot.dtsi"
8
9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]13 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]14 };
15
16 firmware {
17 optee {
18 compatible = "linaro,optee-tz";
19 method = "smc";
20 };
21 };
22};
23
24&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]25 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]26};
27
28&reg_usdhc2_vmmc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]29 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]30};
31
32&pinctrl_uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]33 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]34};
35
36&pinctrl_uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]37 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]38};
39
40&pinctrl_usdhc2_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]41 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]42};
43
44&pinctrl_usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]45 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]46};
47
48&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]49 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]50};
51
52&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]54};
55
56&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]57 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]58};
59
60&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]61 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]62};
63
64&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]65 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]66};
67
68&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]69 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]70};
71
72&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]73 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]74};
75
76&uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]77 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]78};
79
80&i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]81 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]82};
83
84&i2c2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]85 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]86};
87
88&i2c3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]89 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]90};
91
Peng Fanb00e4292022-06-11 20:21:08 +0800[diff] [blame]92&wdog1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]93 bootph-pre-ram;
Peng Fanb00e4292022-06-11 20:21:08 +0800[diff] [blame]94};
95
96&pinctrl_wdog {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]97 bootph-pre-ram;
Peng Fanb00e4292022-06-11 20:21:08 +0800[diff] [blame]98};
99
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]100&pinctrl_i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]101 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]102};
103
104&pinctrl_i2c1_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]105 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]106};
107
108&pinctrl_pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]109 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]110};
111
112&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]113 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]114};
115
116&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]117 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]118};
119
120&usdhc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]121 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]122 assigned-clocks = <&clk IMX8MP_CLK_USDHC1>;
123 assigned-clock-rates = <400000000>;
124 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
125};
126
127&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]128 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]129 sd-uhs-sdr104;
130 sd-uhs-ddr50;
131 assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
132 assigned-clock-rates = <400000000>;
133 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
134};
135
136&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]137 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]138 mmc-hs400-1_8v;
139 mmc-hs400-enhanced-strobe;
140 assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
141 assigned-clock-rates = <400000000>;
142 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
143};
144
145&binman {
146 itb {
147 fit {
148 images {
149 fip {
150 description = "Trusted Firmware FIP";
151 type = "firmware";
152 arch = "arm64";
153 compression = "none";
154 load = <0x40310000>;
155
156 fip_blob: blob-ext{
157 filename = "fip.bin";
158 };
159 };
160 };
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800[diff] [blame]161 };
162 };
163};
Ying-Chun Liu (PaulLiu)7cccd052023-01-18 03:15:00 +0800[diff] [blame]164
165&binman_configuration {
166 loadables = "atf", "fip";
167};