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Mike Frysingera57f6842008-10-12 23:28:33 -04001/*
2 * U-boot - Configuration file for BlackStamp board
3 * Configuration by Ben Matthews for UR LLE using bf533-stamp.h
4 * as a template
5 * See http://blackfin.uclinux.org/gf/project/blackstamp/
6 */
7
8#ifndef __CONFIG_BLACKSTAMP_H__
9#define __CONFIG_BLACKSTAMP_H__
10
Mike Frysinger18a407c2009-04-24 17:22:40 -040011#include <asm/config-pre.h>
Mike Frysingera57f6842008-10-12 23:28:33 -040012
13/*
14 * Debugging: Set these options if you're having problems
15 */
16/*
17 * #define CONFIG_DEBUG_EARLY_SERIAL
18 * #define DEBUG
19 * #define CONFIG_DEBUG_DUMP
20 * #define CONFIG_DEBUG_DUMP_SYMS
21*/
22#define CONFIG_PANIC_HANG 0
23
24/* CPU Options
25 * Be sure to set the Silicon Revision Correctly
26 */
Mike Frysinger5b0c1282010-12-23 14:58:37 -050027#define CONFIG_BFIN_CPU bf532-0.5
Mike Frysingera57f6842008-10-12 23:28:33 -040028#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
29
30/*
31 * Board settings
32 */
Ben Warren0fd6aae2009-10-04 22:37:03 -070033#define CONFIG_SMC91111 1
Mike Frysingera57f6842008-10-12 23:28:33 -040034#define CONFIG_SMC91111_BASE 0x20300300
35
36/* FLASH/ETHERNET uses the same address range
37 * Depending on what you have the CPLD doing
38 * this probably isn't needed
39 */
40#define SHARED_RESOURCES 1
41
42/* Is I2C bit-banged? */
Mike Frysingera57f6842008-10-12 23:28:33 -040043
44/*
45 * Clock Settings
46 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
47 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
48 */
49/* CONFIG_CLKIN_HZ is any value in Hz */
50#define CONFIG_CLKIN_HZ 25000000
51/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
52/* 1 = CLKIN / 2 */
53#define CONFIG_CLKIN_HALF 0
54/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
55/* 1 = bypass PLL */
56#define CONFIG_PLL_BYPASS 0
57/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
58/* Values can range from 0-63 (where 0 means 64) */
59#define CONFIG_VCO_MULT 16
60/* CCLK_DIV controls the core clock divider */
61/* Values can be 1, 2, 4, or 8 ONLY */
62#define CONFIG_CCLK_DIV 1
63/* SCLK_DIV controls the system clock divider */
64/* Values can range from 1-15 */
65#define CONFIG_SCLK_DIV 3
66
67/*
68 * Network settings
69 */
70
Ben Warren0fd6aae2009-10-04 22:37:03 -070071#ifdef CONFIG_SMC91111
Mike Frysingera57f6842008-10-12 23:28:33 -040072#define CONFIG_IPADDR 192.168.0.15
73#define CONFIG_NETMASK 255.255.255.0
74#define CONFIG_GATEWAYIP 192.168.0.1
75#define CONFIG_SERVERIP 192.168.0.2
76#define CONFIG_HOSTNAME blackstamp
Joe Hershberger257ff782011-10-13 13:03:47 +000077#define CONFIG_ROOTPATH "/checkout/uClinux-dist/romfs"
Mike Frysingera57f6842008-10-12 23:28:33 -040078#define CONFIG_SYS_AUTOLOAD "no"
Mike Frysingera57f6842008-10-12 23:28:33 -040079#endif
80
81#define CONFIG_ENV_IS_IN_SPI_FLASH
Mike Frysinger7f6fbd12009-06-25 19:40:28 -040082#define CONFIG_ENV_OFFSET 0x40000
Mike Frysingera57f6842008-10-12 23:28:33 -040083#define CONFIG_ENV_SIZE 0x2000
84#define CONFIG_ENV_SECT_SIZE 0x40000
Mike Frysingera57f6842008-10-12 23:28:33 -040085
86/*
87 * SDRAM settings & memory map
88 */
89
90#define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
91#define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */
92
93#define CONFIG_SYS_MONITOR_LEN (256 << 10)
94#define CONFIG_SYS_MALLOC_LEN (384 << 10)
95
96/*
97 * Command settings
98 */
99
100#define CONFIG_SYS_LONGHELP 1
101#define CONFIG_CMDLINE_EDITING 1
102#define CONFIG_AUTO_COMPLETE 1
103#define CONFIG_ENV_OVERWRITE 1
104
105#include <config_cmd_default.h>
106
Ben Warren0fd6aae2009-10-04 22:37:03 -0700107#ifdef CONFIG_SMC91111
Mike Frysingera57f6842008-10-12 23:28:33 -0400108# define CONFIG_CMD_DHCP
109# define CONFIG_CMD_PING
110#else
111# undef CONFIG_CMD_NET
112#endif
113
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100114#ifdef CONFIG_SYS_I2C_SOFT
Mike Frysingera57f6842008-10-12 23:28:33 -0400115# define CONFIG_CMD_I2C
116#endif
117
118#define CONFIG_CMD_BOOTLDR
119#define CONFIG_CMD_CACHE
120#define CONFIG_CMD_CPLBINFO
121#define CONFIG_CMD_DATE
122#define CONFIG_CMD_SF
123#define CONFIG_CMD_ELF
124
125#define CONFIG_BOOTDELAY 5
126#define CONFIG_BOOTCOMMAND "run ramboot"
127#define CONFIG_BOOTARGS \
128 "root=/dev/mtdblock0 rw " \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200129 "clkin_hz=" __stringify(CONFIG_CLKIN_HZ) " " \
Mike Frysingera57f6842008-10-12 23:28:33 -0400130 "earlyprintk=" \
131 "serial," \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200132 "uart" __stringify(CONFIG_UART_CONSOLE) "," \
133 __stringify(CONFIG_BAUDRATE) " " \
134 "console=ttyBF0," __stringify(CONFIG_BAUDRATE)
Mike Frysingera57f6842008-10-12 23:28:33 -0400135
136#if defined(CONFIG_CMD_NET)
137# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
138# define UBOOT_ENV_FILE "u-boot.bin"
139# else
140# define UBOOT_ENV_FILE "u-boot.ldr"
141# endif
142# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
143# ifdef CONFIG_SPI
144# define UBOOT_ENV_UPDATE \
145 "eeprom write $(loadaddr) 0x0 $(filesize)"
146# else
147# define UBOOT_ENV_UPDATE \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200148 "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
Mike Frysingera57f6842008-10-12 23:28:33 -0400149 "sf erase 0 0x40000;" \
150 "sf write $(loadaddr) 0 $(filesize)"
151# endif
152# else
153# define UBOOT_ENV_UPDATE \
154 "protect off 0x20000000 0x2003FFFF;" \
155 "erase 0x20000000 0x2003FFFF;" \
156 "cp.b $(loadaddr) 0x20000000 $(filesize)"
157# endif
158# define NETWORK_ENV_SETTINGS \
159 "ubootfile=" UBOOT_ENV_FILE "\0" \
160 "update=" \
161 "tftp $(loadaddr) $(ubootfile);" \
162 UBOOT_ENV_UPDATE \
163 "\0" \
164 "addip=set bootargs $(bootargs) " \
165 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
166 "$(hostname):eth0:off" \
167 "\0" \
168 "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \
169 "ramboot=" \
170 "tftp $(loadaddr) uImage;" \
171 "run ramargs;" \
172 "run addip;" \
173 "bootm" \
174 "\0" \
175 "nfsargs=set bootargs " \
176 "root=/dev/nfs rw " \
177 "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \
178 "\0" \
179 "nfsboot=" \
180 "tftp $(loadaddr) vmImage;" \
181 "run nfsargs;" \
182 "run addip;" \
183 "bootm" \
184 "\0"
185#else
186# define NETWORK_ENV_SETTINGS
187#endif
188
189/*
190 * Console settings
191 */
192#define CONFIG_BAUDRATE 57600
193#define CONFIG_LOADS_ECHO 1
194#define CONFIG_UART_CONSOLE 0
Sonic Zhangb9efd352013-11-18 14:50:19 +0800195#define CONFIG_BFIN_SERIAL
Mike Frysingera57f6842008-10-12 23:28:33 -0400196
197/*
198 * I2C settings
199 * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
200 * Located on the expansion connector on pins 86/85
201 * Note these pins are arbitrarily chosen because we aren't using
202 * them yet. You can (and probably should) change these values!
203 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100204#ifdef CONFIG_SYS_I2C_SOFT
Mike Frysingerd86e9a72010-06-08 16:22:44 -0400205#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
206#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
Marek Vasuta3c41ba2013-08-01 12:32:20 +0200207#define CONFIG_SYS_I2C_SOFT_SPEED 50000
208#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
Mike Frysingera57f6842008-10-12 23:28:33 -0400209#endif
210
211/*
212 * Miscellaneous configurable options
213 */
214#define CONFIG_RTC_BFIN 1
215
216/*
217 * Serial Flash Infomation
218 */
219#define CONFIG_BFIN_SPI
Mike Frysinger7f6fbd12009-06-25 19:40:28 -0400220/* For the M25P64 SCK Should be Kept < 15Mhz */
221#define CONFIG_ENV_SPI_MAX_HZ 15000000
222#define CONFIG_SF_DEFAULT_SPEED 15000000
Mike Frysingera57f6842008-10-12 23:28:33 -0400223#define CONFIG_SPI_FLASH
224#define CONFIG_SPI_FLASH_STMICRO
225
226/*
227 * FLASH organization and environment definitions
228 */
229
230#define CONFIG_EBIU_AMGCTL_VAL 0xFF
231#define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
232#define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
233#define CONFIG_EBIU_SDRRC_VAL 0x268
234#define CONFIG_EBIU_SDGCTL_VAL 0x911109
235
236/* Even though Rev C boards have Parallel Flash
237 * We aren't supporting it. Newer versions of the
238 * hardware don't support Parallel Flash at all.
239 */
240#define CONFIG_SYS_NO_FLASH
241#undef CONFIG_CMD_IMLS
242#undef CONFIG_CMD_JFFS2
243#undef CONFIG_CMD_FLASH
244
Mike Frysingera57f6842008-10-12 23:28:33 -0400245#endif