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Michael Trimarchi241f7512008-11-28 13:20:46 +01001/*-
2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
michael0a326102008-12-10 17:55:19 +01003 * Copyright (c) 2008, Excito Elektronik i Skåne AB
Remy Böhmer33e87482008-12-13 22:51:58 +01004 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
5 *
Michael Trimarchi241f7512008-11-28 13:20:46 +01006 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
11 * the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
Michael Trimarchi241f7512008-11-28 13:20:46 +010023#include <common.h>
Simon Glassa194b252015-03-25 12:22:29 -060024#include <dm.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000025#include <errno.h>
michael0a326102008-12-10 17:55:19 +010026#include <asm/byteorder.h>
Lucas Stach835e11e2012-09-06 08:00:13 +020027#include <asm/unaligned.h>
Michael Trimarchi241f7512008-11-28 13:20:46 +010028#include <usb.h>
29#include <asm/io.h>
michael0a326102008-12-10 17:55:19 +010030#include <malloc.h>
Stefan Roese86b34cf2010-11-26 15:43:28 +010031#include <watchdog.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000032#include <linux/compiler.h>
Jean-Christophe PLAGNIOL-VILLARD8f6bcf42009-04-03 12:46:58 +020033
34#include "ehci.h"
Michael Trimarchi241f7512008-11-28 13:20:46 +010035
Lucas Stach3494a4c2012-09-26 00:14:35 +020036#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
37#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
38#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +010039
Julius Werner5c1a1ad2013-09-24 10:53:07 -070040/*
41 * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
42 * Let's time out after 8 to have a little safety margin on top of that.
43 */
44#define HCHALT_TIMEOUT (8 * 1000)
45
Simon Glassa194b252015-03-25 12:22:29 -060046#ifndef CONFIG_DM_USB
Marek Vasutfd349a12013-07-10 03:16:31 +020047static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
Simon Glassa194b252015-03-25 12:22:29 -060048#endif
Tom Rini2cabcf72012-07-15 22:14:24 +000049
50#define ALIGN_END_ADDR(type, ptr, size) \
Rob Herringf14d54b2015-03-17 15:46:37 -050051 ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
Michael Trimarchi241f7512008-11-28 13:20:46 +010052
michael0a326102008-12-10 17:55:19 +010053static struct descriptor {
54 struct usb_hub_descriptor hub;
55 struct usb_device_descriptor device;
56 struct usb_linux_config_descriptor config;
57 struct usb_linux_interface_descriptor interface;
58 struct usb_endpoint_descriptor endpoint;
59} __attribute__ ((packed)) descriptor = {
60 {
61 0x8, /* bDescLength */
62 0x29, /* bDescriptorType: hub descriptor */
63 2, /* bNrPorts -- runtime modified */
64 0, /* wHubCharacteristics */
Vincent Palatin8277b502011-12-05 14:52:22 -080065 10, /* bPwrOn2PwrGood */
michael0a326102008-12-10 17:55:19 +010066 0, /* bHubCntrCurrent */
67 {}, /* Device removable */
68 {} /* at most 7 ports! XXX */
69 },
70 {
71 0x12, /* bLength */
72 1, /* bDescriptorType: UDESC_DEVICE */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030073 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
michael0a326102008-12-10 17:55:19 +010074 9, /* bDeviceClass: UDCLASS_HUB */
75 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
76 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
77 64, /* bMaxPacketSize: 64 bytes */
78 0x0000, /* idVendor */
79 0x0000, /* idProduct */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030080 cpu_to_le16(0x0100), /* bcdDevice */
michael0a326102008-12-10 17:55:19 +010081 1, /* iManufacturer */
82 2, /* iProduct */
83 0, /* iSerialNumber */
84 1 /* bNumConfigurations: 1 */
85 },
86 {
87 0x9,
88 2, /* bDescriptorType: UDESC_CONFIG */
89 cpu_to_le16(0x19),
90 1, /* bNumInterface */
91 1, /* bConfigurationValue */
92 0, /* iConfiguration */
93 0x40, /* bmAttributes: UC_SELF_POWER */
94 0 /* bMaxPower */
95 },
96 {
97 0x9, /* bLength */
98 4, /* bDescriptorType: UDESC_INTERFACE */
99 0, /* bInterfaceNumber */
100 0, /* bAlternateSetting */
101 1, /* bNumEndpoints */
102 9, /* bInterfaceClass: UICLASS_HUB */
103 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
104 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
105 0 /* iInterface */
106 },
107 {
108 0x7, /* bLength */
109 5, /* bDescriptorType: UDESC_ENDPOINT */
110 0x81, /* bEndpointAddress:
111 * UE_DIR_IN | EHCI_INTR_ENDPT
112 */
113 3, /* bmAttributes: UE_INTERRUPT */
Tom Rix83b9e1d2009-10-31 12:37:38 -0500114 8, /* wMaxPacketSize */
michael0a326102008-12-10 17:55:19 +0100115 255 /* bInterval */
116 },
Michael Trimarchi241f7512008-11-28 13:20:46 +0100117};
118
Remy Böhmer33e87482008-12-13 22:51:58 +0100119#if defined(CONFIG_EHCI_IS_TDI)
120#define ehci_is_TDI() (1)
121#else
122#define ehci_is_TDI() (0)
123#endif
124
Simon Glasscb7cf602015-03-25 12:22:25 -0600125static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
126{
Simon Glassa194b252015-03-25 12:22:29 -0600127#ifdef CONFIG_DM_USB
Hans de Goede6be39d12015-05-05 11:54:33 +0200128 return dev_get_priv(usb_get_bus(udev->dev));
Simon Glassa194b252015-03-25 12:22:29 -0600129#else
Simon Glasscb7cf602015-03-25 12:22:25 -0600130 return udev->controller;
Simon Glassa194b252015-03-25 12:22:29 -0600131#endif
Simon Glasscb7cf602015-03-25 12:22:25 -0600132}
133
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600134static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000135{
136 return PORTSC_PSPD(reg);
137}
138
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600139static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000140{
141 uint32_t tmp;
142 uint32_t *reg_ptr;
143
Simon Glass2d387ab2015-03-25 12:22:23 -0600144 reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
Jim Lin54f3dfe2013-03-27 00:52:32 +0000145 tmp = ehci_readl(reg_ptr);
146 tmp |= USBMODE_CM_HC;
147#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
148 tmp |= USBMODE_BE;
149#endif
150 ehci_writel(reg_ptr, tmp);
151}
152
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600153static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
Simon Glasscc0dc6b2015-03-25 12:22:21 -0600154 uint32_t *reg)
Marek Vasut09734772011-07-11 02:37:01 +0200155{
156 mdelay(50);
157}
158
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600159static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
Simon Glass0bec1282015-03-25 12:22:17 -0600160{
161 if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
162 /* Printing the message would cause a scan failure! */
163 debug("The request port(%u) is not configured\n", port);
164 return NULL;
165 }
166
Simon Glassdfbf1862015-03-25 12:22:24 -0600167 return (uint32_t *)&ctrl->hcor->or_portsc[port];
Simon Glass0bec1282015-03-25 12:22:17 -0600168}
169
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100170static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
michael0a326102008-12-10 17:55:19 +0100171{
michael0bf2a032008-12-11 13:43:55 +0100172 uint32_t result;
173 do {
174 result = ehci_readl(ptr);
Wolfgang Denkcdc5a7a2010-10-22 14:23:00 +0200175 udelay(5);
michael0bf2a032008-12-11 13:43:55 +0100176 if (result == ~(uint32_t)0)
177 return -1;
178 result &= mask;
179 if (result == done)
180 return 0;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100181 usec--;
182 } while (usec > 0);
michael0bf2a032008-12-11 13:43:55 +0100183 return -1;
184}
185
Simon Glass302696b2015-03-25 12:22:28 -0600186static int ehci_reset(struct ehci_ctrl *ctrl)
michael0bf2a032008-12-11 13:43:55 +0100187{
188 uint32_t cmd;
michael0bf2a032008-12-11 13:43:55 +0100189 int ret = 0;
190
Simon Glass302696b2015-03-25 12:22:28 -0600191 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Stefan Roese745af442010-11-26 15:44:00 +0100192 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
Simon Glass302696b2015-03-25 12:22:28 -0600193 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
194 ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200195 CMD_RESET, 0, 250 * 1000);
michael0bf2a032008-12-11 13:43:55 +0100196 if (ret < 0) {
197 printf("EHCI fail to reset\n");
198 goto out;
199 }
200
Jim Lin54f3dfe2013-03-27 00:52:32 +0000201 if (ehci_is_TDI())
Simon Glass302696b2015-03-25 12:22:28 -0600202 ctrl->ops.set_usb_mode(ctrl);
Simon Glass5978cdb2012-02-27 10:52:47 +0000203
204#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
Simon Glass302696b2015-03-25 12:22:28 -0600205 cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200206 cmd &= ~TXFIFO_THRESH_MASK;
Simon Glass5978cdb2012-02-27 10:52:47 +0000207 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
Simon Glass302696b2015-03-25 12:22:28 -0600208 ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
Simon Glass5978cdb2012-02-27 10:52:47 +0000209#endif
michael0bf2a032008-12-11 13:43:55 +0100210out:
211 return ret;
michael0a326102008-12-10 17:55:19 +0100212}
Michael Trimarchi241f7512008-11-28 13:20:46 +0100213
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700214static int ehci_shutdown(struct ehci_ctrl *ctrl)
215{
216 int i, ret = 0;
217 uint32_t cmd, reg;
218
Marek Vasut919d00a2013-12-14 02:03:11 +0100219 if (!ctrl || !ctrl->hcor)
220 return -EINVAL;
221
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700222 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
223 cmd &= ~(CMD_PSE | CMD_ASE);
224 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
225 ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
226 100 * 1000);
227
228 if (!ret) {
229 for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
230 reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
231 reg |= EHCI_PS_SUSP;
232 ehci_writel(&ctrl->hcor->or_portsc[i], reg);
233 }
234
235 cmd &= ~CMD_RUN;
236 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
237 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
238 HCHALT_TIMEOUT);
239 }
240
241 if (ret)
242 puts("EHCI failed to shut down host controller.\n");
243
244 return ret;
245}
246
Michael Trimarchi241f7512008-11-28 13:20:46 +0100247static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
248{
Marek Vasutff24dc32012-04-09 04:07:46 +0200249 uint32_t delta, next;
Rob Herringf14d54b2015-03-17 15:46:37 -0500250 uint32_t addr = (unsigned long)buf;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100251 int idx;
252
Ilya Yanokfb113712012-07-15 04:43:49 +0000253 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
Marek Vasutff24dc32012-04-09 04:07:46 +0200254 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
255
Ilya Yanokfb113712012-07-15 04:43:49 +0000256 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
257
Michael Trimarchi241f7512008-11-28 13:20:46 +0100258 idx = 0;
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200259 while (idx < QT_BUFFER_CNT) {
michael0a326102008-12-10 17:55:19 +0100260 td->qt_buffer[idx] = cpu_to_hc32(addr);
Wolfgang Denkebb829f2010-10-19 16:13:15 +0200261 td->qt_buffer_hi[idx] = 0;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200262 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100263 delta = next - addr;
264 if (delta >= sz)
265 break;
266 sz -= delta;
267 addr = next;
268 idx++;
269 }
270
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200271 if (idx == QT_BUFFER_CNT) {
Rob Herringf14d54b2015-03-17 15:46:37 -0500272 printf("out of buffer pointers (%zu bytes left)\n", sz);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100273 return -1;
274 }
275
276 return 0;
277}
278
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000279static inline u8 ehci_encode_speed(enum usb_device_speed speed)
280{
281 #define QH_HIGH_SPEED 2
282 #define QH_FULL_SPEED 0
283 #define QH_LOW_SPEED 1
284 if (speed == USB_SPEED_HIGH)
285 return QH_HIGH_SPEED;
286 if (speed == USB_SPEED_LOW)
287 return QH_LOW_SPEED;
288 return QH_FULL_SPEED;
289}
290
Simon Glassa194b252015-03-25 12:22:29 -0600291static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
Hans de Goededa166772014-09-20 16:51:22 +0200292 struct QH *qh)
293{
294 struct usb_device *ttdev;
Simon Glassa194b252015-03-25 12:22:29 -0600295 int parent_devnum;
Hans de Goededa166772014-09-20 16:51:22 +0200296
Simon Glassa194b252015-03-25 12:22:29 -0600297 if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
Hans de Goededa166772014-09-20 16:51:22 +0200298 return;
299
300 /*
301 * For full / low speed devices we need to get the devnum and portnr of
302 * the tt, so of the first upstream usb-2 hub, there may be usb-1 hubs
303 * in the tree before that one!
304 */
Simon Glassa194b252015-03-25 12:22:29 -0600305#ifdef CONFIG_DM_USB
Hans de Goeded5ab1602015-05-05 11:54:34 +0200306 /*
307 * When called from usb-uclass.c: usb_scan_device() udev->dev points
308 * to the parent udevice, not the actual udevice belonging to the
309 * udev as the device is not instantiated yet. So when searching
310 * for the first usb-2 parent start with udev->dev not
311 * udev->dev->parent .
312 */
Simon Glassa194b252015-03-25 12:22:29 -0600313 struct udevice *parent;
Hans de Goeded5ab1602015-05-05 11:54:34 +0200314 struct usb_device *uparent;
Simon Glassa194b252015-03-25 12:22:29 -0600315
Hans de Goeded5ab1602015-05-05 11:54:34 +0200316 ttdev = udev;
317 parent = udev->dev;
318 uparent = dev_get_parentdata(parent);
Simon Glassa194b252015-03-25 12:22:29 -0600319
Hans de Goeded5ab1602015-05-05 11:54:34 +0200320 while (uparent->speed != USB_SPEED_HIGH) {
321 struct udevice *dev = parent;
322
323 if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB) {
324 printf("ehci: Error cannot find high speed parent of usb-1 device\n");
Simon Glassa194b252015-03-25 12:22:29 -0600325 return;
Hans de Goeded5ab1602015-05-05 11:54:34 +0200326 }
327
328 ttdev = dev_get_parentdata(dev);
329 parent = dev->parent;
330 uparent = dev_get_parentdata(parent);
Simon Glassa194b252015-03-25 12:22:29 -0600331 }
Hans de Goeded5ab1602015-05-05 11:54:34 +0200332 parent_devnum = uparent->devnum;
Simon Glassa194b252015-03-25 12:22:29 -0600333#else
334 ttdev = udev;
Hans de Goededa166772014-09-20 16:51:22 +0200335 while (ttdev->parent && ttdev->parent->speed != USB_SPEED_HIGH)
336 ttdev = ttdev->parent;
337 if (!ttdev->parent)
338 return;
Simon Glassa194b252015-03-25 12:22:29 -0600339 parent_devnum = ttdev->parent->devnum;
340#endif
Hans de Goededa166772014-09-20 16:51:22 +0200341
342 qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(ttdev->portnr) |
Simon Glassa194b252015-03-25 12:22:29 -0600343 QH_ENDPT2_HUBADDR(parent_devnum));
Hans de Goededa166772014-09-20 16:51:22 +0200344}
345
Michael Trimarchi241f7512008-11-28 13:20:46 +0100346static int
347ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
348 int length, struct devrequest *req)
349{
Tom Rini2cabcf72012-07-15 22:14:24 +0000350 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200351 struct qTD *qtd;
352 int qtd_count = 0;
Marek Vasut4f668312012-04-08 23:32:05 +0200353 int qtd_counter = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100354 volatile struct qTD *vtd;
355 unsigned long ts;
356 uint32_t *tdp;
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200357 uint32_t endpt, maxpacket, token, usbsts;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100358 uint32_t c, toggle;
michael0a326102008-12-10 17:55:19 +0100359 uint32_t cmd;
Simon Glassfd7f5132011-02-07 14:42:16 -0800360 int timeout;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100361 int ret = 0;
Simon Glasscb7cf602015-03-25 12:22:25 -0600362 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100363
michael0a326102008-12-10 17:55:19 +0100364 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
Michael Trimarchi241f7512008-11-28 13:20:46 +0100365 buffer, length, req);
366 if (req != NULL)
michael0a326102008-12-10 17:55:19 +0100367 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100368 req->request, req->request,
369 req->requesttype, req->requesttype,
370 le16_to_cpu(req->value), le16_to_cpu(req->value),
michael0a326102008-12-10 17:55:19 +0100371 le16_to_cpu(req->index));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100372
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200373#define PKT_ALIGN 512
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200374 /*
375 * The USB transfer is split into qTD transfers. Eeach qTD transfer is
376 * described by a transfer descriptor (the qTD). The qTDs form a linked
377 * list with a queue head (QH).
378 *
379 * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
380 * have its beginning in a qTD transfer and its end in the following
381 * one, so the qTD transfer lengths have to be chosen accordingly.
382 *
383 * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
384 * single pages. The first data buffer can start at any offset within a
385 * page (not considering the cache-line alignment issues), while the
386 * following buffers must be page-aligned. There is no alignment
387 * constraint on the size of a qTD transfer.
388 */
389 if (req != NULL)
390 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
391 qtd_count += 1 + 1;
392 if (length > 0 || req == NULL) {
393 /*
394 * Determine the qTD transfer size that will be used for the
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200395 * data payload (not considering the first qTD transfer, which
396 * may be longer or shorter, and the final one, which may be
397 * shorter).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200398 *
399 * In order to keep each packet within a qTD transfer, the qTD
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200400 * transfer size is aligned to PKT_ALIGN, which is a multiple of
401 * wMaxPacketSize (except in some cases for interrupt transfers,
402 * see comment in submit_int_msg()).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200403 *
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200404 * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200405 * QT_BUFFER_CNT full pages will be used.
406 */
407 int xfr_sz = QT_BUFFER_CNT;
408 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200409 * However, if the input buffer is not aligned to PKT_ALIGN, the
410 * qTD transfer size will be one page shorter, and the first qTD
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200411 * data buffer of each transfer will be page-unaligned.
412 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500413 if ((unsigned long)buffer & (PKT_ALIGN - 1))
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200414 xfr_sz--;
415 /* Convert the qTD transfer size to bytes. */
416 xfr_sz *= EHCI_PAGE_SIZE;
417 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200418 * Approximate by excess the number of qTDs that will be
419 * required for the data payload. The exact formula is way more
420 * complicated and saves at most 2 qTDs, i.e. a total of 128
421 * bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200422 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200423 qtd_count += 2 + length / xfr_sz;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200424 }
425/*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200426 * Threshold value based on the worst-case total size of the allocated qTDs for
427 * a mass-storage transfer of 65535 blocks of 512 bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200428 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200429#if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200430#warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
431#endif
432 qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
433 if (qtd == NULL) {
434 printf("unable to allocate TDs\n");
435 return -1;
436 }
437
Tom Rini2cabcf72012-07-15 22:14:24 +0000438 memset(qh, 0, sizeof(struct QH));
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200439 memset(qtd, 0, qtd_count * sizeof(*qtd));
Marek Vasut4f668312012-04-08 23:32:05 +0200440
Marek Vasutff24dc32012-04-09 04:07:46 +0200441 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
442
Marek Vasut285c8b32012-04-09 04:13:00 +0200443 /*
444 * Setup QH (3.6 in ehci-r10.pdf)
445 *
446 * qh_link ................. 03-00 H
447 * qh_endpt1 ............... 07-04 H
448 * qh_endpt2 ............... 0B-08 H
449 * - qh_curtd
450 * qh_overlay.qt_next ...... 13-10 H
451 * - qh_overlay.qt_altnext
452 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500453 qh->qh_link = cpu_to_hc32((unsigned long)&ctrl->qh_list | QH_LINK_TYPE_QH);
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000454 c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200455 maxpacket = usb_maxpacket(dev, pipe);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200456 endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200457 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200458 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000459 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200460 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
461 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
Tom Rini2cabcf72012-07-15 22:14:24 +0000462 qh->qh_endpt1 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200463 endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
Tom Rini2cabcf72012-07-15 22:14:24 +0000464 qh->qh_endpt2 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200465 ehci_update_endpt2_dev_n_port(dev, qh);
Tom Rini2cabcf72012-07-15 22:14:24 +0000466 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
Stephen Warren1907e5a2014-02-07 09:53:50 -0700467 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100468
Tom Rini2cabcf72012-07-15 22:14:24 +0000469 tdp = &qh->qh_overlay.qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100470
Michael Trimarchi241f7512008-11-28 13:20:46 +0100471 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200472 /*
473 * Setup request qTD (3.5 in ehci-r10.pdf)
474 *
475 * qt_next ................ 03-00 H
476 * qt_altnext ............. 07-04 H
477 * qt_token ............... 0B-08 H
478 *
479 * [ buffer, buffer_hi ] loaded with "req".
480 */
Marek Vasut4f668312012-04-08 23:32:05 +0200481 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
482 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200483 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
484 QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
485 QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
486 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200487 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200488 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
489 printf("unable to construct SETUP TD\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100490 goto fail;
491 }
Marek Vasut285c8b32012-04-09 04:13:00 +0200492 /* Update previous qTD! */
Rob Herringf14d54b2015-03-17 15:46:37 -0500493 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Marek Vasut4f668312012-04-08 23:32:05 +0200494 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100495 toggle = 1;
496 }
497
498 if (length > 0 || req == NULL) {
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200499 uint8_t *buf_ptr = buffer;
500 int left_length = length;
501
502 do {
503 /*
504 * Determine the size of this qTD transfer. By default,
505 * QT_BUFFER_CNT full pages can be used.
506 */
507 int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
508 /*
509 * However, if the input buffer is not page-aligned, the
510 * portion of the first page before the buffer start
511 * offset within that page is unusable.
512 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500513 xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200514 /*
515 * In order to keep each packet within a qTD transfer,
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200516 * align the qTD transfer size to PKT_ALIGN.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200517 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200518 xfr_bytes &= ~(PKT_ALIGN - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200519 /*
520 * This transfer may be shorter than the available qTD
521 * transfer size that has just been computed.
522 */
523 xfr_bytes = min(xfr_bytes, left_length);
524
525 /*
526 * Setup request qTD (3.5 in ehci-r10.pdf)
527 *
528 * qt_next ................ 03-00 H
529 * qt_altnext ............. 07-04 H
530 * qt_token ............... 0B-08 H
531 *
532 * [ buffer, buffer_hi ] loaded with "buffer".
533 */
534 qtd[qtd_counter].qt_next =
535 cpu_to_hc32(QT_NEXT_TERMINATE);
536 qtd[qtd_counter].qt_altnext =
537 cpu_to_hc32(QT_NEXT_TERMINATE);
538 token = QT_TOKEN_DT(toggle) |
539 QT_TOKEN_TOTALBYTES(xfr_bytes) |
540 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
541 QT_TOKEN_CERR(3) |
542 QT_TOKEN_PID(usb_pipein(pipe) ?
543 QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
544 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
545 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
546 if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
547 xfr_bytes)) {
548 printf("unable to construct DATA TD\n");
549 goto fail;
550 }
551 /* Update previous qTD! */
Rob Herringf14d54b2015-03-17 15:46:37 -0500552 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200553 tdp = &qtd[qtd_counter++].qt_next;
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200554 /*
555 * Data toggle has to be adjusted since the qTD transfer
556 * size is not always an even multiple of
557 * wMaxPacketSize.
558 */
559 if ((xfr_bytes / maxpacket) & 1)
560 toggle ^= 1;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200561 buf_ptr += xfr_bytes;
562 left_length -= xfr_bytes;
563 } while (left_length > 0);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100564 }
565
566 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200567 /*
568 * Setup request qTD (3.5 in ehci-r10.pdf)
569 *
570 * qt_next ................ 03-00 H
571 * qt_altnext ............. 07-04 H
572 * qt_token ............... 0B-08 H
573 */
Marek Vasut4f668312012-04-08 23:32:05 +0200574 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
575 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200576 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200577 QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
578 QT_TOKEN_PID(usb_pipein(pipe) ?
579 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
580 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200581 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Marek Vasut285c8b32012-04-09 04:13:00 +0200582 /* Update previous qTD! */
Rob Herringf14d54b2015-03-17 15:46:37 -0500583 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Marek Vasut4f668312012-04-08 23:32:05 +0200584 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100585 }
586
Rob Herringf14d54b2015-03-17 15:46:37 -0500587 ctrl->qh_list.qh_link = cpu_to_hc32((unsigned long)qh | QH_LINK_TYPE_QH);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100588
Stefan Roese25983c12009-01-21 17:12:19 +0100589 /* Flush dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500590 flush_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200591 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500592 flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
593 flush_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200594 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Stefan Roese25983c12009-01-21 17:12:19 +0100595
Ilya Yanok84309bb2012-07-15 22:12:08 +0000596 /* Set async. queue head pointer. */
Rob Herringf14d54b2015-03-17 15:46:37 -0500597 ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)&ctrl->qh_list);
Ilya Yanok84309bb2012-07-15 22:12:08 +0000598
Lucas Stach3494a4c2012-09-26 00:14:35 +0200599 usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
600 ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100601
602 /* Enable async. schedule. */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200603 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
michael0bf2a032008-12-11 13:43:55 +0100604 cmd |= CMD_ASE;
Lucas Stach3494a4c2012-09-26 00:14:35 +0200605 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael0a326102008-12-10 17:55:19 +0100606
Lucas Stach3494a4c2012-09-26 00:14:35 +0200607 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100608 100 * 1000);
609 if (ret < 0) {
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200610 printf("EHCI fail timeout STS_ASS set\n");
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100611 goto fail;
michael0bf2a032008-12-11 13:43:55 +0100612 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100613
614 /* Wait for TDs to be processed. */
615 ts = get_timer(0);
Marek Vasut4f668312012-04-08 23:32:05 +0200616 vtd = &qtd[qtd_counter - 1];
Simon Glassfd7f5132011-02-07 14:42:16 -0800617 timeout = USB_TIMEOUT_MS(pipe);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100618 do {
Stefan Roese25983c12009-01-21 17:12:19 +0100619 /* Invalidate dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500620 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200621 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500622 invalidate_dcache_range((unsigned long)qh,
Tom Rini2cabcf72012-07-15 22:14:24 +0000623 ALIGN_END_ADDR(struct QH, qh, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500624 invalidate_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200625 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Marek Vasutff24dc32012-04-09 04:07:46 +0200626
michael0a326102008-12-10 17:55:19 +0100627 token = hc32_to_cpu(vtd->qt_token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200628 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100629 break;
Stefan Roese86b34cf2010-11-26 15:43:28 +0100630 WATCHDOG_RESET();
Simon Glassfd7f5132011-02-07 14:42:16 -0800631 } while (get_timer(ts) < timeout);
632
Ilya Yanokfb113712012-07-15 04:43:49 +0000633 /*
634 * Invalidate the memory area occupied by buffer
635 * Don't try to fix the buffer alignment, if it isn't properly
636 * aligned it's upper layer's fault so let invalidate_dcache_range()
637 * vow about it. But we have to fix the length as it's actual
638 * transfer length and can be unaligned. This is potentially
639 * dangerous operation, it's responsibility of the calling
640 * code to make sure enough space is reserved.
641 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500642 invalidate_dcache_range((unsigned long)buffer,
643 ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
Marek Vasutff24dc32012-04-09 04:07:46 +0200644
Simon Glassfd7f5132011-02-07 14:42:16 -0800645 /* Check that the TD processing happened */
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200646 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
Simon Glassfd7f5132011-02-07 14:42:16 -0800647 printf("EHCI timed out on TD - token=%#x\n", token);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100648
649 /* Disable async schedule. */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200650 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
michael0a326102008-12-10 17:55:19 +0100651 cmd &= ~CMD_ASE;
Lucas Stach3494a4c2012-09-26 00:14:35 +0200652 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael0bf2a032008-12-11 13:43:55 +0100653
Lucas Stach3494a4c2012-09-26 00:14:35 +0200654 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100655 100 * 1000);
656 if (ret < 0) {
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200657 printf("EHCI fail timeout STS_ASS reset\n");
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100658 goto fail;
michael0bf2a032008-12-11 13:43:55 +0100659 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100660
Tom Rini2cabcf72012-07-15 22:14:24 +0000661 token = hc32_to_cpu(qh->qh_overlay.qt_token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200662 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
michael0a326102008-12-10 17:55:19 +0100663 debug("TOKEN=%#x\n", token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200664 switch (QT_TOKEN_GET_STATUS(token) &
665 ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100666 case 0:
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200667 toggle = QT_TOKEN_GET_DT(token);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100668 usb_settoggle(dev, usb_pipeendpoint(pipe),
669 usb_pipeout(pipe), toggle);
670 dev->status = 0;
671 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200672 case QT_TOKEN_STATUS_HALTED:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100673 dev->status = USB_ST_STALLED;
674 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200675 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
676 case QT_TOKEN_STATUS_DATBUFERR:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100677 dev->status = USB_ST_BUF_ERR;
678 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200679 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
680 case QT_TOKEN_STATUS_BABBLEDET:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100681 dev->status = USB_ST_BABBLE_DET;
682 break;
683 default:
684 dev->status = USB_ST_CRC_ERR;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200685 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
Anatolij Gustschine1e09312010-11-02 11:47:29 +0100686 dev->status |= USB_ST_STALLED;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100687 break;
688 }
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200689 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100690 } else {
691 dev->act_len = 0;
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800692#ifndef CONFIG_USB_EHCI_FARADAY
michael0a326102008-12-10 17:55:19 +0100693 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
Lucas Stach3494a4c2012-09-26 00:14:35 +0200694 dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
695 ehci_readl(&ctrl->hcor->or_portsc[0]),
696 ehci_readl(&ctrl->hcor->or_portsc[1]));
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800697#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +0100698 }
699
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200700 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100701 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
702
703fail:
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200704 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100705 return -1;
706}
707
Simon Glasscb7cf602015-03-25 12:22:25 -0600708static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
709 void *buffer, int length, struct devrequest *req)
Michael Trimarchi241f7512008-11-28 13:20:46 +0100710{
711 uint8_t tmpbuf[4];
712 u16 typeReq;
michael0a326102008-12-10 17:55:19 +0100713 void *srcptr = NULL;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100714 int len, srclen;
715 uint32_t reg;
Remy Böhmer33e87482008-12-13 22:51:58 +0100716 uint32_t *status_reg;
Julius Wernerd4046702013-02-28 18:08:40 +0000717 int port = le16_to_cpu(req->index) & 0xff;
Simon Glasscb7cf602015-03-25 12:22:25 -0600718 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100719
720 srclen = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100721
michael0a326102008-12-10 17:55:19 +0100722 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100723 req->request, req->request,
724 req->requesttype, req->requesttype,
725 le16_to_cpu(req->value), le16_to_cpu(req->index));
726
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530727 typeReq = req->request | req->requesttype << 8;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100728
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530729 switch (typeReq) {
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800730 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
731 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
732 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600733 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
Kuo-Jung Su6a656df2013-05-15 15:29:21 +0800734 if (!status_reg)
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800735 return -1;
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800736 break;
737 default:
738 status_reg = NULL;
739 break;
740 }
741
742 switch (typeReq) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100743 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
744 switch (le16_to_cpu(req->value) >> 8) {
745 case USB_DT_DEVICE:
michael0a326102008-12-10 17:55:19 +0100746 debug("USB_DT_DEVICE request\n");
747 srcptr = &descriptor.device;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200748 srclen = descriptor.device.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100749 break;
750 case USB_DT_CONFIG:
michael0a326102008-12-10 17:55:19 +0100751 debug("USB_DT_CONFIG config\n");
752 srcptr = &descriptor.config;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200753 srclen = descriptor.config.bLength +
754 descriptor.interface.bLength +
755 descriptor.endpoint.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100756 break;
757 case USB_DT_STRING:
michael0a326102008-12-10 17:55:19 +0100758 debug("USB_DT_STRING config\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100759 switch (le16_to_cpu(req->value) & 0xff) {
760 case 0: /* Language */
761 srcptr = "\4\3\1\0";
762 srclen = 4;
763 break;
764 case 1: /* Vendor */
765 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
766 srclen = 14;
767 break;
768 case 2: /* Product */
769 srcptr = "\52\3E\0H\0C\0I\0 "
770 "\0H\0o\0s\0t\0 "
771 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
772 srclen = 42;
773 break;
774 default:
michael0a326102008-12-10 17:55:19 +0100775 debug("unknown value DT_STRING %x\n",
776 le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100777 goto unknown;
778 }
779 break;
780 default:
michael0a326102008-12-10 17:55:19 +0100781 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100782 goto unknown;
783 }
784 break;
785 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
786 switch (le16_to_cpu(req->value) >> 8) {
787 case USB_DT_HUB:
michael0a326102008-12-10 17:55:19 +0100788 debug("USB_DT_HUB config\n");
789 srcptr = &descriptor.hub;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200790 srclen = descriptor.hub.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100791 break;
792 default:
michael0a326102008-12-10 17:55:19 +0100793 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100794 goto unknown;
795 }
796 break;
797 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
michael0a326102008-12-10 17:55:19 +0100798 debug("USB_REQ_SET_ADDRESS\n");
Lucas Stach3494a4c2012-09-26 00:14:35 +0200799 ctrl->rootdev = le16_to_cpu(req->value);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100800 break;
801 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
michael0a326102008-12-10 17:55:19 +0100802 debug("USB_REQ_SET_CONFIGURATION\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100803 /* Nothing to do */
804 break;
805 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
806 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
807 tmpbuf[1] = 0;
808 srcptr = tmpbuf;
809 srclen = 2;
810 break;
michael0a326102008-12-10 17:55:19 +0100811 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
Michael Trimarchi241f7512008-11-28 13:20:46 +0100812 memset(tmpbuf, 0, 4);
Remy Böhmer33e87482008-12-13 22:51:58 +0100813 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100814 if (reg & EHCI_PS_CS)
815 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
816 if (reg & EHCI_PS_PE)
817 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
818 if (reg & EHCI_PS_SUSP)
819 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
820 if (reg & EHCI_PS_OCA)
821 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300822 if (reg & EHCI_PS_PR)
823 tmpbuf[0] |= USB_PORT_STAT_RESET;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100824 if (reg & EHCI_PS_PP)
825 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
Stefan Roese497f1842009-01-21 17:12:01 +0100826
827 if (ehci_is_TDI()) {
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600828 switch (ctrl->ops.get_port_speed(ctrl, reg)) {
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200829 case PORTSC_PSPD_FS:
Stefan Roese497f1842009-01-21 17:12:01 +0100830 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200831 case PORTSC_PSPD_LS:
Stefan Roese497f1842009-01-21 17:12:01 +0100832 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
833 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200834 case PORTSC_PSPD_HS:
Stefan Roese497f1842009-01-21 17:12:01 +0100835 default:
836 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
837 break;
838 }
839 } else {
840 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
841 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100842
843 if (reg & EHCI_PS_CSC)
844 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
845 if (reg & EHCI_PS_PEC)
846 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
847 if (reg & EHCI_PS_OCC)
848 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
Julius Wernerd4046702013-02-28 18:08:40 +0000849 if (ctrl->portreset & (1 << port))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100850 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
Remy Böhmer33e87482008-12-13 22:51:58 +0100851
Michael Trimarchi241f7512008-11-28 13:20:46 +0100852 srcptr = tmpbuf;
853 srclen = 4;
854 break;
michael0a326102008-12-10 17:55:19 +0100855 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100856 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100857 reg &= ~EHCI_PS_CLEAR;
858 switch (le16_to_cpu(req->value)) {
michael0bf2a032008-12-11 13:43:55 +0100859 case USB_PORT_FEAT_ENABLE:
860 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100861 ehci_writel(status_reg, reg);
michael0bf2a032008-12-11 13:43:55 +0100862 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100863 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200864 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
Remy Böhmer33e87482008-12-13 22:51:58 +0100865 reg |= EHCI_PS_PP;
866 ehci_writel(status_reg, reg);
867 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100868 break;
869 case USB_PORT_FEAT_RESET:
Remy Böhmer33e87482008-12-13 22:51:58 +0100870 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
871 !ehci_is_TDI() &&
872 EHCI_PS_IS_LOWSPEED(reg)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100873 /* Low speed device, give up ownership. */
Remy Böhmer33e87482008-12-13 22:51:58 +0100874 debug("port %d low speed --> companion\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000875 port - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100876 reg |= EHCI_PS_PO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100877 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200878 return -ENXIO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100879 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300880 int ret;
881
Remy Böhmer33e87482008-12-13 22:51:58 +0100882 reg |= EHCI_PS_PR;
883 reg &= ~EHCI_PS_PE;
884 ehci_writel(status_reg, reg);
885 /*
886 * caller must wait, then call GetPortStatus
887 * usb 2.0 specification say 50 ms resets on
888 * root
889 */
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600890 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
Marek Vasut09734772011-07-11 02:37:01 +0200891
Chris Zhangfddf6d62010-01-06 13:34:04 -0800892 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300893 /*
894 * A host controller must terminate the reset
895 * and stabilize the state of the port within
896 * 2 milliseconds
897 */
898 ret = handshake(status_reg, EHCI_PS_PR, 0,
899 2 * 1000);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200900 if (!ret) {
901 reg = ehci_readl(status_reg);
902 if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
903 == EHCI_PS_CS && !ehci_is_TDI()) {
904 debug("port %d full speed --> companion\n", port - 1);
905 reg &= ~EHCI_PS_CLEAR;
906 reg |= EHCI_PS_PO;
907 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200908 return -ENXIO;
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200909 } else {
910 ctrl->portreset |= 1 << port;
911 }
912 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300913 printf("port(%d) reset error\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000914 port - 1);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200915 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100916 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100917 break;
Julius Wernerd4046702013-02-28 18:08:40 +0000918 case USB_PORT_FEAT_TEST:
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700919 ehci_shutdown(ctrl);
Julius Wernerd4046702013-02-28 18:08:40 +0000920 reg &= ~(0xf << 16);
921 reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
922 ehci_writel(status_reg, reg);
923 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100924 default:
michael0a326102008-12-10 17:55:19 +0100925 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100926 goto unknown;
927 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100928 /* unblock posted writes */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200929 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100930 break;
michael0a326102008-12-10 17:55:19 +0100931 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100932 reg = ehci_readl(status_reg);
Simon Glass0554ba52013-05-10 19:49:00 -0700933 reg &= ~EHCI_PS_CLEAR;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100934 switch (le16_to_cpu(req->value)) {
935 case USB_PORT_FEAT_ENABLE:
936 reg &= ~EHCI_PS_PE;
937 break;
Remy Böhmer33e87482008-12-13 22:51:58 +0100938 case USB_PORT_FEAT_C_ENABLE:
Simon Glass0554ba52013-05-10 19:49:00 -0700939 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100940 break;
941 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200942 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
Simon Glass0554ba52013-05-10 19:49:00 -0700943 reg &= ~EHCI_PS_PP;
944 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100945 case USB_PORT_FEAT_C_CONNECTION:
Simon Glass0554ba52013-05-10 19:49:00 -0700946 reg |= EHCI_PS_CSC;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100947 break;
michael0bf2a032008-12-11 13:43:55 +0100948 case USB_PORT_FEAT_OVER_CURRENT:
Simon Glass0554ba52013-05-10 19:49:00 -0700949 reg |= EHCI_PS_OCC;
michael0bf2a032008-12-11 13:43:55 +0100950 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100951 case USB_PORT_FEAT_C_RESET:
Julius Wernerd4046702013-02-28 18:08:40 +0000952 ctrl->portreset &= ~(1 << port);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100953 break;
954 default:
michael0a326102008-12-10 17:55:19 +0100955 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100956 goto unknown;
957 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100958 ehci_writel(status_reg, reg);
959 /* unblock posted write */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200960 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100961 break;
962 default:
michael0a326102008-12-10 17:55:19 +0100963 debug("Unknown request\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100964 goto unknown;
965 }
966
Mike Frysinger60ce19a2012-03-05 13:47:00 +0000967 mdelay(1);
Masahiro Yamadadb204642014-11-07 03:03:31 +0900968 len = min3(srclen, (int)le16_to_cpu(req->length), length);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100969 if (srcptr != NULL && len > 0)
970 memcpy(buffer, srcptr, len);
michael0a326102008-12-10 17:55:19 +0100971 else
972 debug("Len is 0\n");
973
Michael Trimarchi241f7512008-11-28 13:20:46 +0100974 dev->act_len = len;
975 dev->status = 0;
976 return 0;
977
978unknown:
michael0a326102008-12-10 17:55:19 +0100979 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100980 req->requesttype, req->request, le16_to_cpu(req->value),
981 le16_to_cpu(req->index), le16_to_cpu(req->length));
982
983 dev->act_len = 0;
984 dev->status = USB_ST_STALLED;
985 return -1;
986}
987
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600988const struct ehci_ops default_ehci_ops = {
989 .set_usb_mode = ehci_set_usbmode,
990 .get_port_speed = ehci_get_port_speed,
991 .powerup_fixup = ehci_powerup_fixup,
992 .get_portsc_register = ehci_get_portsc_register,
993};
994
995static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
Simon Glass0851caa2015-03-25 12:22:19 -0600996{
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600997 if (!ops) {
998 ctrl->ops = default_ehci_ops;
999 } else {
1000 ctrl->ops = *ops;
1001 if (!ctrl->ops.set_usb_mode)
1002 ctrl->ops.set_usb_mode = ehci_set_usbmode;
1003 if (!ctrl->ops.get_port_speed)
1004 ctrl->ops.get_port_speed = ehci_get_port_speed;
1005 if (!ctrl->ops.powerup_fixup)
1006 ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1007 if (!ctrl->ops.get_portsc_register)
1008 ctrl->ops.get_portsc_register =
1009 ehci_get_portsc_register;
1010 }
Simon Glass0851caa2015-03-25 12:22:19 -06001011}
1012
Simon Glassa194b252015-03-25 12:22:29 -06001013#ifndef CONFIG_DM_USB
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001014void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1015{
1016 struct ehci_ctrl *ctrl = &ehcic[index];
1017
1018 ctrl->priv = priv;
1019 ehci_setup_ops(ctrl, ops);
1020}
1021
Simon Glass0851caa2015-03-25 12:22:19 -06001022void *ehci_get_controller_priv(int index)
1023{
1024 return ehcic[index].priv;
1025}
Simon Glassa194b252015-03-25 12:22:29 -06001026#endif
Simon Glass0851caa2015-03-25 12:22:19 -06001027
Simon Glassccc40fd2015-03-25 12:22:26 -06001028static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001029{
Lucas Stach3494a4c2012-09-26 00:14:35 +02001030 struct QH *qh_list;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001031 struct QH *periodic;
Simon Glassccc40fd2015-03-25 12:22:26 -06001032 uint32_t reg;
1033 uint32_t cmd;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001034 int i;
michael0bf2a032008-12-11 13:43:55 +01001035
Vincent Palatin0d6f77c2012-12-12 17:55:22 -08001036 /* Set the high address word (aka segment) for 64-bit controller */
Simon Glassccc40fd2015-03-25 12:22:26 -06001037 if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1038 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
Stefan Roese2e98fc72009-01-21 17:12:10 +01001039
Simon Glassccc40fd2015-03-25 12:22:26 -06001040 qh_list = &ctrl->qh_list;
Lucas Stach3494a4c2012-09-26 00:14:35 +02001041
Michael Trimarchi241f7512008-11-28 13:20:46 +01001042 /* Set head of reclaim list */
Tom Rini2cabcf72012-07-15 22:14:24 +00001043 memset(qh_list, 0, sizeof(*qh_list));
Rob Herringf14d54b2015-03-17 15:46:37 -05001044 qh_list->qh_link = cpu_to_hc32((unsigned long)qh_list | QH_LINK_TYPE_QH);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001045 qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1046 QH_ENDPT1_EPS(USB_SPEED_HIGH));
Tom Rini2cabcf72012-07-15 22:14:24 +00001047 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1048 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001049 qh_list->qh_overlay.qt_token =
1050 cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
Michael Trimarchi241f7512008-11-28 13:20:46 +01001051
Rob Herringf14d54b2015-03-17 15:46:37 -05001052 flush_dcache_range((unsigned long)qh_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001053 ALIGN_END_ADDR(struct QH, qh_list, 1));
1054
Patrick Georgie55fdac2013-03-06 14:08:31 +00001055 /* Set async. queue head pointer. */
Simon Glassccc40fd2015-03-25 12:22:26 -06001056 ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)qh_list);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001057
1058 /*
1059 * Set up periodic list
1060 * Step 1: Parent QH for all periodic transfers.
1061 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001062 ctrl->periodic_schedules = 0;
1063 periodic = &ctrl->periodic_queue;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001064 memset(periodic, 0, sizeof(*periodic));
1065 periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1066 periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1067 periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1068
Rob Herringf14d54b2015-03-17 15:46:37 -05001069 flush_dcache_range((unsigned long)periodic,
Stephen Warren36dad662013-05-24 15:03:17 -06001070 ALIGN_END_ADDR(struct QH, periodic, 1));
1071
Patrick Georgie55fdac2013-03-06 14:08:31 +00001072 /*
1073 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1074 * In particular, device specifications on polling frequency
1075 * are disregarded. Keyboards seem to send NAK/NYet reliably
1076 * when polled with an empty buffer.
1077 *
1078 * Split Transactions will be spread across microframes using
1079 * S-mask and C-mask.
1080 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001081 if (ctrl->periodic_list == NULL)
1082 ctrl->periodic_list = memalign(4096, 1024 * 4);
Nikita Kiryanov2f13e442013-07-29 13:27:40 +03001083
Simon Glassccc40fd2015-03-25 12:22:26 -06001084 if (!ctrl->periodic_list)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001085 return -ENOMEM;
1086 for (i = 0; i < 1024; i++) {
Simon Glassccc40fd2015-03-25 12:22:26 -06001087 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
Adrian Cox29d05872014-04-10 13:29:45 +01001088 | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001089 }
1090
Simon Glassccc40fd2015-03-25 12:22:26 -06001091 flush_dcache_range((unsigned long)ctrl->periodic_list,
1092 ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001093 1024));
1094
Patrick Georgie55fdac2013-03-06 14:08:31 +00001095 /* Set periodic list base address */
Simon Glassccc40fd2015-03-25 12:22:26 -06001096 ehci_writel(&ctrl->hcor->or_periodiclistbase,
1097 (unsigned long)ctrl->periodic_list);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001098
Simon Glassccc40fd2015-03-25 12:22:26 -06001099 reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
michael0bf2a032008-12-11 13:43:55 +01001100 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
Lucas Stachf5b34082012-09-28 00:26:19 +02001101 debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
Remy Böhmer33e87482008-12-13 22:51:58 +01001102 /* Port Indicators */
1103 if (HCS_INDICATOR(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001104 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1105 | 0x80, &descriptor.hub.wHubCharacteristics);
Remy Böhmer33e87482008-12-13 22:51:58 +01001106 /* Port Power Control */
1107 if (HCS_PPC(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001108 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1109 | 0x01, &descriptor.hub.wHubCharacteristics);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001110
Michael Trimarchi241f7512008-11-28 13:20:46 +01001111 /* Start the host controller. */
Simon Glassccc40fd2015-03-25 12:22:26 -06001112 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Wolfgang Denkfb718e12009-02-12 00:08:39 +01001113 /*
1114 * Philips, Intel, and maybe others need CMD_RUN before the
1115 * root hub will detect new devices (why?); NEC doesn't
1116 */
michael0bf2a032008-12-11 13:43:55 +01001117 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1118 cmd |= CMD_RUN;
Simon Glassccc40fd2015-03-25 12:22:26 -06001119 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael0bf2a032008-12-11 13:43:55 +01001120
Simon Glassccc40fd2015-03-25 12:22:26 -06001121 if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1122 /* take control over the ports */
1123 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1124 cmd |= FLAG_CF;
1125 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1126 }
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +08001127
Remy Böhmer33e87482008-12-13 22:51:58 +01001128 /* unblock posted write */
Simon Glassccc40fd2015-03-25 12:22:26 -06001129 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001130 mdelay(5);
Simon Glassccc40fd2015-03-25 12:22:26 -06001131 reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
Remy Böhmer33e87482008-12-13 22:51:58 +01001132 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001133
Simon Glassccc40fd2015-03-25 12:22:26 -06001134 return 0;
1135}
1136
Simon Glassa194b252015-03-25 12:22:29 -06001137#ifndef CONFIG_DM_USB
Simon Glassccc40fd2015-03-25 12:22:26 -06001138int usb_lowlevel_stop(int index)
1139{
1140 ehci_shutdown(&ehcic[index]);
1141 return ehci_hcd_stop(index);
1142}
1143
1144int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1145{
1146 struct ehci_ctrl *ctrl = &ehcic[index];
1147 uint tweaks = 0;
1148 int rc;
1149
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001150 /**
1151 * Set ops to default_ehci_ops, ehci_hcd_init should call
1152 * ehci_set_controller_priv to change any of these function pointers.
1153 */
1154 ctrl->ops = default_ehci_ops;
1155
Simon Glassccc40fd2015-03-25 12:22:26 -06001156 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1157 if (rc)
1158 return rc;
1159 if (init == USB_INIT_DEVICE)
1160 goto done;
1161
1162 /* EHCI spec section 4.1 */
Simon Glass302696b2015-03-25 12:22:28 -06001163 if (ehci_reset(ctrl))
Simon Glassccc40fd2015-03-25 12:22:26 -06001164 return -1;
1165
1166#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1167 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1168 if (rc)
1169 return rc;
1170#endif
1171#ifdef CONFIG_USB_EHCI_FARADAY
1172 tweaks |= EHCI_TWEAK_NO_INIT_CF;
1173#endif
1174 rc = ehci_common_init(ctrl, tweaks);
1175 if (rc)
1176 return rc;
1177
1178 ctrl->rootdev = 0;
Troy Kisky7d6bbb92013-10-10 15:27:57 -07001179done:
Lucas Stach3494a4c2012-09-26 00:14:35 +02001180 *controller = &ehcic[index];
Michael Trimarchi241f7512008-11-28 13:20:46 +01001181 return 0;
1182}
Simon Glassa194b252015-03-25 12:22:29 -06001183#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +01001184
Simon Glasscb7cf602015-03-25 12:22:25 -06001185static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1186 void *buffer, int length)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001187{
1188
1189 if (usb_pipetype(pipe) != PIPE_BULK) {
1190 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1191 return -1;
1192 }
1193 return ehci_submit_async(dev, pipe, buffer, length, NULL);
1194}
1195
Simon Glasscb7cf602015-03-25 12:22:25 -06001196static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1197 void *buffer, int length,
1198 struct devrequest *setup)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001199{
Simon Glasscb7cf602015-03-25 12:22:25 -06001200 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001201
1202 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1203 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1204 return -1;
1205 }
1206
Lucas Stach3494a4c2012-09-26 00:14:35 +02001207 if (usb_pipedevice(pipe) == ctrl->rootdev) {
1208 if (!ctrl->rootdev)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001209 dev->speed = USB_SPEED_HIGH;
1210 return ehci_submit_root(dev, pipe, buffer, length, setup);
1211 }
1212 return ehci_submit_async(dev, pipe, buffer, length, setup);
1213}
1214
Patrick Georgie55fdac2013-03-06 14:08:31 +00001215struct int_queue {
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001216 int elementsize;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001217 struct QH *first;
1218 struct QH *current;
1219 struct QH *last;
1220 struct qTD *tds;
1221};
1222
Rob Herringf14d54b2015-03-17 15:46:37 -05001223#define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001224
1225static int
1226enable_periodic(struct ehci_ctrl *ctrl)
1227{
1228 uint32_t cmd;
1229 struct ehci_hcor *hcor = ctrl->hcor;
1230 int ret;
1231
1232 cmd = ehci_readl(&hcor->or_usbcmd);
1233 cmd |= CMD_PSE;
1234 ehci_writel(&hcor->or_usbcmd, cmd);
1235
1236 ret = handshake((uint32_t *)&hcor->or_usbsts,
1237 STS_PSS, STS_PSS, 100 * 1000);
1238 if (ret < 0) {
1239 printf("EHCI failed: timeout when enabling periodic list\n");
1240 return -ETIMEDOUT;
1241 }
1242 udelay(1000);
1243 return 0;
1244}
1245
1246static int
1247disable_periodic(struct ehci_ctrl *ctrl)
1248{
1249 uint32_t cmd;
1250 struct ehci_hcor *hcor = ctrl->hcor;
1251 int ret;
1252
1253 cmd = ehci_readl(&hcor->or_usbcmd);
1254 cmd &= ~CMD_PSE;
1255 ehci_writel(&hcor->or_usbcmd, cmd);
1256
1257 ret = handshake((uint32_t *)&hcor->or_usbsts,
1258 STS_PSS, 0, 100 * 1000);
1259 if (ret < 0) {
1260 printf("EHCI failed: timeout when disabling periodic list\n");
1261 return -ETIMEDOUT;
1262 }
1263 return 0;
1264}
1265
Hans de Goede53ca9de2015-05-11 20:43:52 +02001266static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1267 unsigned long pipe, int queuesize, int elementsize,
1268 void *buffer, int interval)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001269{
Simon Glasscb7cf602015-03-25 12:22:25 -06001270 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001271 struct int_queue *result = NULL;
1272 int i;
1273
Hans de Goede7f7cb732014-09-24 14:06:04 +02001274 /*
1275 * Interrupt transfers requiring several transactions are not supported
1276 * because bInterval is ignored.
1277 *
1278 * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1279 * <= PKT_ALIGN if several qTDs are required, while the USB
1280 * specification does not constrain this for interrupt transfers. That
1281 * means that ehci_submit_async() would support interrupt transfers
1282 * requiring several transactions only as long as the transfer size does
1283 * not require more than a single qTD.
1284 */
1285 if (elementsize > usb_maxpacket(dev, pipe)) {
1286 printf("%s: xfers requiring several transactions are not supported.\n",
1287 __func__);
1288 return NULL;
1289 }
1290
Patrick Georgie55fdac2013-03-06 14:08:31 +00001291 debug("Enter create_int_queue\n");
1292 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1293 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1294 return NULL;
1295 }
1296
1297 /* limit to 4 full pages worth of data -
1298 * we can safely fit them in a single TD,
1299 * no matter the alignment
1300 */
1301 if (elementsize >= 16384) {
1302 debug("too large elements for interrupt transfers\n");
1303 return NULL;
1304 }
1305
1306 result = malloc(sizeof(*result));
1307 if (!result) {
1308 debug("ehci intr queue: out of memory\n");
1309 goto fail1;
1310 }
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001311 result->elementsize = elementsize;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001312 result->first = memalign(USB_DMA_MINALIGN,
1313 sizeof(struct QH) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001314 if (!result->first) {
1315 debug("ehci intr queue: out of memory\n");
1316 goto fail2;
1317 }
1318 result->current = result->first;
1319 result->last = result->first + queuesize - 1;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001320 result->tds = memalign(USB_DMA_MINALIGN,
1321 sizeof(struct qTD) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001322 if (!result->tds) {
1323 debug("ehci intr queue: out of memory\n");
1324 goto fail3;
1325 }
1326 memset(result->first, 0, sizeof(struct QH) * queuesize);
1327 memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1328
1329 for (i = 0; i < queuesize; i++) {
1330 struct QH *qh = result->first + i;
1331 struct qTD *td = result->tds + i;
1332 void **buf = &qh->buffer;
1333
Rob Herringf14d54b2015-03-17 15:46:37 -05001334 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001335 if (i == queuesize - 1)
Adrian Cox29d05872014-04-10 13:29:45 +01001336 qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001337
Rob Herringf14d54b2015-03-17 15:46:37 -05001338 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
Adrian Cox29d05872014-04-10 13:29:45 +01001339 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1340 qh->qh_endpt1 =
1341 cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001342 (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1343 (1 << 14) |
1344 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1345 (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
Adrian Cox29d05872014-04-10 13:29:45 +01001346 (usb_pipedevice(pipe) << 0));
1347 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1348 (1 << 0)); /* S-mask: microframe 0 */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001349 if (dev->speed == USB_SPEED_LOW ||
1350 dev->speed == USB_SPEED_FULL) {
Hans de Goededa166772014-09-20 16:51:22 +02001351 /* C-mask: microframes 2-4 */
1352 qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001353 }
Hans de Goededa166772014-09-20 16:51:22 +02001354 ehci_update_endpt2_dev_n_port(dev, qh);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001355
Adrian Cox29d05872014-04-10 13:29:45 +01001356 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1357 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001358 debug("communication direction is '%s'\n",
1359 usb_pipein(pipe) ? "in" : "out");
Adrian Cox29d05872014-04-10 13:29:45 +01001360 td->qt_token = cpu_to_hc32((elementsize << 16) |
Patrick Georgie55fdac2013-03-06 14:08:31 +00001361 ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
Adrian Cox29d05872014-04-10 13:29:45 +01001362 0x80); /* active */
1363 td->qt_buffer[0] =
Rob Herringf14d54b2015-03-17 15:46:37 -05001364 cpu_to_hc32((unsigned long)buffer + i * elementsize);
Adrian Cox29d05872014-04-10 13:29:45 +01001365 td->qt_buffer[1] =
1366 cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1367 td->qt_buffer[2] =
1368 cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1369 td->qt_buffer[3] =
1370 cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1371 td->qt_buffer[4] =
1372 cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001373
1374 *buf = buffer + i * elementsize;
1375 }
1376
Rob Herringf14d54b2015-03-17 15:46:37 -05001377 flush_dcache_range((unsigned long)buffer,
Stephen Warren36dad662013-05-24 15:03:17 -06001378 ALIGN_END_ADDR(char, buffer,
1379 queuesize * elementsize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001380 flush_dcache_range((unsigned long)result->first,
Stephen Warren36dad662013-05-24 15:03:17 -06001381 ALIGN_END_ADDR(struct QH, result->first,
1382 queuesize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001383 flush_dcache_range((unsigned long)result->tds,
Stephen Warren36dad662013-05-24 15:03:17 -06001384 ALIGN_END_ADDR(struct qTD, result->tds,
1385 queuesize));
1386
Hans de Goede8ba55ed2014-09-24 14:06:03 +02001387 if (ctrl->periodic_schedules > 0) {
1388 if (disable_periodic(ctrl) < 0) {
1389 debug("FATAL: periodic should never fail, but did");
1390 goto fail3;
1391 }
Patrick Georgie55fdac2013-03-06 14:08:31 +00001392 }
1393
1394 /* hook up to periodic list */
1395 struct QH *list = &ctrl->periodic_queue;
1396 result->last->qh_link = list->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001397 list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001398
Rob Herringf14d54b2015-03-17 15:46:37 -05001399 flush_dcache_range((unsigned long)result->last,
Stephen Warren36dad662013-05-24 15:03:17 -06001400 ALIGN_END_ADDR(struct QH, result->last, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -05001401 flush_dcache_range((unsigned long)list,
Stephen Warren36dad662013-05-24 15:03:17 -06001402 ALIGN_END_ADDR(struct QH, list, 1));
1403
Patrick Georgie55fdac2013-03-06 14:08:31 +00001404 if (enable_periodic(ctrl) < 0) {
1405 debug("FATAL: periodic should never fail, but did");
1406 goto fail3;
1407 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001408 ctrl->periodic_schedules++;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001409
1410 debug("Exit create_int_queue\n");
1411 return result;
1412fail3:
1413 if (result->tds)
1414 free(result->tds);
1415fail2:
1416 if (result->first)
1417 free(result->first);
1418 if (result)
1419 free(result);
1420fail1:
1421 return NULL;
1422}
1423
Hans de Goede53ca9de2015-05-11 20:43:52 +02001424static void *_ehci_poll_int_queue(struct usb_device *dev,
1425 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001426{
1427 struct QH *cur = queue->current;
Hans de Goede9db174c2014-09-20 16:51:24 +02001428 struct qTD *cur_td;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001429
1430 /* depleted queue */
1431 if (cur == NULL) {
1432 debug("Exit poll_int_queue with completed queue\n");
1433 return NULL;
1434 }
1435 /* still active */
Hans de Goede9db174c2014-09-20 16:51:24 +02001436 cur_td = &queue->tds[queue->current - queue->first];
Rob Herringf14d54b2015-03-17 15:46:37 -05001437 invalidate_dcache_range((unsigned long)cur_td,
Hans de Goede9db174c2014-09-20 16:51:24 +02001438 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1439 if (QT_TOKEN_GET_STATUS(hc32_to_cpu(cur_td->qt_token)) &
1440 QT_TOKEN_STATUS_ACTIVE) {
1441 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n",
1442 hc32_to_cpu(cur_td->qt_token));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001443 return NULL;
1444 }
1445 if (!(cur->qh_link & QH_LINK_TERMINATE))
1446 queue->current++;
1447 else
1448 queue->current = NULL;
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001449
Rob Herringf14d54b2015-03-17 15:46:37 -05001450 invalidate_dcache_range((unsigned long)cur->buffer,
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001451 ALIGN_END_ADDR(char, cur->buffer,
1452 queue->elementsize));
1453
Hans de Goede9db174c2014-09-20 16:51:24 +02001454 debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1455 hc32_to_cpu(cur_td->qt_token), cur, queue->first);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001456 return cur->buffer;
1457}
1458
1459/* Do not free buffers associated with QHs, they're owned by someone else */
Hans de Goede53ca9de2015-05-11 20:43:52 +02001460static int _ehci_destroy_int_queue(struct usb_device *dev,
1461 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001462{
Simon Glasscb7cf602015-03-25 12:22:25 -06001463 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001464 int result = -1;
1465 unsigned long timeout;
1466
1467 if (disable_periodic(ctrl) < 0) {
1468 debug("FATAL: periodic should never fail, but did");
1469 goto out;
1470 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001471 ctrl->periodic_schedules--;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001472
1473 struct QH *cur = &ctrl->periodic_queue;
1474 timeout = get_timer(0) + 500; /* abort after 500ms */
Adrian Cox29d05872014-04-10 13:29:45 +01001475 while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001476 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1477 if (NEXT_QH(cur) == queue->first) {
1478 debug("found candidate. removing from chain\n");
1479 cur->qh_link = queue->last->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001480 flush_dcache_range((unsigned long)cur,
Hans de Goede8e00cf62014-09-20 16:51:23 +02001481 ALIGN_END_ADDR(struct QH, cur, 1));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001482 result = 0;
1483 break;
1484 }
1485 cur = NEXT_QH(cur);
1486 if (get_timer(0) > timeout) {
1487 printf("Timeout destroying interrupt endpoint queue\n");
1488 result = -1;
1489 goto out;
1490 }
1491 }
1492
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001493 if (ctrl->periodic_schedules > 0) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001494 result = enable_periodic(ctrl);
1495 if (result < 0)
1496 debug("FATAL: periodic should never fail, but did");
1497 }
1498
1499out:
1500 free(queue->tds);
1501 free(queue->first);
1502 free(queue);
1503
1504 return result;
1505}
1506
Simon Glasscb7cf602015-03-25 12:22:25 -06001507static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1508 void *buffer, int length, int interval)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001509{
Patrick Georgie55fdac2013-03-06 14:08:31 +00001510 void *backbuffer;
1511 struct int_queue *queue;
1512 unsigned long timeout;
1513 int result = 0, ret;
1514
Michael Trimarchi241f7512008-11-28 13:20:46 +01001515 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1516 dev, pipe, buffer, length, interval);
Benoît Thébaudeau58c4dfb2012-08-09 23:50:44 +02001517
Hans de Goede53ca9de2015-05-11 20:43:52 +02001518 queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
Hans de Goede7f7cb732014-09-24 14:06:04 +02001519 if (!queue)
1520 return -1;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001521
1522 timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
Hans de Goede53ca9de2015-05-11 20:43:52 +02001523 while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001524 if (get_timer(0) > timeout) {
1525 printf("Timeout poll on interrupt endpoint\n");
1526 result = -ETIMEDOUT;
1527 break;
1528 }
1529
1530 if (backbuffer != buffer) {
Rob Herringf14d54b2015-03-17 15:46:37 -05001531 debug("got wrong buffer back (%p instead of %p)\n",
1532 backbuffer, buffer);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001533 return -EINVAL;
1534 }
1535
Hans de Goede53ca9de2015-05-11 20:43:52 +02001536 ret = _ehci_destroy_int_queue(dev, queue);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001537 if (ret < 0)
1538 return ret;
1539
1540 /* everything worked out fine */
1541 return result;
Marek Vasut9b315fe2011-09-25 21:07:56 +02001542}
Simon Glasscb7cf602015-03-25 12:22:25 -06001543
Simon Glassa194b252015-03-25 12:22:29 -06001544#ifndef CONFIG_DM_USB
Simon Glasscb7cf602015-03-25 12:22:25 -06001545int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1546 void *buffer, int length)
1547{
1548 return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1549}
1550
1551int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1552 int length, struct devrequest *setup)
1553{
1554 return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1555}
1556
1557int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1558 void *buffer, int length, int interval)
1559{
1560 return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
1561}
Hans de Goede53ca9de2015-05-11 20:43:52 +02001562
1563struct int_queue *create_int_queue(struct usb_device *dev,
1564 unsigned long pipe, int queuesize, int elementsize,
1565 void *buffer, int interval)
1566{
1567 return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1568 buffer, interval);
1569}
1570
1571void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1572{
1573 return _ehci_poll_int_queue(dev, queue);
1574}
1575
1576int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1577{
1578 return _ehci_destroy_int_queue(dev, queue);
1579}
Simon Glassa194b252015-03-25 12:22:29 -06001580#endif
1581
1582#ifdef CONFIG_DM_USB
1583static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1584 unsigned long pipe, void *buffer, int length,
1585 struct devrequest *setup)
1586{
1587 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1588 dev->name, udev, udev->dev->name, udev->portnr);
1589
1590 return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1591}
1592
1593static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1594 unsigned long pipe, void *buffer, int length)
1595{
1596 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1597 return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1598}
1599
1600static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1601 unsigned long pipe, void *buffer, int length,
1602 int interval)
1603{
1604 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1605 return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
1606}
1607
Hans de Goede0a7fa272015-05-10 14:10:18 +02001608static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1609 struct usb_device *udev, unsigned long pipe, int queuesize,
1610 int elementsize, void *buffer, int interval)
1611{
1612 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1613 return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1614 buffer, interval);
1615}
1616
1617static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1618 struct int_queue *queue)
1619{
1620 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1621 return _ehci_poll_int_queue(udev, queue);
1622}
1623
1624static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1625 struct int_queue *queue)
1626{
1627 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1628 return _ehci_destroy_int_queue(udev, queue);
1629}
1630
Simon Glassa194b252015-03-25 12:22:29 -06001631int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1632 struct ehci_hcor *hcor, const struct ehci_ops *ops,
1633 uint tweaks, enum usb_init_type init)
1634{
Hans de Goede76bc7f42015-05-05 11:54:35 +02001635 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
Simon Glassa194b252015-03-25 12:22:29 -06001636 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1637 int ret;
1638
1639 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1640 dev->name, ctrl, hccr, hcor, init);
1641
Hans de Goede76bc7f42015-05-05 11:54:35 +02001642 priv->desc_before_addr = true;
1643
Simon Glassa194b252015-03-25 12:22:29 -06001644 ehci_setup_ops(ctrl, ops);
1645 ctrl->hccr = hccr;
1646 ctrl->hcor = hcor;
1647 ctrl->priv = ctrl;
1648
1649 if (init == USB_INIT_DEVICE)
1650 goto done;
1651 ret = ehci_reset(ctrl);
1652 if (ret)
1653 goto err;
1654
1655 ret = ehci_common_init(ctrl, tweaks);
1656 if (ret)
1657 goto err;
1658done:
1659 return 0;
1660err:
1661 free(ctrl);
1662 debug("%s: failed, ret=%d\n", __func__, ret);
1663 return ret;
1664}
1665
1666int ehci_deregister(struct udevice *dev)
1667{
1668 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1669
1670 ehci_shutdown(ctrl);
1671
1672 return 0;
1673}
1674
1675struct dm_usb_ops ehci_usb_ops = {
1676 .control = ehci_submit_control_msg,
1677 .bulk = ehci_submit_bulk_msg,
1678 .interrupt = ehci_submit_int_msg,
Hans de Goede0a7fa272015-05-10 14:10:18 +02001679 .create_int_queue = ehci_create_int_queue,
1680 .poll_int_queue = ehci_poll_int_queue,
1681 .destroy_int_queue = ehci_destroy_int_queue,
Simon Glassa194b252015-03-25 12:22:29 -06001682};
1683
1684#endif