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Bin Mengf17cea62015-04-24 18:10:04 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _X86_TABLES_H_
8#define _X86_TABLES_H_
9
10/*
11 * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
12 * We use 0xf0000 as the starting address to store those tables, including
13 * PIRQ routing table, Multi-Processor table and ACPI table.
14 */
15#define ROM_TABLE_ADDR 0xf0000
16
17/**
18 * table_compute_checksum() - Compute a table checksum
19 *
20 * This computes an 8-bit checksum for the configuration table.
21 * All bytes in the configuration table, including checksum itself and
22 * reserved bytes must add up to zero.
23 *
24 * @v: configuration table base address
25 * @len: configuration table size
26 * @return: the 8-bit checksum
27 */
28u8 table_compute_checksum(void *v, int len);
29
30/**
31 * write_tables() - Write x86 configuration tables
32 *
33 * This writes x86 configuration tables, including PIRQ routing table,
34 * Multi-Processor table and ACPI table. Whether a specific type of
35 * configuration table is written is controlled by a Kconfig option.
36 */
37void write_tables(void);
38
39/**
40 * write_pirq_routing_table() - Write PIRQ routing table
41 *
42 * This writes PIRQ routing table at a given address.
43 *
44 * @start: start address to write PIRQ routing table
45 * @return: end address of PIRQ routing table
46 */
47u32 write_pirq_routing_table(u32 start);
48
49#endif /* _X86_TABLES_H_ */