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wdenk591dda52002-11-18 00:14:45 +00001/*
Bin Meng8c5acf42014-12-12 21:05:22 +08002 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00003 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10004 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02008 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +00009 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
wdenk591dda52002-11-18 00:14:45 +000011 */
12
wdenk591dda52002-11-18 00:14:45 +000013#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110014#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070015#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110016#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110017#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110018#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080019#include <generated/asm-offsets.h>
wdenk591dda52002-11-18 00:14:45 +000020
wdenk591dda52002-11-18 00:14:45 +000021.section .text
22.code32
23.globl _start
wdenk57b2d802003-06-27 21:31:46 +000024.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100025.globl _x86boot_start
26_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100027 /*
28 * This is the fail safe 32-bit bootstrap entry point. The
29 * following code is not executed from a cold-reset (actually, a
30 * lot of it is, but from real-mode after cold reset. It is
31 * repeated here to put the board into a state as close to cold
32 * reset as necessary)
33 */
34 cli
35 cld
36
Graeme Russc379b5d2011-11-08 02:33:23 +000037 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100038 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110039 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100040 movl %eax, %cr0
41 wbinvd
42
Gabe Blackef899322012-11-03 11:41:28 +000043 /* Tell 32-bit code it is being entered from an in-RAM copy */
44 movw $GD_FLG_WARM_BOOT, %bx
45 jmp 1f
wdenk57b2d802003-06-27 21:31:46 +000046_start:
Gabe Blackef899322012-11-03 11:41:28 +000047 /*
48 * This is the 32-bit cold-reset entry point. Initialize %bx to 0
49 * in case we're preceeded by some sort of boot stub.
50 */
51 movw $GD_FLG_COLD_BOOT, %bx
521:
Simon Glass1f4476c2014-11-06 13:20:10 -070053 /* Save BIST */
54 movl %eax, %ebp
Graeme Russ8accbb92010-04-24 00:05:42 +100055
Graeme Russ45fc1d82011-04-13 19:43:26 +100056 /* Load the segement registes to match the gdt loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110057 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110058 movw %ax, %fs
59 movw %ax, %ds
60 movw %ax, %gs
61 movw %ax, %es
62 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000063
Mike Williamsbf895ad2011-07-22 04:01:30 +000064 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100065 lidt blank_idt_ptr
66
wdenk591dda52002-11-18 00:14:45 +000067 /* Early platform init (setup gpio, etc ) */
wdenk591dda52002-11-18 00:14:45 +000068 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110069.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000070early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -070071 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +000072
Graeme Russbc761932011-02-12 15:11:52 +110073 /* Initialise Cache-As-RAM */
74 jmp car_init
75.globl car_init_ret
76car_init_ret:
Bin Meng005f0af2014-12-12 21:05:31 +080077#ifndef CONFIG_HAVE_FSP
Graeme Russbc761932011-02-12 15:11:52 +110078 /*
79 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
80 * or fully initialised SDRAM - we really don't care which)
81 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass268eefd2014-11-12 22:42:28 -070082 * and early malloc area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -070083 *
84 * Stack grows down from top of CAR. We have:
85 *
86 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -070087 * MRC area
Simon Glassa4fd0db2014-11-06 13:20:04 -070088 * global_data
89 * x86 global descriptor table
90 * early malloc area
91 * stack
92 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +110093 */
Simon Glass268eefd2014-11-12 22:42:28 -070094 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
95#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
96 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
97#endif
Bin Meng005f0af2014-12-12 21:05:31 +080098#else
99 /*
100 * When we get here after car_init, esp points to a temporary stack
101 * and esi holds the HOB list address returned by the FSP.
102 */
103#endif
Graeme Russ007818a2012-11-27 15:38:36 +0000104
105 /* Reserve space on stack for global data */
106 subl $GENERATED_GBL_DATA_SIZE, %esp
107
108 /* Align global data to 16-byte boundary */
109 andl $0xfffffff0, %esp
Simon Glass245561d2014-11-12 22:42:09 -0700110 post_code(POST_START_STACK)
Graeme Russ007818a2012-11-27 15:38:36 +0000111
Simon Glass73e44fb2014-10-10 07:49:15 -0600112 /* Zero the global data since it won't happen later */
113 xorl %eax, %eax
114 movl $GENERATED_GBL_DATA_SIZE, %ecx
115 movl %esp, %edi
116 rep stosb
117
Bin Meng005f0af2014-12-12 21:05:31 +0800118#ifdef CONFIG_HAVE_FSP
119 /* Store HOB list */
120 movl %esp, %edx
121 addl $GD_HOB_LIST, %edx
122 movl %esi, (%edx)
123#endif
124
Simon Glassa4fd0db2014-11-06 13:20:04 -0700125 /* Setup first parameter to setup_gdt, pointer to global_data */
Graeme Russ007818a2012-11-27 15:38:36 +0000126 movl %esp, %eax
127
128 /* Reserve space for global descriptor table */
129 subl $X86_GDT_SIZE, %esp
130
Simon Glassa4fd0db2014-11-06 13:20:04 -0700131 /* Align temporary global descriptor table to 16-byte boundary */
132 andl $0xfffffff0, %esp
133 movl %esp, %ecx
134
Simon Glassb24a9512014-10-10 07:49:16 -0600135#if defined(CONFIG_SYS_MALLOC_F_LEN)
136 subl $CONFIG_SYS_MALLOC_F_LEN, %esp
137 movl %eax, %edx
138 addl $GD_MALLOC_BASE, %edx
139 movl %esp, (%edx)
140#endif
Simon Glass1f4476c2014-11-06 13:20:10 -0700141 /* Store BIST */
142 movl %eax, %edx
143 addl $GD_BIST, %edx
144 movl %ebp, (%edx)
Graeme Russ007818a2012-11-27 15:38:36 +0000145
146 /* Set second parameter to setup_gdt */
Simon Glassa4fd0db2014-11-06 13:20:04 -0700147 movl %ecx, %edx
Graeme Russ007818a2012-11-27 15:38:36 +0000148
Graeme Russ007818a2012-11-27 15:38:36 +0000149 /* Setup global descriptor table so gd->xyz works */
150 call setup_gdt
Graeme Russ35368962011-12-31 22:58:15 +1100151
Graeme Russ38183932011-02-12 15:11:54 +1100152 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700153 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000154 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100155
Graeme Russ45fc1d82011-04-13 19:43:26 +1000156 /* Enter, U-boot! */
157 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000158
159 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000160 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100161 jmp die
162
Graeme Russd7755b42012-01-01 15:06:39 +1100163.globl board_init_f_r_trampoline
164.type board_init_f_r_trampoline, @function
165board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100166 /*
167 * SDRAM has been initialised, U-Boot code has been copied into
168 * RAM, BSS has been cleared and relocation adjustments have been
169 * made. It is now time to jump into the in-RAM copy of U-Boot
170 *
Graeme Russd7755b42012-01-01 15:06:39 +1100171 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100172 */
173
Graeme Russ007818a2012-11-27 15:38:36 +0000174 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100175 movl %eax, %esp
176
Graeme Russ007818a2012-11-27 15:38:36 +0000177 /* Reserve space on stack for global data */
178 subl $GENERATED_GBL_DATA_SIZE, %esp
179
180 /* Align global data to 16-byte boundary */
181 andl $0xfffffff0, %esp
182
183 /* Setup first parameter to memcpy (and setup_gdt) */
184 movl %esp, %eax
185
186 /* Setup second parameter to memcpy */
187 fs movl 0, %edx
188
189 /* Set third parameter to memcpy */
190 movl $GENERATED_GBL_DATA_SIZE, %ecx
191
192 /* Copy global data from CAR to SDRAM stack */
193 call memcpy
194
195 /* Reserve space for global descriptor table */
196 subl $X86_GDT_SIZE, %esp
197
198 /* Align global descriptor table to 16-byte boundary */
199 andl $0xfffffff0, %esp
200
201 /* Set second parameter to setup_gdt */
202 movl %esp, %edx
203
Graeme Russ007818a2012-11-27 15:38:36 +0000204 /* Setup global descriptor table so gd->xyz works */
205 call setup_gdt
206
Simon Glass78da72c2015-01-01 16:18:13 -0700207 /* Set if we need to disable CAR */
208.weak car_uninit
209 movl $car_uninit, %eax
210 cmpl $0, %eax
211 jz 1f
212
213 call car_uninit
2141:
Graeme Russd7755b42012-01-01 15:06:39 +1100215 /* Re-enter U-Boot by calling board_init_f_r */
216 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100217
Graeme Russc379b5d2011-11-08 02:33:23 +0000218die:
219 hlt
wdenk591dda52002-11-18 00:14:45 +0000220 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000221 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000222
223blank_idt_ptr:
224 .word 0 /* limit */
225 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000226
227 .p2align 2 /* force 4-byte alignment */
228
229multiboot_header:
230 /* magic */
231 .long 0x1BADB002
232 /* flags */
233 .long (1 << 16)
234 /* checksum */
235 .long -0x1BADB002 - (1 << 16)
236 /* header addr */
237 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
238 /* load addr */
239 .long CONFIG_SYS_TEXT_BASE
240 /* load end addr */
241 .long 0
242 /* bss end addr */
243 .long 0
244 /* entry addr */
245 .long CONFIG_SYS_TEXT_BASE