Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 2 | /* |
| 3 | * atmel_lcd.h - Atmel LCD Controller structures |
| 4 | * |
| 5 | * (C) Copyright 2001 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _ATMEL_LCD_H_ |
| 10 | #define _ATMEL_LCD_H_ |
| 11 | |
Tom Rini | a4a8ea9 | 2023-12-14 13:16:57 -0500 | [diff] [blame] | 12 | #include <linux/types.h> |
| 13 | |
Simon Glass | 31f56b4 | 2016-05-05 07:28:20 -0600 | [diff] [blame] | 14 | /** |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 15 | * struct atmel_lcd_plat - platform data for Atmel LCDs with driver model |
Simon Glass | 31f56b4 | 2016-05-05 07:28:20 -0600 | [diff] [blame] | 16 | * |
| 17 | * @timing_index: Index of LCD timing to use in device tree node |
| 18 | */ |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 19 | struct atmel_lcd_plat { |
Simon Glass | 31f56b4 | 2016-05-05 07:28:20 -0600 | [diff] [blame] | 20 | int timing_index; |
| 21 | }; |
| 22 | |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 23 | typedef struct vidinfo { |
| 24 | ushort vl_col; /* Number of columns (i.e. 640) */ |
| 25 | ushort vl_row; /* Number of rows (i.e. 480) */ |
Hannes Petermaier | a3c8e86 | 2015-03-27 08:01:38 +0100 | [diff] [blame] | 26 | ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */ |
| 27 | u_long vl_clk; /* pixel clock in ps */ |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 28 | |
| 29 | /* LCD configuration register */ |
| 30 | u_long vl_sync; /* Horizontal / vertical sync */ |
| 31 | u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ |
| 32 | u_long vl_tft; /* 0 = passive, 1 = TFT */ |
| 33 | u_long vl_cont_pol_low; /* contrast polarity is low */ |
| 34 | u_long vl_clk_pol; /* clock polarity */ |
| 35 | |
| 36 | /* Horizontal control register. */ |
| 37 | u_long vl_hsync_len; /* Length of horizontal sync */ |
| 38 | u_long vl_left_margin; /* Time from sync to picture */ |
| 39 | u_long vl_right_margin; /* Time from picture to sync */ |
| 40 | |
| 41 | /* Vertical control register. */ |
| 42 | u_long vl_vsync_len; /* Length of vertical sync */ |
| 43 | u_long vl_upper_margin; /* Time from sync to picture */ |
| 44 | u_long vl_lower_margin; /* Time from picture to sync */ |
| 45 | |
| 46 | u_long mmio; /* Memory mapped registers */ |
Wenyou Yang | 857ad80 | 2017-09-13 14:58:46 +0800 | [diff] [blame] | 47 | |
| 48 | u_int logo_width; |
| 49 | u_int logo_height; |
| 50 | int logo_x_offset; |
| 51 | int logo_y_offset; |
| 52 | u_long logo_addr; |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 53 | } vidinfo_t; |
| 54 | |
Wenyou Yang | 857ad80 | 2017-09-13 14:58:46 +0800 | [diff] [blame] | 55 | void atmel_logo_info(vidinfo_t *info); |
| 56 | void microchip_logo_info(vidinfo_t *info); |
| 57 | |
Nikita Kiryanov | b260492 | 2015-02-03 13:32:20 +0200 | [diff] [blame] | 58 | #endif |